Fairchild DM74AS874WM Dual 4-bit d-type edge-triggered flip-flop Datasheet

Revised July 2003
DM74AS874
Dual 4-Bit D-Type Edge-Triggered Flip-Flop
General Description
Features
These dual 4-bit inverting registers feature totem-pole 3STATE outputs designed specifically for driving highlycapacitive or relatively low-impedance loads. The highimpedance state and increased high-logic-level drive provide these registers with the capability of being connected
directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They
are particularly attractive for implementing buffer registers,
I/O ports, bidirectional bus drivers, and working registers.
■ Switching specifications at 50 pF
■ Switching specifications guaranteed over full temperature and VCC range
■ Advanced oxide-isolated, ion-implanted Schottky TTL
process
■ 3-STATE buffer-type outputs drive bus lines directly
■ Space saving 300 mil wide package
■ Bus structured pinout
The eight flip-flops of the DM74AS874 are edge-triggered
D-type flip-flops. On the positive transition of the clock, the
Q outputs will be set to the logic states that were set up at
the D inputs.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high-impedance state. In the high-impedance state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the flip-flops. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.
The pinout is arranged to ease printed circuit board layout.
All data inputs are on one side of the package, while all
outputs are on the other side.
Ordering Code:
Order Number
Package Number
DM74AS874WM
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Description
DM74AS874NT
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
© 2003 Fairchild Semiconductor Corporation
DS006331
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DM74AS874 Dual 4-Bit D-Type Edge-Triggered Flip-Flop
October 1986
DM74AS874
Function Table
Logic Diagram
Inputs
Output
CLR
D
CLK
OC
Q
X
X
X
H
Z
L
X
X
L
L
H
H
↑
L
H
H
L
↑
L
L
H
X
L
L
Q0
L = LOW State
H = HIGH State
X = Don’t Care
↑ = Positive Edge Transition
Z = High Impedance State
Q0 = Previous Condition of Q
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2
Supply Voltage
7V
Input Voltage
7V
Voltage Applied to Disabled Output
5.5V
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
0°C to +70°C
Operating Free Air Temperature Range
−65°C to +150°C
Storage Temperature Range
Typical θJA
47.0°C/W
N Package
Recommended Operating Conditions
Symbol
Parameter
Min
Nom
Max
4.5
5
5.5
Units
VCC
Supply Voltage
VIH
HIGH Level Input Voltage
VIL
LOW Level Input Voltage
0.8
V
IOH
HIGH Level Output Current
−15
mA
IOL
LOW Level Output Current
fCLK
Clock Frequency
tWCLK
Width of Clock Pulse
V
2
V
0
HIGH
3
LOW
6
tWCLR
Width of Clear Pulse
LOW
2
tSU
Setup Time
Data
4↑
(Note 2)
Clear Inactive
5↑
tH
Data Hold Time (Note 2)
1↑
TA
Free Air Operating Temperature
0
48
mA
80
MHz
ns
ns
ns
ns
°C
70
Note 2: The (↑) arrow indicates the positive edge of the Clock is used for reference.
Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C.
Symbol
Parameter
Conditions
Min
VIK
Input Clamp Voltage
VCC = 4.5V, II = −18 mA
VOH
HIGH Level
VCC = 4.5V, VIL = VIL Max, IOH = Max
Output Voltage
VOL
IOH = −2 mA, VCC = 4.5V to 5.5V
LOW Level
VCC = 4.5V, VIH = 2V,
Output Voltage
IOL = Max
2.4
Typ
Max
Units
−1.2
V
3.3
V
VCC − 2
0.35
0.5
V
0.1
mA
II
Input Current at Max Input Voltage VCC = 5.5V, VIH = 7V
IIH
HIGH Level Input Current
VCC = 5.5V, VIH = 2.7V
20
µA
IIL
LOW Level Input Current
VCC = 5.5V, VIL = 0.4V
−0.5
mA
IO (Note 3)
Output Drive Current
VCC = 5.5V, VO = 2.25V
−112
mA
IOZH
OFF-State Output Current,
VCC = 5.5V, VIH = 2V,
HIGH Level Voltage Applied
VO = 2.7V,
50
µA
−50
µA
IOZL
ICC
OFF-State Output Current,
VCC = 5.5V, VIH = 2V,
LOW Level Voltage Applied
VO = 0.4V
Supply Current
−30
VCC = 5.5V
Outputs HIGH
82
133
Outputs OPEN
Outputs LOW
92
149
Outputs Disabled
100
160
mA
Note 3: The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit current, IOS.
3
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DM74AS874
Absolute Maximum Ratings(Note 1)
DM74AS874
Switching Characteristics
over recommended operating free air temperature range
Symbol
Parameter
Conditions
fMAX
Maximum Clock Frequency
VCC = 4.5V to 5.5V
tPLH
Propagation Delay Time
RL = 500Ω
LOW-to-HIGH Level Output
CL = 50 pF
tPHL
From
To
Propagation Delay Time
Clock
Any Q
Clock
Any Q
Output Enable Time
Output Control
Any Q
Output Control
Any Q
Output Control
Any Q
Output Control
Any Q
Clear
Any Q
to HIGH Level Output
tPZL
Output Enable Time
to LOW Level Output
tPHZ
Output Disable Time
from HIGH Level Output
tPLZ
Output Disable Time
from LOW Level Output
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
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Max
80
HIGH-to-LOW Level Output
tPZH
Min
4
Units
MHz
3
8.5
ns
4
10.5
ns
2
7
ns
3
10.5
ns
2
6
ns
2
7.5
ns
4
11.5
ns
DM74AS874
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M24B
5
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DM74AS874 Dual 4-Bit D-Type Edge-Triggered Flip-Flop
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N24C
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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