IRF AUIRS2003S Half-bridge driver Datasheet

September 21, 2009
Automotive Grade
AUIRS2003S
HALF-BRIDGE DRIVER
Product Summary
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
Floating channel designed for bootstrap operation
Topology
Fully operational to +200V
Tolerant to negative transient voltage, dV/dt immune VOFFSET
Gate drive supply range from 10V to 20V
VOUT
Undervoltage lockout
3.3V, 5V, and 15V logic compatible
Io+ & I o- (typical)
Cross-conduction prevention logic
ton & toff (typical)
Matched propagation delay for both channels
Internal set deadtime
Deadtime (typical)
High-side output in phase with HIN input
Low-side output out of phase with LIN input
Package Options
Leadfree, RoHS compliant
Automotive qualified*
General Driver
≤ 200V
10V – 20V
290mA & 600mA
680ns & 150ns
520ns
Typical Applications
•
•
•
Pre-charge Switch Drives
Stepper / Motor Drives
DC-DC Converters
8 - Lead SOIC
AUIRS2003S
Diagram for DC-DC converter application
Vcc
FROM
SWITCHING
CONTROL
CIRCUIT
AUIRS2003
HIN
VB
HO
TO LOAD
LIN
VS
COM
LO
* Qualification standards can be found on IR’s web site www.irf.com
© 2008 International Rectifier
AUIRS2003S
Table of Contents
Page
Typical Connection Diagram
1
Description/Feature Comparison
3
Qualification Information
4
Absolute Maximum Ratings
5
Recommended Operating Conditions
5
Static Electrical Characteristics
6
Dynamic Electrical Characteristics
6
Functional Block Diagram
7
Input/Output Pin Equivalent Circuit Diagram
8
Lead Definitions
9
Lead Assignments
9
Application Information and Additional Details
10
Package Details: SOIC8N
11
Package Details: SOIC8N, Tape and Reel
12
Part Marking Information
13
Ordering Information
14
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© 2008 International Rectifier
2
AUIRS2003S
Description
The AUIRS2003S is a high voltage, high speed power MOSFET and IGBT driver with dependent high and
low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable
ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output,
down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver
cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the
high side configuration which operates up to 200V.
Typical Connection Diagram
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AUIRS2003S
Qualification Information†
Qualification Level
Moisture Sensitivity Level
Machine Model
ESD
Human Body Model
Charged Device Model
IC Latch-Up Test
RoHS Compliant
Automotive
(per AEC-Q100††)
Comments: This family of ICs has passed an Automotive
qualification. IR’s Industrial and Consumer qualification level
is granted by extension of the higher Automotive level.
MSL3††† 260°C
SOIC8N
(per IPC/JEDEC J-STD-020)
Class M2
(per AEC-Q100-003)
Class H2
(per AEC-Q100-002)
Class C5
(per AEC-Q100-011)
Class II, Level B
(per AEC-Q100-004)
Yes
†
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
†† Exceptions to AEC-Q100 requirements are noted in the qualification report.
††† Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
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© 2008 International Rectifier
4
AUIRS2003S
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All
voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation
ratings are measured under board mounted and still air conditions.
Symbol
VB
VS
VHO
VCC
VLO
VIN
dVS/dt
PD
RthJA
TJ
TS
TL
Definition
Min.
Max.
High side floating absolute voltage
-0.3
225
VB - 25
VS - 0.3
-0.3
-0.3
-0.3
—
—
—
—
-55
—
VB + 0.3
VB + 0.3
25
VCC + 0.3
VCC + 0.3
50
0.625
200
150
150
300
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Logic input voltage (HIN & LIN)
Allowable offset supply voltage transient
Package power dissipation @ TA ≤ 25°C
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
Units
V
V/ns
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig 1. For proper operation the device should be used
within the recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol
VB
VS
VHO
VCC
VLO
VIN
TA
Definition
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Logic input voltage
Ambient temperature
Min.
Max.
VS + 10
†
VS
10
0
0
-40
VS + 20
200
VB
20
VCC
VCC
125
Units
V
°C
† Logic operational for VS of -5V to +200V. Logic state held for VS of -5V to –VBS. (Please refer to the
Design Tip DR97-3 for more details).
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AUIRS2003S
Dynamic Electrical Characteristics
VCC = VBS = 15V, CL = 1000pF, TA = 25°C unless otherwise specified.
Symbol
ton
toff
tr
tf
DT
MT
Definition
Turn-on propagation delay
Turn-off propagation delay
Turn-on rise time
Turn-off fall time
Deadtime, LO turn-off to HO turn-on &
HO turn-on to LO turn-off
Delay matching , HO & LO turn-on/off
Min
—
—
—
—
Typ
680
150
70
35
Max
820
220
170
90
400
520
650
—
—
60
Units
Test Conditions
VS = 0V
VS = 200V
ns
Static Electrical Characteristics
VCC = VBS = 15V and TA = 25°C unless otherwise specified. The VIN and IIN parameters are referenced to
COM and are applicaple to the input leads: HIN and LIN. The VO and IO parameters are referenced to COM
and are applicable to the respective output leads: HO and LO.
Symbol
VIH
VIL
VOH
VOL
ILK
IQBS
IQCC
IIN+
IINVCCUV+
VBSUV+
VCCUVVBSUVIO+
Definition
Logic “1” input voltage
Logic “0” input voltage
High level output voltage, VCC or VBS - VO
Low level output voltage, VO
Offset supply leakage current
Quiescent VBS supply current
Quiescent VCC supply current
Logic “1” input bias current
Logic “0” input bias current
VCC and VBS supply undervoltage positive
going threshold
VCC and VBS supply undervoltage negative
going threshold
Min
2.5
—
—
—
—
—
—
—
—
Typ
—
—
0.05
0.02
—
30
150
3
—
Max
—
0.8
0.2
0.1
50
55
270
10
5
8.0
8.9
9.8
7.4
8.2
9.0
Output high short circuit pulsed current
130
290
—
Units
VCC = 10V to 20V
V
IO = 2mA
VB = VS = 200V
µA
Output low short circuit pulsed current
V
270
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VIN = 0V or 5V
VIN = 5V
VIN = 0V
mA
IO-
Test Conditions
600
—
VO = 0V,
VIN = VIH
PW ≤ 10 µs
VO = 15V,
VIN = VIL
PW ≤ 10 µs
© 2008 International Rectifier
6
AUIRS2003S
Functional Block Diagram
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AUIRS2003S
Input/Output Pin Equivalent Circuit Diagrams
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8
AUIRS2003S
Lead Definitions
PIN
Symbol
Description
1
VCC
Low side and logic fixed supply
2
HIN
Logic input for high side gate driver output (HO), in phase
3
LIN
Logic input for low side driver output (LO), out of phase
4
COM
5
LO
Low side gate drive output
6
VS
High side floating supply return
7
HO
High side gate drive output
8
VB
High side floating supply
Low side return
Lead Assignments
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AUIRS2003S
Application Information and Additional Details
LIN
50%
50%
HIN
ton
tr
90%
LIN
LO
tf
toff
90%
10%
10%
HO
50%
LO
50%
HIN
ton
toff
tr
90%
Figure 1: Input/Output Timing Diagram
HO
10%
tf
90%
10%
Figure 2: Switching Time Waveform Definition
Figure 3: Delay Matching Waveform Definitions
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AUIRS2003S
Package Details: SOIC8N
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© 2008 International Rectifier
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AUIRS2003S
Package Details: SOIC8N, Tape and Reel
LOADED TAPE FEED DIRECTION
A
B
H
D
F
C
NOTE : CONTROLLING
DIMENSION IN MM
E
G
CARRIER TAPE DIMENSION FOR 8SOICN
Metric
Imperial
Code
Min
Max
Min
Max
A
7.90
8.10
0.311
0.318
B
3.90
4.10
0.153
0.161
C
11.70
12.30
0.46
0.484
D
5.45
5.55
0.214
0.218
E
6.30
6.50
0.248
0.255
F
5.10
5.30
0.200
0.208
G
1.50
n/a
0.059
n/a
H
1.50
1.60
0.059
0.062
F
D
C
B
A
E
G
H
REEL DIMENSIONS FOR 8SOICN
Metric
Code
Min
Max
A
329.60
330.25
B
20.95
21.45
C
12.80
13.20
D
1.95
2.45
E
98.00
102.00
F
n/a
18.40
G
14.50
17.10
H
12.40
14.40
Imperial
Min
Max
12.976
13.001
0.824
0.844
0.503
0.519
0.767
0.096
3.858
4.015
n/a
0.724
0.570
0.673
0.488
0.566
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12
AUIRS2003S
Part Marking Information
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13
AUIRS2003S
Ordering Information
Standard Pack
Base Part Number
AUIRS2003S
Package Type
SOIC8
Complete Part Number
Form
Quantity
Tube/Bulk
95
AUIRS2003S
Tape and Reel
2500
AUIRS2003STR
The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no
responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any
infringement of patents or of other rights of third parties which may result from the use of this information. No license is granted by
implication or otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document are
subject to change without notice. This document supersedes and replaces all information previously supplied.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245
Tel: (310) 252-7105
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© 2008 International Rectifier
14
AUIRS2003S
Revision History
Date
5/12/08
8/20/08
10/13/08
10/20/08
10/23/08
1/20/09
1/28/09
9/21/09
Comment
Tables modified for AUIRS2003
Added cross conduction prevention comment to IC features
Changed product summary topology to “General Driver”
Changed product summary IO+ & IO- units from A to mA
Modified functional block diagram to include the deadtime and shoot-through protection
Added VBSUV+ and VBSUV- parameters
Added input/output pin equivalent circuit diagrams
Added IC label on lead assignment block
Updated waveform diagrams to reflect proper labeling
Reviewed all text/diagrams to reflect proper reference to LIN
Updated LU rating to Class II level B (due to input pins having LU<100mA)
Reformatted I/O table
Edited lead assignment dwg
Deleted parameter trends place holder
Removed coloration n functional block dwg
Removed unnecessary “AUIRS2003S” label in typical connection dwg, functional block dwg,
lead assignment dwg
Updated table of contents
Updated MM rating to Class A based on latest ESD data
Updated MSL rating from 2 to 3
Updated ESD and LU classification to Q100
Changes from APBU:
Added Typical Application list – P1
Added Diagram for DC-DC converter application, and moved Typical Connection Diagram to
P3
Reviewed by Scott, Preliminary sign removed
Change part description on front page to “Half-Bridge Driver” from “High and Low Side
driver”.
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© 2008 International Rectifier
15
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