AMIC A616316 64k x 16 bit high speed cmos sram Datasheet

A616316 Series
Preliminary
64K X 16 BIT HIGH SPEED CMOS SRAM
Document Title
64K X 16 BIT HIGH SPEED CMOS SRAM
Revision History
Rev. No.
0.0
PRELIMINARY
History
Issue Date
Remark
Initial issue
July 14, 2000
Preliminary
(July, 2000, Version 0.0)
AMIC Technology, Inc.
A616316 Series
Preliminary
64K X 16 BIT HIGH SPEED CMOS SRAM
Features
n
n
n
n
n
n
n
n
n
Center power pinout
Supply voltage: 5V±10%
Access times: 12/15 ns (max.)
Current: Operating: -12: 170mA (max.)
-15: 165mA (max.)
Standby: TTL: 25mA (max.)
CMOS: 8mA (max.)
Full static operation, no clock or refreshing required
All inputs and outputs are directly TTL-compatible
Common I/O using three-state output
Data retention voltage: 3V (min.)
Available in 44-pin 400mil SOJ and 44-pin 400mil
TSOP(II) forward packages.
General Description
The chip enable input is provided for POWER-DOWN, to
disable the device. Two byte enable inputs and an output
enable input are included for easy interfacing.
Data retention is guaranteed at a power supply voltage
as low as 3V.
The A616316 is a high speed 1,048,576-bit static random
access memory organized as 65,536 words by 16 bits
and operates on supply voltage 5V. It is built using
AMIC’s high performance CMOS process.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
Pin Configuration
n SOJ / TSOP(II)
(July, 2000, Version 0.0)
1
44
A15
A1
2
43
A14
A2
3
42
A13
A3
4
41
OE
A4
5
40
HB
CE
6
39
LB
I/O0
7
38
I/O15
I/O1
8
37
I/O14
I/O2
9
36
I/O13
I/O3
10
35
I/O12
VCC
11
34
GND
GND
12
33
VCC
I/O4
13
32
I/O11
I/O5
14
31
I/O10
I/O6
15
30
I/O9
I/O7
16
29
I/O8
WE
17
28
NC
A5
18
27
A12
A6
19
26
A11
A7
20
25
A10
A8
21
24
A9
NC
22
23
NC
A616316S(V)
PRELIMINARY
A0
1
AMIC Technology, Inc.
A616316 Series
Block Diagram
VCC
A0
GND
1,048,576-BIT
DECODER
MEMORY ARRAY
A14
A15
I/O0
I/O8
INPUT
COLUMN I/O
DATA
DATA
CIRCUIT
CIRCUIT
I/O15
I/O7
CE
LB
HB
OE
WE
PRELIMINARY
INPUT
CONTROL
CIRCUIT
(July, 2000, Version 0.0)
2
AMIC Technology, Inc.
A616316 Series
Pin Description - SOJ/TSOP(II)
Pin No.
Symbol
Description
1 - 5, 18 - 21,
24 - 27,42 - 44
A0 - A15
6
CE
Chip Enable Input
7 - 10, 13 - 16,
29 - 32, 35 - 38
I/O0 - I/O15
Data Input/Outputs
17
WE
Write Enable Input
39
LB
Byte Enable Input (I/O0 to I/O7)
40
HB
Byte Enable Input (I/O8 to I/O15)
41
OE
Output Enable Input
11, 33
VCC
Power
12, 34
GND
Ground
22 , 23, 28
NC
Address Inputs
No Connection
Recommended DC Operating Conditions
(TA = 0°C to + 70°C)
Symbol
Parameter
Min.
Typ.
Max.
Unit
4.5
5.0
5.5
V
0
0
0
V
VCC
Supply Voltage
GND
Ground
VIH
Input High Voltage
2.2
-
VCC + 0.3
V
VIL
Input Low Voltage
-0.3
-
0.8
V
CL
Output Load
-
-
30
pF
PRELIMINARY
(July, 2000, Version 0.0)
3
AMIC Technology, Inc.
A616316 Series
Absolute Maximum Ratings*
*Comments
VCC to GND . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
IN, IN/OUT Volt to GND . . . . . . . . -0.5V to VCC + 0.5V
Operating Temperature, Topr . . . . . . . . . . 0°C to +70°C
Storage Temperature, Tstg . . . . . . . . . -55°C to +125°C
Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . 1.0W
Soldering Temp. & Time . . . . . . . . . . . . 260°C, 10 sec
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied or intended. Exposure to the absolute
maximum rating conditions for extended periods may
affect device reliability.
DC Electrical Characteristics (TA = 0°C to + 70°C, VCC = 5V±10%, GND = 0V)
Symbol
Parameter
A616316-12
A616316-15
Min.
Max.
Min.
Max.
Unit
Conditions
ILI
Input Leakage
-
2
-
2
µA
VIN = GND to VCC
ILO
Output Leakage
-
2
-
2
µA
CE = VIH, OE = VIH
VI/O = GND to VCC
Dynamic Operating
Current
-
170
-
165
mA
CE = VIL, II/O = 0 mA
Min. Cycle, Duty = 100%
-
25
-
25
mA
-
8
-
8
mA
ICC1 (2)
ISB
ISB1
Standby Power
Supply Current
CE = VIH
CE ≥ VCC - 0.2V,
VIN ≥ VCC -0.2V or VIN ≤ 0.2V
VOL
Output Low Voltage
-
0.4
-
0.4
V
IOL = 8 mA
VOH
Output High Voltage
2.4
-
2.4
-
V
IOH = -4 mA
Notes: 1. VIL = -3.0V for pulses less than 20 ns.
2. ICC1 is dependent on output loading, cycle rates, and Read/Write patterns.
PRELIMINARY
(July, 2000, Version 0.0)
4
AMIC Technology, Inc.
A616316 Series
Truth Table
I/O0 to I/O7 Mode
I/O8 to I/O15 Mode
VCC Current
CE
OE
WE
LB
HB
H
X
X
X
X
Not selected
Not selected
ISB1, ISB
L
L
Read
Read
ICC1, ICC2, ICC
L
H
Read
High - Z
ICC1, ICC2, ICC
H
L
High - Z
Read
ICC1, ICC2, ICC
L
L
Write
Write
ICC1, ICC2, ICC
L
H
Write
Not Write/Hi - Z
ICC1, ICC2, ICC
H
L
Not Write/Hi - Z
Write
ICC1, ICC2, ICC
L
X
High - Z
High - Z
ICC1, ICC2, ICC
X
L
High - Z
High - Z
ICC1, ICC2, ICC
H
H
Not selected
L
L
L
L
X
H
X
X
H
L
H
X
Not selected
ISB1, ISB
Note: X = H or L
Capacitance (TA = 25°C, f = 1.0MHz)
Symbol
Parameter
Min.
Max.
Unit
Conditions
CIN*
Input Capacitance
-
6
pF
VIN = 0V
CI/O*
Input/Output Capacitance
-
8
pF
VI/O = 0V
* These parameters are sampled and not 100% tested.
PRELIMINARY
(July, 2000, Version 0.0)
5
AMIC Technology, Inc.
A616316 Series
AC Characteristics (TA = 0°C to +70°C, VCC = 5V±10%)
Symbol
A616316-12
Parameter
A616316-15
Unit
Min.
Max.
Min.
Max.
12
-
15
-
ns
Read Cycle
tRC
Read Cycle Time
tAA
Address Access Time
-
12
-
15
ns
tACE
Chip Enable Access Time
-
12
-
15
ns
tOE
Output Enable to Output Valid
-
6
-
8
ns
tCLZ
Chip Enable to Output in Low Z
3
-
3
-
ns
tOLZ
Output Enable to Output in Low Z
0
-
0
-
ns
tCHZ
Chip Disable Output in High Z
0
6
-
8
ns
tOHZ
Output Disable to Output in High Z
0
6
0
8
ns
tOH
Output Hold from Address Change
3
-
3
-
ns
Write Cycle
tWC
Write Cycle Time
12
-
15
-
ns
tCW
Chip Enable to End of Write
10
-
12
-
ns
tAS
Address Setup Time of Write
0
-
0
-
ns
tAW
Address Valid to End of Write
10
-
12
-
ns
tWP
Write Pulse Width
10
-
12
-
ns
tWR
Write Recovery Time
0
-
0
-
ns
tWHZ
Write to Output in High Z
0
6
0
8
ns
tDW
Data to Write Time Overlap
6
-
7
-
ns
tDH
Data Hold from Write Time
0
-
0
-
ns
tOW
Output Active from End of Write
3
-
3
-
ns
Notes: tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not
referred to output voltage levels.
PRELIMINARY
(July, 2000, Version 0.0)
6
AMIC Technology, Inc.
A616316 Series
Timing Waveforms
(1, 2, 4)
Read Cycle 1
tRC
Address
tAA
tOH
tOH
DOUT
(1, 2, 3)
Read Cycle 2
tRC
Address
tAA
CE
tACE
tCHZ 5
tCLZ 5
tBE
HB, LB
tBLZ 5
tBHZ 5
OE
tOHZ 5
tOE
tOLZ 5
DOUT
Notes:
1. WE is high for Read Cycle.
2. Device is continuously enabled CE = VIL, HB = VIL and, or LB = VIL.
3. Address valid prior to or coincident with CE and ( HB and, or LB ) transition low.
4. OE = VIL.
5. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested.
PRELIMINARY
(July, 2000, Version 0.0)
7
AMIC Technology, Inc.
A616316 Series
Timing Waveforms (continued)
Write Cycle 1
(Write Enable Controlled)
tWC
Address
tWR3
tAW
tCW
CE
tBW
HB, LB
tAS1
tWP2
WE
tDW
tDH
DATA IN
tWHZ 4
tOW
DATA OUT
PRELIMINARY
(July, 2000, Version 0.0)
8
AMIC Technology, Inc.
A616316 Series
Timing Waveforms (continued)
Write Cycle 2
(Chip Enable Controlled)
tWC
Address
tAW
tAS1
tWR3
tCW2
CE
tBW
HB, LB
tWP
WE
tDW
tDH
DATA IN
tWHZ 4
tOW
DATA OUT
PRELIMINARY
(July, 2000, Version 0.0)
9
AMIC Technology, Inc.
A616316 Series
Timing Waveforms (continued)
Write Cycle 3
(Byte Enable Controlled)
tWC
Address
tAW
tCW
CE
tAS1
tWR3
tBW2
HB, LB
tWP
WE
tDH
tDW
DATA IN
tWHZ 4
tOW
DATA OUT
Notes: 1. tAS is measured from the address valid to the beginning of Write.
2. A Write occurs during the overlap (tWP, tBW) of a low CE , WE and ( HB and, or LB ).
3. tWR is measured from the earliest of CE or WE or ( HB and, or LB ) going high to the end of the Write cycle.
4. OE level is high or low.
5. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested.
PRELIMINARY
(July, 2000, Version 0.0)
10
AMIC Technology, Inc.
A616316 Series
AC Test Conditions
Input Pulse Levels
0V to 3.0V
Input Rise And Fall Time
3 ns
Input and Output Timing Reference Levels
1.5 V
Output Load
See Figures 1 and 2
5V
480Ω
I/O
OUTPUT
RL=50Ω
ZO=50Ω
255Ω
5pF*
VT=1.5V
* Including scope and jig.
Figure 1. Output Load
Figure 2. Output Load for tCLZ, tOLZ,
tCHZ, tOHZ, tWHZ, and tOW
Data Retention Characteristics (TA = 0°C to 70°C)
Symbol
VDR
Parameter
VCC for Data Retention
Min.
Max.
Unit
3
5.5
V
ICCDR
Data Retention Current
-
1
mA
tCDR
Chip Disable to Data Retention
Time
0
-
ns
tR
Operation Recovery Time
Conditions
CE ≥ VCC - 0.2V
VCC = 3.0V
CE ≥ VCC - 0.2V
VIN ≥ VCC - 0.2V or
VIN ≤ 0.2V
See Retention Waveform
TRC*
-
ms
tRC = Read Cycle Time
PRELIMINARY
(July, 2000, Version 0.0)
11
AMIC Technology, Inc.
A616316 Series
Low VCC Data Retention Waveform
DATA RETENTION MODE
VCC
4.5V
4.5V
tCDR
tR
VDR ≥ 3V
tVR
VIH
CE
VIH
CE ≥ VDR - 0.2V
Ordering Information
Part No.
Access Time (ns)
Operating Current
Max. (mA)
CMOS Standby
Max. (mA)
12
120
8
A616316S-12
44L SOJ
A616316V-12
44L TSOP(II)
A616316S-15
44L SOJ
15
100
A616316V-15
PRELIMINARY
Package
8
44L TSOP(II)
(July, 2000, Version 0.0)
12
AMIC Technology, Inc.
A616316 Series
Package Information
SOJ 44L Outline Dimensions
unit: inches/mm
D
23
1
22
E1
44
A
A1
A2
C
E
b
b1
Min
0.025"
y
D
e
Seating Plane
Symbol
0.004
Dimensions in inches
E2
R1
y
Dimensions in mm
Min
Nom
Max
Min
Nom
Max
A
0.128
0.138
0.148
3.25
3.51
3.76
A1
0.082
-
-
2.08
-
-
A2
0.105
0.110
0.115
2.67
2.79
2.92
0.51
b
0.015
-
0.020
0.38
-
b1
0.026
0.028
0.032
0.66
0.71
0.81
C
0.007
-
0.013
0.18
-
0.21
D
1.120
1.125
1.130
28.45
28.58
28.70
E
0.435
0.440
0.445
11.05
11.18
11.30
E1
0.394
0.400
0.405
10.01
10.16
10.29
E2
0.370 BSC
e
R1
θ
9.40 BSC
0.050 BSC
0.030
0.035
0°
-
θ
1.27 BSC
0.040
10°
0.76
0.89
1.02
0°
-
10°
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E does not include resin fins.
3. Dimension E1 is for PC Board surface mount pad pitch design
reference only.
PRELIMINARY
(July, 2000, Version 0.0)
13
AMIC Technology, Inc.
A616316 Series
Package Information
TSOP 44L (Type II) Outline Dimensions
unit: inches/mm
E
E1
44
θ
L
L1
1
L
A2
A1
e
D
b
A
c
D
ZD
L1
y
Dimensions in inches
Dimensions in mm
Symbol
Min
Nom
Max
Min
Nom
Max
A
-
-
0.047
-
-
1.20
A1
0.002
-
0.006
0.05
-
0.15
A2
0.037
0.039
0.041
0.95
1.00
1.05
b
0.012
-
0.018
0.30
-
0.45
c
0.005
-
0.008
0.12
-
0.21
D
0.720
0.725
0.730
18.28
18.41
18.54
ZD
E
0.032 REF
0.805 REF
0.455
0.463
0.471
11.56
11.76
11.96
E1
0.395
0.400
0.405
10.03
10.16
10.29
L
0.019
0.023
0.027
0.49
0.59
0.69
L1
0.031 REF
e
0.80 REF
0.031 BSC
0.80 BSC
y
-
-
0.004
-
-
0.10
θ
0°
-
5°
0°
-
5°
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E1 does not include resin fins.
3. Dimension ZD includes end flash.
PRELIMINARY
(July, 2000, Version 0.0)
14
AMIC Technology, Inc.
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