Cypress CY62138VN 256k x 8 static ram Datasheet

CY62138VN MoBL®
256K x 8 Static RAM
Features
Functional Description
• Temperature Ranges
— Industrial: –40°C to 85°C
• Low voltage range:
— 2.7–3.6V
• Ultra-low active power
• Low standby power
• Easy memory expansion with CS1/CS2 and OE features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Offered in standard non-lead-free 36-ball FBGA
package
The CY62138VN is a high-performance CMOS static RAM
organized as 256K words by 8 bits. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life™ (MoBL®) in
portable applications such as cellular telephones. The device
also has an automatic power-down feature that reduces power
consumption by 99% when addresses are not toggling. The
device can be put into standby mode when deselected (CS1
HIGH or CS2 LOW). Writing to the device is accomplished by
taking Chip Enable One (CS1) and Write Enable (WE) inputs
LOW and Chip Enable Two (CS2) HIGH. Data on the eight I/O
pins (I/O0 through I/O7) is then written into the location
specified on the address pins (A0 through A17).Reading from
the device is accomplished by taking Chip Enable One (CS1)
and Output Enable (OE) LOW while forcing Write Enable (WE)
and Chip Enable Two (CS2) HIGH. Under these conditions, the
contents of the memory location specified by the address pins
will appear on the I/O pins.The eight input/output pins (I/O0
through I/O7) are placed in a high-impedance state when the
device is deselected (CS1 HIGH or CS2 LOW), the outputs are
disabled (OE HIGH), or during a write operation (CS1 LOW,
CS2 HIGH, and WE LOW).
PinConfiguration
Logic Block Diagram
FBGA
TOP View
A6
A7
A8
256K x 8
ARRAY
CS 2
4
5
6
A0
A1
CS2
A3
A6
A8
A
I/O4
A2
WE
A4
A7
I/O0
B
NC
A5
I/O1
C
I/O2
VSS
VCC
D
I/O3
VCC
VSS
E
I/O2
F
I/O4
I/O6
I/O5
COLUMN
DECODER
CS1
SENSE AMPS
A5
3
I/O5
I/O1
ROW DECODER
A4
2
I/O0
Data in Drivers
A0
A1
A2
A3
1
POWER
DOWN
A17
I/O6
I/O7
OE
CS1
A16
A15
I/O3
G
I/O7
A9
A10
A11
A12
A13
A14
H
A9
A 10
A 11
A12
A13
A14
A15
A16
A17
WE
NC
OE
Product Portfolio
Power Dissipation (Industrial)
VCC Range
Product
CY62138VN
VCC(min)
2.7V
VCC(typ)
[1]
3.0V
Operating (Icc)
VCC(max)
Speed
Typ.[1]
3.6V
70 ns
7 mA
Standby (ISB2)
Maximum
Typ.[1]
Maximum
15 mA
1 µA
15 µA
Note:
1. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC Typ, TA = 25°C.
Cypress Semiconductor Corporation
Document #: 001-06513 Rev. **
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised February 2, 2006
[+] Feedback
CY62138VN MoBL®
DC Input Voltage[2] ................................ –0.5V to VCC + 0.5V
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current.................................................... > 200 mA
Operating Range
Supply Voltage to Ground Potential ............... –0.5V to +4.6V
DC Voltage Applied to Outputs
in High-Z State[2] ....................................–0.5V to VCC + 0.5V
Device
Range
CY62138VN Industrial
Ambient
Temperature
VCC
–40°C to +85°C
2.7V to 3.6V
Electrical Characteristics Over the Operating Range
CY62138VN
Parameter
Description
Test Conditions
Min.
VOH
Output HIGH Voltage
IOH = -1.0 mA
VCC = 2.7V
VOL
Output LOW Voltage
IOL = 2.1 mA
VCC = 2.7V
VIH
Input HIGH Voltage
VCC = 3.6V
VIL
Input LOW Voltage
VCC = 2.7V
IIX
Input Leakage Current
GND < VI < VCC
–1
IOZ
Output Leakage Current
GND < VO < VCC, Output
Disabled
–1
ICC
VCC Operating Supply
Current
IOUT = 0 mA,
f = fMAX = 1/tRC,
CMOS Levels
VCC = 3.6V
IOUT = 0 mA,
f = 1 MHz,
CMOS Levels
Typ.[1]
Max.
Unit
2.4
V
0.4
V
2.2
VCC + 0.5V
V
–0.5
0.8
V
±1
+1
µA
+1
+1
µA
7
15
mA
1
2
mA
100
µA
15
µA
ISB1
Automatic CE
Power-down Current—
CMOS Inputs
CE > VCC – 0.3V,
VIN > VCC – 0.3V or
VIN < 0.3V, f = fMAX
VCC = 3.6V
ISB2
Automatic CE
Power-down Current—
CMOS Inputs
CE > VCC – 0.3V
VIN > VCC – 0.3V
or VIN < 0.3V, f = 0
VCC = 3.6V
1
Test Conditions
Max.
Unit
6
pF
8
pF
Capacitance[3]
Parameter
Description
CIN
Input Capacitance
COUT
Output Capacitance
TA = 25°C, f = 1 MHz,
VCC = VCC(typ)
Notes:
2. VIL(min) = –2.0V for pulse durations less than 20 ns.
3. Tested initially and after any design or process changes that may affect these parameters.
Document #: 001-06513 Rev. **
Page 2 of 8
[+] Feedback
CY62138VN MoBL®
AC Test Loads and Waveforms
R1
VCC
ALL INPUT PULSES
OUTPUT
VCC Typ
10%
R2
30 pF
90%
10%
90%
GND
< 5 ns
< 5 ns
INCLUDING
JIG AND
SCOPE
Equivalent to:
THÉVENIN EQUIVALENT
RTH
OUTPUT
V
Parameters
Value
Unit
R1
1105
Ohms
R2
1550
Ohms
RTH
645
Ohms
VTH
1.75
Volts
Data Retention Characteristics (Over the Operating Range)
Parameter
Conditions[4]
Description
VDR
VCC for Data Retention
ICCDR
Data Retention Current
tCDR[3]
Chip Deselect to Data
Retention Time
tR
Operation Recovery Time
Min.
Typ.[1]
1.0
VCC = 1.0V
CE > VCC – 0.3V,
VIN > VCC – 0.3V or
VIN < 0.3V
No input may exceed
VCC+0.3V
0.1
Max.
Unit
3.6
V
5
µA
0
ns
100
ms
Data Retention Waveform[5]
DATA RETENTION MODE
VCC
VCC(min.)
tCDR
VDR > 1.0V
VCC(min.)
tR
CE
Notes:
4. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to VCC typ., and output loading of the specified
IOL/IOH and 30-pF load capacitance.
5. CE is the combination of both CS1 and CS2.
Document #: 001-06513 Rev. **
Page 3 of 8
[+] Feedback
CY62138VN MoBL®
Switching Characteristics Over the Operating Range[4]
CY62138VN
Parameter
Description
Min.
Max.
Unit
Read Cycle
tRC
Read Cycle Time
70
tAA
Address to Data Valid
tOHA
Data Hold from Address Change
tACE
CE LOW to Data Valid
70
ns
tDOE
OE LOW to Data Valid
35
ns
OE LOW to Low-Z
tHZOE
OE HIGH to High-Z[6, 7]
CE LOW to
Low-Z[6]
tHZCE
CE HIGH to
High-Z[6, 7]
tPU
CE LOW to Power-up
tPD
CE HIGH to Power-down
tLZCE
Write
70
10
[6]
tLZOE
ns
ns
ns
5
ns
25
10
ns
ns
25
0
ns
ns
70
ns
Cycle[8, 9]
tWC
Write Cycle Time
70
ns
tSCE
CE LOW to Write End
60
ns
tAW
Address Set-up to Write End
60
ns
tHA
Address Hold from Write End
0
ns
tSA
Address Set-up to Write Start
0
ns
tPWE
WE Pulse Width
50
ns
tSD
Data Set-up to Write End
30
ns
tHD
Data Hold from Write End
0
ns
tHZWE
tLZWE
WE LOW to
High-Z[6, 7]
WE HIGH to
Low-Z[6]
25
10
ns
ns
Switching Waveforms
Read Cycle No. 1[10, 11]
tRC
ADDRESS
tOHA
DATA OUT
PREVIOUS DATA VALID
tAA
DATA VALID
Notes:
6. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device.
7. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in (b) of AC Test Loads. Transition is measured ± 500 mV from steady-state voltage.
8. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can
terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
9. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of tHZWE and tSD.
10. Device is continuously selected. OE, CE = VIL.
11. WE is HIGH for read cycle.
Document #: 001-06513 Rev. **
Page 4 of 8
[+] Feedback
CY62138VN MoBL®
Switching Waveforms (continued)
Read Cycle No. 2[5., 11, 12]
tRC
CE
tACE
OE
DATA OUT
tHZOE
tHZCE
tDOE
tLZOE
HIGH IMPEDANCE
HIGH
IMPEDANCE
DATA VALID
tLZCE
VCC
SUPPLY
CURRENT
tPD
tPU
ICC
50%
50%
ISB
Write Cycle No. 1 (WE Controlled)[5, 8, 13, 14]
tWC
ADDRESS
CE
tAW
tHA
tSA
WE
tPWE
OE
tSD
DATA I/O
tHD
DATAIN VALID
NOTE 15
tHZOE
Write Cycle No. 2 (CE Controlled)[5, 8, 13, 14]
tWC
ADDRESS
tSCE
CE
tSA
tAW
tHA
WE
tSD
DATA I/O
tHD
DATAIN VALID
Notes:
12. Address valid prior to or coincident with CE transition LOW.
13. Data I/O is high impedance if OE = VIH.
14. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
15. During this period, the I/Os are in output state and input signals should not be applied.
Document #: 001-06513 Rev. **
Page 5 of 8
[+] Feedback
CY62138VN MoBL®
Switching Waveforms (continued)
Write Cycle No. 3 (WE Controlled, OE LOW)[5, 9, 14]
tWC
ADDRESS
CE
tAW
tHA
tSA
WE
tSD
DATA I/O
tHD
DATAIN VALID
NOTE 15
tLZWE
tHZWE
Typical DC and AC Characteristics
STANDBY CURRENT
vs. AMBIENT TEMPERATURE
1.4
3.0
1.2
2.5
1.0
VCC = VCC typ.
2.0 VIN = VCC typ.
ICC
ISB2 µA
NORMALIZED ICC
NORMALIZED SUPPLY CURRENT
vs. SUPPLY VOLTAGE
0.8
0.6
VIN = VCC typ.
TA = 25°C
0.4
1.0
0.5
0.0
0.2
0.0
1.7
2.2
2.7
3.2
–0.5
−55
3.7
NORMALIZED STANDBY CURRENT
vs. SUPPLY VOLTAGE
NORMALIZED ICC vs. CYCLE TIME
ISB2
0.8
VIN = VCC typ.
0.4
NORMALIZED ICC
1.2
0.6
105
1.50
1.4
1.0
25
AMBIENT TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
NORMALIZED ISB
ISB
1.5
VCC = 3.3V
TA = 25°C
1.00
0.50
0.2
0.0
1.0
0.10
1.9
2.8
3.7
1
5
15
10
CYCLE FREQUENCY (MHz)
SUPPLY VOLTAGE (V)
Document #: 001-06513 Rev. **
Page 6 of 8
[+] Feedback
CY62138VN MoBL®
Truth Table
CS1
H
CS2
X
WE
X
OE
X
Inputs/Outputs
High-Z
Mode
Deselect/Power-down
Power
Standby (ISB)
X
L
X
X
High-Z
Deselect/Power-down
Standby (ISB)
L
H
H
L
Data Out
Read
Active (ICC)
L
H
L
X
Data In
Write
Active (ICC)
L
H
H
H
High-Z
Deselect, Output Disabled
Active (ICC)
Ordering Information
Speed
(ns)
70
Ordering Code
CY62138VNLL-70BAI
Package
Diagram
51-85099
Operating
Range
Package Type
36-ball (7.0 mm × 7.0 mm × 1.2 mm) FBGA
Industrial
Please contact your local Cypress sales representative for availability of other parts
Package Diagram
36-Ball FBGA (7 x 7 x 1.2 mm) (51-85099)
51-85099-*C
More Battery Life is a trademark, and MoBL is a registered trademark, of Cypress Semiconductor. All products and company
names mentioned in this document may be the trademarks of their respective holders.
Document #: 001-06513 Rev. **
Page 7 of 8
© Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
[+] Feedback
CY62138VN MoBL®
Document History Page
Document Title: CY62138VN MoBL® 256K x 8 Static RAM
Document Number: 001-06513
REV.
ECN NO.
Issue Date
Orig. of
Change
**
426504
See ECN
NXR
Document #: 001-06513 Rev. **
Description of Change
New Data Sheet
Page 8 of 8
[+] Feedback
Similar pages