APT80F60J 600V, 84A, 0.055Ω Max, trr ≤ 370ns N-Channel FREDFET S S Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. D G SO 2 T- 27 "UL Recognized" file # E145592 ISOTOP ® D APT80F60J Single die FREDFET G S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI/RFI • PFC and other boost converter • Low RDS(on) • Buck converter • Ultra low Crss for improved noise immunity • Two switch forward (asymmetrical bridge) • Low gate charge • Single switch forward • Avalanche energy rated • Flyback • RoHS compliant • Inverters Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 84 Continuous Drain Current @ TC = 100°C 52 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 3352 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 60 A 1 447 Thermal and Mechanical Characteristics Min Typ Max Unit W PD Total Power Dissipation @ TC = 25°C 961 RθJC Junction to Case Thermal Resistance 0.13 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface TJ,TSTG Operating and Storage Junction Temperature Range VIsolation RMS Voltage (50-60hHz Sinusoidal Waveform from Terminals to Mounting Base for 1 Min.) WT Torque Package Weight -55 150 °C V 2500 1.03 oz 29.2 g 10 in·lbf 1.1 N·m Terminals and Mounting Screws. MicrosemiWebsite-http://www.microsemi.com °C/W 0.15 Rev B 5-2009 Characteristic 050-8175 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter VBR(DSS) Drain-Source Breakdown Voltage ΔVBR(DSS)/ΔTJ Breakdown Voltage Temperature Coefficient RDS(on) Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ΔVGS(th)/ΔTJ Min 600 VGS = 10V, ID = 60A 3 Zero Gate Voltage Drain Current IGSS Gate-Source Leakage Current Dynamic Characteristics VDS = 600V TJ = 25°C VGS = 0V TJ = 125°C Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance Typ Max 0.60 0.042 4 -10 0.055 5 250 1000 ±100 VGS = ±30V Unit V V/°C Ω V mV/°C µA nA TJ = 25°C unless otherwise specified Parameter gfs 2.5 VGS = VDS, ID = 2.5mA Threshold Voltage Temperature Coefficient IDSS Symbol Test Conditions VGS = 0V, ID = 250µA Reference to 25°C, ID = 250µA APT80M60J Min Test Conditions VDS = 50V, ID = 60A VGS = 0V, VDS = 25V f = 1MHz Co(cr) 4 Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Typ Max 117 23994 245 2201 Unit S pF 1170 VGS = 0V, VDS = 0V to 400V Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time tr td(off) tf Current Rise Time Turn-Off Delay Time 606 598 128 251 134 156 408 123 VGS = 0 to 10V, ID = 60A, VDS = 300V Resistive Switching VDD = 400V, ID = 60A RG = 2.2Ω 6 , VGG = 15V Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM VSD Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge Irrm Reverse Recovery Current dv/dt Peak Recovery dv/dt Test Conditions Min Typ D MOSFET symbol showing the integral reverse p-n junction diode (body diode) A 447 S 0.8 370 690 TJ = 25°C TJ = 125°C VDD = 100V TJ = 25°C TJ = 125°C diSD/dt = 100A/µs Unit 84 G ISD = 60A, TJ = 25°C, VGS = 0V ISD = 60A 3 Max TJ = 25°C TJ = 125°C ISD ≤ 60A, di/dt ≤1000A/µs, VDD = 400V, TJ = 125°C 2.6 7.0 14.5 20 V ns µC A 25 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 2.08mH, RG = 2.2Ω, IAS = 60A. Rev B 5-2009 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(cr) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -3.14E-7/VDS^2 + 7.31E-8/VDS + 2.09E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) 050-8175 Microsemi reserves the right to change, without notice, the specifications and information contained herein. APT80F60J 160 350 V GS = 10V T = 125°C 300 TJ = -55°C ID, DRIAN CURRENT (A) GS = 7,8 & 10V 250 200 TJ = 25°C 150 100 TJ = 150°C 120 6V 100 80 60 40 5V 50 20 4.5V TJ = 125°C 0 0 0 5 10 15 20 25 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 0 Figure 2, Output Characteristics 280 NORMALIZED TO VDS> ID(ON) x RDS(ON) MAX. VGS = 10V @ 42A 250µSEC. PULSE TEST @ <0.5 % DUTY CYCLE 240 2.0 ID, DRAIN CURRENT (A) 1.5 1.0 0.5 200 TJ = -55°C 160 TJ = 25°C 120 TJ = 125°C 80 40 0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 3, RDS(ON) vs Junction Temperature 0 120 0 1 2 3 4 5 6 7 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics 20,000 Ciss 10,000 C, CAPACITANCE (pF) TJ = -55°C TJ = 25°C 80 TJ = 125°C 60 40 1000 Coss 100 Crss 20 0 0 16 10 20 30 40 50 60 70 80 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current 100 200 300 400 500 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 12 VDS = 100V 10 VDS = 250V 8 6 VDS = 400V 4 2 0 0 280 ID = 42A 14 0 10 90 100 200 300 400 500 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage ISD, REVERSE DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE 100 VGS, GATE-TO-SOURCE VOLTAGE (V) 8 240 200 160 TJ = 25°C 120 TJ = 150°C 80 40 0 0 0.3 0.6 0.9 1.2 1.5 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage Rev B 5-2009 RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE Figure 1, Output Characteristics 2.5 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 050-8175 ID, DRAIN CURRENT (A) V J 140 APT80F60J 447 447 100 IDM 10 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 100 13µs 100µs Rds(on) 1ms 10ms 100ms DC line 1 0.1 13µs 10 100µs 1ms Rds(on) 10ms TJ = 150°C TC = 25°C 1 100ms DC line Scaling for Different Case & Junction Temperatures: ID = ID(T = 25°C)*(TJ - TC)/125 TJ = 125°C TC = 75°C 1 IDM 0.1 10 100 800 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area C 1 10 100 800 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area D = 0.9 0.20 0.7 0.15 0.5 Note: 0.10 PDM ZθJC, THERMAL IMPEDANCE (°C/W) 0.25 0.3 t2 0.05 t1 = Pulse Duration t 0.1 0 t1 0.05 10-5 Duty Factor D = 1/t2 Peak TJ = PDM x ZθJC + TC SINGLE PULSE 10-4 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration 1.0 SOT-227 (ISOTOP®) Package Outline e3 100% Sn Plated 31.5 (1.240) 31.7 (1.248) 7.8 (.307) 8.2 (.322) r = 4.0 (.157) (2 places) W=4.1 (.161) W=4.3 (.169) H=4.8 (.187) H=4.9 (.193) (4 places) 14.9 (.587) 15.1 (.594) Rev B 5-2009 8.9 (.350) 9.6 (.378) Hex Nut M4 (4 places) 25.2 (0.992) 0.75 (.030) 12.6 (.496) 25.4 (1.000) 0.85 (.033) 12.8 (.504) 4.0 (.157) 4.2 (.165) (2 places) 3.3 (.129) 3.6 (.143) 050-8175 11.8 (.463) 12.2 (.480) 1.95 (.077) 2.14 (.084) * Source 30.1 (1.185) 30.3 (1.193) Drain * Emitter terminals are shorted internally. Current handling capability is equal for either Source terminal. 38.0 (1.496) 38.2 (1.504) * Source Gate Dimensions in Millimeters and (Inches) Microsemi’s products are covered by one or more of U.S. patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 6,939,743, 7,352,045 5,283,201 5,801,417 5,648,283 7,196,634 6,664,594 7,157,886 6,939,743 7,342,262 and foreign patents. US and Foreign patents pending. All Rights Reserved.