AD ADuM2251ARIZ-RL Hot-swappable, dual i2c isolators, 5 kv Datasheet

Hot-Swappable, Dual I2C Isolators, 5 kV
ADuM2250/ADuM2251
Data Sheet
FEATURES
GENERAL DESCRIPTION
Bidirectional I2C communication
Open-drain interfaces
Suitable for hot-swap applications
30 mA current sink capability
1000 kHz operation
3.0 V to 5.5 V supply/logic levels
16-lead SOIC wide body package version (RW-16)
16-lead SOIC wide body enhanced creepage version (RI-16)
High temperature operation: 105°C
Safety and regulatory approvals (RI-16 package)
UL recognition: 5000 V rms for 1 minute per
UL 1577
CSA Component Acceptance Notice #5A
IEC 60601-1: 250 V rms (reinforced)
IEC 60950-1: 400 V rms (reinforced)
VDE Certificate of Conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 846 V peak
The ADuM2250/ADuM22511 are hot-swappable digital
isolators with nonlatching bidirectional communication
channels that are compatible with I2C® interfaces. This
eliminates the need for splitting I2C signals into separate
transmit and receive signals for use with standalone
optocouplers.
APPLICATIONS
Isolated I2C, SMBus, or PMBus Interfaces
Multilevel I2C interfaces
Power supplies
Networking
Power-over-Ethernet
The ADuM2250 provides two bidirectional channels supporting a complete isolated I2C interface. The ADuM2251 provides
one bidirectional channel and one unidirectional channel for
those applications where a bidirectional clock is not required.
The ADuM2250/ADuM2251 contain hot-swap circuitry to
prevent data glitches when an unpowered card is inserted
onto an active bus.
These isolators are based on iCoupler® chip-scale transformer
technology from Analog Devices, Inc. iCoupler is a magnetic
isolation technology with performance, size, power consumption, and functional advantages compared to optocouplers.
The ADuM2250/ADuM2251 integrate iCoupler channels
with semiconductor circuitry to enable a complete, isolated
I2C interface in a small form-factor package.
1
Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329; other patents
pending.
FUNCTIONAL BLOCK DIAGRAMS
GND1 1
16
GND1 1
GND2
16
GND2
NC 2
15
NC
VDD1 3
14
VDD2
ADuM2250
NC 2
15
NC
VDD1 3
14
VDD2
DECODE
ENCODE
13
NC
SDA2
SDA1 5
ENCODE
DECODE
12
SDA2
11
SCL2
SCL1 6
ENCODE
DECODE
11
SCL2
10
NC
GND1 7
10
NC
9
GND2
NC 8
9
GND2
DECODE
ENCODE
13
NC
SDA1 5
ENCODE
DECODE
12
SCL1 6
DECODE
ENCODE
GND1 7
ENCODE
DECODE
NC 8
NC = NO CONNECT
06670-001
NC 4
NC 4
Figure 1. ADuM2250 Functional Block Diagram
NC = NO CONNECT
06670-002
ADuM2251
Figure 2. ADuM2251 Functional Block Diagram
Rev. A
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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Fax: 781.461.3113 ©2007–2011 Analog Devices, Inc. All rights reserved.
ADuM2250/ADuM2251
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics ...............................................................................7
General Description ......................................................................... 1
Recommended Operating Conditions .......................................7
Functional Block Diagrams ............................................................. 1
Absolute Maximum Ratings ............................................................8
Revision History ............................................................................... 2
ESD Caution...................................................................................8
Specifications..................................................................................... 3
Pin Configuration and Function Descriptions..............................9
Electrical Characteristics ............................................................. 3
Applications Information .............................................................. 10
Test Conditions ............................................................................. 5
Functional Description .............................................................. 10
Package Characteristics ............................................................... 6
Startup .......................................................................................... 11
Regulatory Information ............................................................... 6
Magnetic Field Immunity............................................................. 11
Insulation and Safety-Related Specifications ............................ 6
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 13
REVISION HISTORY
9/11—Rev. 0 to Rev. A
Added 16-Lead SOIC ......................................................... Universal
Changes to Features Section and Endnote 1 ................................. 1
Changes to Table 4 and Table 5 ....................................................... 6
Changes to Endnote 1 in Table 7 .................................................... 7
Changes to Functional Description Section and Figure 7 ........ 10
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 13
4/07—Revision 0: Initial Version
Rev. A | Page 2 of 16
Data Sheet
ADuM2250/ADuM2251
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
DC Specifications
All voltages are relative to their respective ground. All minimum/maximum specifications apply over the entire recommended operating
range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = 5 V, and VDD2 = 5 V, unless otherwise noted.
Table 1.
Parameter
ADuM2250
Input Supply Current, Side 1, 5 V
Input Supply Current, Side 2, 5 V
Input Supply Current, Side 1, 3.3 V
Input Supply Current, Side 2, 3.3 V
ADuM2251
Input Supply Current, Side 1, 5 V
Input Supply Current, Side 2, 5 V
Input Supply Current, Side 1, 3.3 V
Input Supply Current, Side 2, 3.3 V
LEAKAGE CURRENTS
SIDE 1 LOGIC LEVELS
Logic Input Threshold 1
Logic Low Output Voltages
Input/Output Logic Low Level Difference 2
SIDE 2 LOGIC LEVELS
Logic Low Input Voltage
Logic High Input Voltage
Logic Low Output Voltage
1
2
Symbol
Typ
Max
Unit
Test Conditions
IDD1
IDD2
IDD1
IDD2
2.8
2.7
1.9
1.7
5.0
5.0
3.0
3.0
mA
mA
mA
mA
VDD1 = 5 V
VDD2 = 5 V
VDD1 = 3.3 V
VDD2 = 3.3 V
IDD1
IDD2
IDD1
IDD2
IISDA1, IISDA2, IISCL1, IISCL2
2.8
2.5
1.8
1.6
0.01
6.0
4.7
3.0
2.8
10
mA
mA
mA
mA
µA
VDD1 = 5 V
VDD2 = 5 V
VDD1 = 3.3 V
VDD2 = 3.3 V
VSDA1 = VDD1, VSDA2 = VDD2,
VSCL1 = VDD1, VSCL2 = VDD2
700
900
850
mV
mV
mV
mV
0.3 × VDD2
V
V
mV
VSDA1IL, VSCL1IL
VSDA1OL, VSCL1OL
ΔVSDA1, ΔVSCL1
VSDA2IL, VSCL2IL
VSDA2IH, VSCL2IH
VSDA2OL, VSCL2OL
Min
500
600
600
50
0.7 × VDD2
400
ISDA1 = ISCL1 = 3.0 mA
ISDA1 = ISCL1 = 0.5 mA
ISDA2 = ISCL2 = 30 mA
VIL < 0.5 V, VIH > 0.7 V.
ΔVS1L = VS1OL – VS1IL. This is the minimum difference between the output logic low level and the input logic low threshold within a given component. This ensures that
there is no possibility of the part latching up the bus to which it is connected.
Rev. A | Page 3 of 16
ADuM2250/ADuM2251
Data Sheet
AC Specifications
All voltages are relative to their respective ground. All minimum/maximum specifications apply over the entire recommended operating
range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = 5 V, and VDD2 = 5 V, unless otherwise noted. See Figure 3
for a timing test diagram.
Table 2.
Parameter
MAXIMUM FREQUENCY
OUTPUT FALL TIME
5 V Operation
Symbol
tf1
tf2
Side 1 Output (0.9 VDD1 to 0.9 V)
Side 2 Output (0.9 VDD2 to 0.1 VDD2)
PROPAGATION DELAY
5 V Operation
tf1
tf2
Max
Unit
kHz
Test Conditions
13
32
26
52
120
120
ns
ns
3.0 V ≤ VDD1, VDD2 ≤ 3.6 V, CL1 = 40 pF,
R1 = 1.0 kΩ, CL2 = 400 pF, R2 = 120 Ω
13
32
32
61
120
120
ns
ns
4.5 V ≤ VDD1, VDD2 ≤ 5.5 V, CL1 = CL2 = 0 pF,
R1 = 1.6 kΩ, R2 = 180 Ω
Side 1 to Side 2, Rising Edge 1
Side 1 to Side 2, Falling Edge 2
Side 2 to Side 1, Rising Edge 3
Side 2 to Side 1, Falling Edge 4
3 V Operation
tPLH12
tPHL12
tPLH21
tPHL21
Side 1 to Side 2, Rising Edge1
Side 1 to Side 2, Falling Edge2
Side 2 to Side 1, Rising Edge3
Side 2 to Side 1, Falling Edge4
PULSE-WIDTH DISTORTION
5 V Operation
tPLH12
tPHL12
tPLH21
tPHL21
Side 1 to Side 2, |tPLH12 − tPHL12|
Side 2 to Side 1, |tPLH21 − tPHL21|
COMMON-MODE TRANSIENT IMMUNITY 5
Typ
4.5 V ≤ VDD1, VDD2 ≤ 5.5 V, CL1 = 40 pF,
R1 = 1.6 kΩ, CL2 = 400 pF, R2 = 180 Ω
Side 1 Output (0.9 VDD1 to 0.9 V)
Side 2 Output (0.9 VDD2 to 0.1 VDD2)
3 V Operation
Side 1 -to Side 2, |tPLH12 − tPHL12|
Side 2 to Side 1, |tPLH21 − tPHL21|
3 V Operation
Min
1000
95
162
31
85
130
275
70
155
ns
ns
ns
ns
3.0 V ≤ VDD1, VDD2 ≤ 3.6 V, CL1 = CL2 = 0 pF,
R1 = 1.0 kΩ, R2 = 120 Ω
82
196
32
110
125
340
75
210
ns
ns
ns
ns
4.5 V ≤ VDD1, VDD2 ≤ 5.5 V, CL1 = CL2 = 0 pF,
R1 = 1.6 kΩ, R2 = 180 Ω
PWD12
PWD21
67
54
145
85
ns
ns
3.0 V ≤ VDD1, VDD2 ≤ 3.6 V, CL1 = CL2 = 0 pF,
R1 = 1.0 kΩ, R2 = 120 Ω
PWD12
PWD21
|CMH|, |CML|
25
114
77
35
215
135
ns
ns
kV/µs
tPLH12 propagation delay is measured from the Side 1 input logic threshold to an output value of 0.7 VDD2.
tPHL12 propagation delay is measured from the Side 1 input logic threshold to an output value of 0.4 V.
tPLH21 propagation delay is measured from the Side 2 input logic threshold to an output value of 0.7 VDD1.
4
tPHL21 propagation delay is measured from the Side 2 input logic threshold to an output value of 0.9 V.
5
CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
1
2
3
Rev. A | Page 4 of 16
Data Sheet
ADuM2250/ADuM2251
TEST CONDITIONS
NC
VDD1
R1
R1
NC
SDA1
SCL1
CL1
CL1
GND1
NC
1
2
16
ADuM2250
15
14
3
4
DECODE
ENCODE
13
5
ENCODE
DECODE
12
6
DECODE
ENCODE
11
7
ENCODE
DECODE
10
GND2
NC
VDD2
NC
9
NC = NO CONNECT
Figure 3. Timing Test Diagram
Rev. A | Page 5 of 16
R2
CL2
CL2
SCL2
NC
8
R2
SDA2
GND2
06670-005
GND1
ADuM2250/ADuM2251
Data Sheet
PACKAGE CHARACTERISTICS
Table 3.
Parameter
Resistance (Input to Output) 1
Capacitance (Input to Output)1
Input Capacitance
IC Junction-to-Ambient Thermal Resistance
1
Symbol
RI-O
CI-O
CI
θJA
Min
Typ
1012
2.2
4.0
45
Max
Unit
Ω
pF
pF
°C/W
Test Conditions
f = 1 MHz
Thermocouple located at center of
package underside
The device is considered a 2-terminal device; Pin 1 to Pin 8 are shorted together, and Pin 9 to Pin 16 are shorted together.
REGULATORY INFORMATION
The ADuM2250/ADuM2251 is approved by the following organizations.
Table 4.
UL
Recognized under 1577
Component Recognition
Program 1
Single Protection
5000 V rms Isolation Voltage
File E214100
1
2
CSA
Approved under CSA Component
Acceptance Notice #5A
VDE
Certified according to DIN V VDE V 0884-10
(VDE V 0884-10): 2006-12 2
Basic insulation per CSA 60950-1-07 and IEC 60950-1, 600 V
rms (848 V peak) maximum working voltage
RW-16 package.
Reinforced insulation per CSA 60950-1-07 and IEC 60950-1,
380 V rms (537 V peak) maximum working voltage; reinforced
insulation per IEC 60601-1 125 V rms (176 V peak) maximum
working voltage
RI-16 package
Reinforced insulation per CSA 60950-1-07 and IEC 60950-1,
400 V rms (565 V peak) maximum working voltage; reinforced
insulation per IEC 60601-1 250 V rms (353 V peak) maximum
working voltage.
File 205078
Reinforced insulation, 846 V peak
File 2471900-4880-0001
In accordance with UL1577, each ADuM225x is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second (current leakage detection limit = 10 µA).
In accordance with DIN V VDE V 0884-10, each ADuM225x is proof tested by applying an insulation test voltage ≥1590 V peak for 1 sec (partial discharge detection
limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 5.
Parameter
Rated Dielectric Insulation Voltage
Minimum External Air Gap
Symbol
L(I01)
Value
5000
8.0 min
Unit
V rms
mm
Minimum External Tracking (Creepage) RW-16 Package
L(I02)
7.7 min
mm
Minimum External Tracking (Creepage) RI-16 Package
L(I02)
8.3 min
mm
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
Isolation Group
CTI
0.017 min
>175
IIIa
mm
V
Rev. A | Page 6 of 16
Conditions
1-minute duration
Distance measured from input terminals to output
terminals, shortest distance through air along the
PCB mounting plane, as an aid to PC board layout
Measured from input terminals to output
terminals, shortest distance path along body
Measured from input terminals to output
terminals, shortest distance path along body
Insulation distance through insulation
DIN IEC 112/VDE 0303 Part 1
Material Group (DIN VDE 0110, 1/89, Table 1)
Data Sheet
ADuM2250/ADuM2251
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS
Note that the * marking on the package denotes DIN V VDE V 0884-10 approval for a 848 V peak working voltage. This isolator is
suitable for reinforced isolation only within the safety limit data. Maintenance of the safety data is ensured by protective circuits.
Table 6.
Description
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 300 V rms
For Rated Mains Voltage ≤ 450 V rms
For Rated Mains Voltage ≤ 600 V rms
Climatic Classification
Pollution Degree (DIN VDE 0110, Table 1)
Maximum Working Insulation Voltage
Input-to-Output Test Voltage, Method b1
Input-to-Output Test Voltage, Method a
After Environmental Tests Subgroup 1
After Input and/or Safety Test Subgroup 2
and Subgroup 3
Highest Allowable Overvoltage
Safety-Limiting Values
VIORM × 1.875 = VPR, 100% production test, tm = 1 sec,
partial discharge < 5 pC
Symbol
Characteristic
Unit
VIORM
VPR
I to IV
I to II
I to II
40/105/21
2
846
1590
V peak
V peak
1375
1018
V peak
V peak
VTR
6000
V peak
TS
IS
RS
150
555
>109
°C
mA
Ω
VPR
VIORM × 1.6 = VPR, tm = 60 sec, partial discharge < 5 pC
VIORM × 1.2 = VPR, tm = 60 sec, partial discharge < 5 pC
Transient overvoltage, tTR = 10 seconds
Maximum value allowed in the event of a failure;
see Figure 4
IDD1 + IDD2
VIO = 500 V
600
RECOMMENDED OPERATING CONDITIONS
500
Table 7.
Parameter
Operating Temperature
Supply Voltages 1
Input/Output Signal Voltage
400
300
Capacitive Load, Side 1
Capacitive Load, Side 2
Static Output Loading, Side 1
Static Output Loading, Side 2
200
100
0
0
50
100
150
AMBIENT TEMPEARTURE (°C)
200
06670-003
SAFE OPERATING VDD1 CURRENT (mA)
Case Temperature
Supply Current
Insulation Resistance at TS
Conditions
1
Symbol
TA
VDD1, VDD2
VSDA1, VSCL1,
VSDA2, VSCL2
CL1
CL2
ISDA1, ISCL1
ISDA2, ISCL2
All voltages are relative to their respective ground.
Figure 4. Thermal Derating Curve, Dependence of Safety-Limiting Values on
Case Temperature, per DIN V VDE V 0884-10
Rev. A | Page 7 of 16
Min
−40
3.0
0.5
0.5
Max
+105
5.5
5.5
Unit
°C
V
V
40
400
3
30
pF
pF
mA
mA
ADuM2250/ADuM2251
Data Sheet
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 8.
Parameter
Storage Temperature
Ambient Operating
Temperature
Supply Voltages1
Input/Output Voltage,1
Side 1
Input/Output Voltage,1
Side 2
Average Output Current,
per Pin2
Average Output Current,
per Pin2
Common-Mode
Transients3
1
2
3
Symbol
TST
TA
Min
−65
−40
Max
+150
+105
Unit
°C
°C
VDD1, VDD2
VSDA1, VSCL1
−0.5
−0.5
+7.0
VDD1 + 0.5
V
V
VSDA2, VSCL2
−0.5
VDD2 + 0.5
V
IO1
−18
+18
mA
IO2
−100
+100
mA
−100
+100
kV/µs
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
All voltages are relative to their respective ground.
See Figure 4 for maximum rated current values for various temperatures.
Refers to common-mode transients across the insulation barrier. Commonmode transients exceeding the absolute maximum rating may cause latchup or permanent damage.
Rev. A | Page 8 of 16
Data Sheet
ADuM2250/ADuM2251
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND1* 1
16
GND2*
NC 2
15
NC
14
VDD2
13
NC
12
SDA2
11
SCL2
GND1* 7
10
NC
NC 8
9
GND2*
VDD1 3
NC 4
SDA1 5
SCL1 6
ADuM2250/
ADuM2251
TOP VIEW
(Not to Scale)
06670-004
NC = NO CONNECT
*PIN 1 AND PIN 7 ARE INTERNALLY CONNECTED. CONNECTING BOTH TO
GND1 IS RECOMMENDED. PIN 9 AND PIN 16 ARE INTERNALLY CONNECTED.
CONNECTING BOTH TO GND2 IS RECOMMENDED.
Figure 5. Pin Configuration
Table 9. ADuM2250 Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
GND1
NC
VDD1
NC
SDA1
SCL1
GND1
NC
GND2
NC
SCL2
SDA2
NC
VDD2
NC
GND2
Description
Ground 1. Ground reference for Isolator Side 1.
No Connect.
Supply Voltage, 3.0 V to 5.5 V.
No Connect.
Data Input/Output, Side 1.
Clock Input/Output, Side 1.
Ground 1. Ground reference for Isolator Side 1.
No Connect.
Ground 2. Isolated ground reference for Isolator Side 2.
No Connect.
Clock Input/Output, Side 2.
Data Input/Output, Side 2.
No Connect.
Supply Voltage, 3.0 V to 5.5 V.
No Connect.
Ground 2. Isolated ground reference for Isolator Side 2.
Table 10. ADuM2251 Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
GND1
NC
VDD1
NC
SDA1
SCL1
GND1
NC
GND2
NC
SCL2
SDA2
NC
VDD2
NC
GND2
Description
Ground 1. Ground reference for Isolator Side 1.
No Connect.
Supply Voltage, 3.0 V to 5.5 V.
No Connect.
Data Input/Output, Side 1.
Clock Input, Side 1.
Ground 1. Ground reference for Isolator Side 1.
No Connect.
Ground 2. Isolated ground reference for Isolator Side 2.
No Connect.
Clock Output, Side 2.
Data Input/Output, Side 2.
No Connect.
Supply Voltage, 3.0 V to 5.5 V.
No Connect.
Ground 2. Isolated ground reference for Isolator Side 2.
Rev. A | Page 9 of 16
ADuM2250/ADuM2251
Data Sheet
APPLICATIONS INFORMATION
2
Both the Side 1 and the Side 2 I C pins are designed to interface
to an I2C bus operating in the 3.0 V to 5.5 V range. A logic low
on either side causes the corresponding I/O pin across the
coupler to be pulled low enough to comply with the logic low
threshold requirements of other I2C devices on the bus. Bus
contention and latch-up is avoided by guaranteeing that the
input low threshold at SDA1 or SCL1 is at least 50 mV less than
the output low signal at the same pin. This prevents an output
logic low at Side 1 being transmitted back to Side 2 and pulling
down the I2C bus by latching the state.
Because the Side 2 logic levels/thresholds and drive capabilities
comply fully with standard I2C values, multiple ADuM2250/
ADuM2251 devices connected to a bus by their Side 2 pins
can communicate with each other and with other devices
having I2C compatibility as shown in Figure 7. Note the
distinction between I2C compatibility and I2C compliance.
I2C compatibility refers to situations in which the logic levels
or drive capability of a component do not necessarily meet the
requirements of the I2C specification but still allow the component to communicate with an I2C-compliant device. I2C
compliance refers to situations in which the logic levels and
drive capability of a component fully meet the requirements
of the I2C specification.
Because the Side 1 pin has a modified output level/input threshold, Side 1 of the ADuM2250/ADuM2251 can only communicate
with devices fully compliant with the I2C standard. In other
words, Side 2 of the ADuM2250/ADuM2251 is I2C-compliant
while Side 1 is only I2C-compatible.
The Side 1 I/O pins must not be connected to other I2C
buffers that implement a similar scheme of dual I/O threshold
detection. This latch-up prevention scheme is implemented in
several popular I2C level shifting and bus extension products
currently available from Analog Devices and other manufacturers. Care should be taken to review the data sheet of
potential I2C bus buffering products to ensure that only one
buffer on a bus segment implements a dual threshold scheme.
A bus segment is a portion of the I2C bus that is isolated from
Table 11. ADuM225x Buffer Compatibility
Side 1
No
Yes
Side 1
Side 2
Side 2
Yes
Yes
The output logic low levels are independent of the VDD1 and
VDD2 voltages. The input logic low threshold at Side 1 is also
independent of VDD1. However, the input logic low threshold at
Side 2 is designed to be at 0.3 VDD2, consistent with I2C requirements. The Side 1 and Side 2 I/O pins have open-collector
outputs whose high levels are set via pull-up resistors to their
respective supply voltages.
GND1
NC
VDD1
NC
SDA1
SCL1
GND1
NC
16
1
2
ADuM2250
15
14
3
4
DECODE
ENCODE
13
5
ENCODE
DECODE
12
6
DECODE
ENCODE
11
7
ENCODE
DECODE
10
9
8
GND2
NC
VDD2
NC
SDA2
SCL2
NC
GND2
SYMBOL INDICATES A DUAL THRESHOLD INPUT BUFFER.
06670-006
The ADuM2250/ADuM2251 interface on each side to I2C signals. Internally, the bidirectional I2C signals are split into two
unidirectional channels communicating in opposite directions
via dedicated iCoupler isolation channels. One channel of each
pair (the Side 1 input of each I/O pin in Figure 6) implements
a special input buffer and output driver that can differentiate
between externally generated inputs and its own output signals.
It only transfers externally generated input signals to the
corresponding Side 2 data or clock pin.
other portions of the bus by galvanic isolation, bus extenders, or
level shifting buffers. Table 11 shows how multiple ADuM2250/
ADuM2251 components can coexist on a bus as long as two
Side 1 buffers are not connected to the same bus segment.
NC = NO CONNECT
Figure 6. ADuM2250 Block Diagram
Figure 7 shows a typical application circuit including the pull-up
resistors required for both Side 1 and Side 2 busses. Bypass capacitors
of between 0.1 pF and 0.01 pF are required between VDD1 to
GND1 and VDD2 to GND2. The 200 Ω resistor shown in Figure 7
is required for latch-up immunity if the ambient temperature
can be between 105°C and 125°C.
I2C BUS
16
1
OPTIONAL
200Ω
µCPU
VDD1
OR
SECONDARY
SDA1
BUS
SCK1
SEGMENT
Rev. A | Page 10 of 16
GND1
2
ADuM2250
15
3
14
4
13
5
12
6
11
7
10
8
9
VDD2
SDA2
SCK2
GND2
Figure 7. Typical Isolated I2C Interface Using ADuM2250
06670-007
FUNCTIONAL DESCRIPTION
Data Sheet
ADuM2250/ADuM2251
STARTUP
Both the VDD1 and VDD2 supplies have an under voltage lockout
feature that prevents the signal channels from operating unless
certain criteria is met. This feature is to avoid the possibility of
input logic low signals from pulling down the I2C bus inadvertently during power-up/power-down.
Criteria that must be met for the signal channels to be enabled
are as follows:
Both supplies must be at least 2.5 V.
At least 40 μs must elapse after both supplies exceed the
internal start-up threshold of 2.0 V.
MINIMUM RECOMMENDED
OPERATING SUPPLY, 3.0V
SUPPLY VALID
MINIMUM VALID SUPPLY, 2.5V
06670-008
INTERNAL STARTUP
THRESHOLD, 2.0V
40µs
where:
β is the magnetic flux density (gauss).
rn is the radius of the nth turn in the receiving coil (cm).
N is the number of turns in the receiving coil.
Given the geometry of the receiving coil in the ADuM2250/
ADuM2251 and an imposed requirement that the induced
voltage be at most 50% of the 0.5 V margin at the decoder, a
maximum allowable magnetic field is calculated, as shown in
Figure 10.
100
MAXIMUM ALLOWABLE MAGNETIC FLUX
DENSITY (kgauss)
Until both of these criteria are met for both supplies, the
ADuM2250/ADuM2251 outputs are pulled high thereby
ensuring a startup that avoids any disturbances on the bus.
Figure 8 and Figure 9 illustrate the supply conditions for fast
and slow input supply slew rates.
V  (dβ / dt )  rn2 ; n  1, 2, ... N
10
1
0.1
0.01
Figure 8. Start-Up Condition, Supply Slew Rate < 12.5 V/ms
0.001
1k
10k
100k
1M
10M
MAGNETIC FIELD FREQUENCY (Hz)
100M
06670-010


The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V,
therefore establishing a 0.5 V margin in which induced voltages
can be tolerated. The voltage induced across the receiving coil is
given by
Figure 10. Maximum Allowable External Magnetic Flux Density
MINIMUM RECOMMENDED
OPERATING SUPPLY, 3.0V
SUPPLY VALID
MINIMUM VALID SUPPLY, 2.5V
40µs
06670-009
INTERNAL STARTUP
THRESHOLD, 2.0V
Figure 9. Start-Up Condition, Supply Slew Rate > 12.5 V/ms
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kgauss induces a
voltage of 0.25 V at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event were to occur during a transmitted
pulse (and had the worst-case polarity), it would reduce the
received pulse from >1.0 V to 0.75 V (still well above the 0.5 V
sensing threshold of the decoder).
MAGNETIC FIELD IMMUNITY
The ADuM2250/ADuM2251 are extremely immune to external
magnetic fields. The limitation on the magnetic field immunity
of the ADuM2250/ADuM2251 is set by the condition in which
induced voltage in the receiving coil of the transformer is sufficiently large to either falsely set or reset the decoder. The following
analysis defines the conditions under which this may occur.
The 3 V operating condition of the ADuM2250/ADuM2251 is
examined because it represents the most susceptible mode of
operation.
Rev. A | Page 11 of 16
ADuM2250/ADuM2251
Data Sheet
Rev. A | Page 12 of 16
DISTANCE = 1m
100
10
DISTANCE = 100mm
1
DISTANCE = 5mm
0.1
0.01
1k
10k
100k
1M
10M
MAGNETIC FIELD FREQUENCY (Hz)
Figure 11. Maximum Allowable Current for Various
Current-to-ADuM2250/ADuM2251 Spacings
100M
06670-011
Note that at combinations of strong magnetic fields and high
frequencies, any loops formed by printed circuit board traces
could induce sufficiently large error voltages to trigger the
threshold of succeeding circuitry. Care should be taken in
the layout of such traces to avoid this possibility.
1000
MAXIMUM ALLOWABLE CURRENT (kA)
The preceding magnetic flux density values correspond to
specific current magnitudes at given distances away from
the ADuM2250/ADuM2251 transformers. Figure 11 expresses
these allowable current magnitudes as a function of frequency
for selected distances. As seen, the ADuM2250/ADuM2251 is
extremely immune and can be affected only by extremely large
currents operated at high frequency and very close to the component. For the 1 MHz example, place a 0.5 kA current 5 mm
away from the ADuM2250/ADuM2251 to affect the operation
of the component.
Data Sheet
ADuM2250/ADuM2251
OUTLINE DIMENSIONS
10.50 (0.4134)
10.10 (0.3976)
9
16
7.60 (0.2992)
7.40 (0.2913)
1
10.65 (0.4193)
10.00 (0.3937)
8
1.27 (0.0500)
BSC
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
0.75 (0.0295)
45°
0.25 (0.0098)
2.65 (0.1043)
2.35 (0.0925)
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
8°
0°
1.27 (0.0500)
0.40 (0.0157)
0.33 (0.0130)
0.20 (0.0079)
03-27-2007-B
COMPLIANT TO JEDEC STANDARDS MS-013-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 12. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body (RW-16)
Dimensions shown in millimeters (inches)
13.00 (0.5118)
12.60 (0.4961)
16
9
7.60 (0.2992)
7.40 (0.2913)
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
8
10.65 (0.4193)
10.00 (0.3937)
2.65 (0.1043)
2.35 (0.0925)
1.27
(0.0500)
BSC
0.51 (0.0201)
0.31 (0.0122)
0.75 (0.0295)
45°
0.25 (0.0098)
8°
0°
SEATING
PLANE
0.33 (0.0130)
0.20 (0.0079)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-013-AC
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
10-12-2010-A
1
Figure 13. 16-Lead Standard Small Outline Package, with Increased Creepage [SOIC_IC]
Wide Body (RI-16-1)
Dimension shown in millimeters and (inches)
ORDERING GUIDE
Model1
ADuM2250ARWZ
ADuM2250ARWZ-RL
ADuM2250ARIZ
ADuM2250ARIZ-RL
ADuM2251ARWZ
ADuM2251ARWZ-RL
ADuM2251ARIZ
ADuM2251ARIZ-RL
1
Number of
Inputs, VDD1 Side
2
2
2
2
2
2
2
2
Number of
Inputs, VDD2 Side
2
2
2
2
1
1
1
1
Maximum
Data Rate
(Mbps)
1
1
1
1
1
1
1
1
Z = RoHS Compliant Part.
Rev. A | Page 13 of 16
Temperature
Range
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
Package Description
16-Lead SOIC_W
16-Lead SOIC_W, 13” Reel
16-Lead SOIC_IC
16-Lead SOIC_IC, 13” Reel
16-Lead SOIC_W
16-Lead SOIC_W, 13” Reel
16-Lead SOIC_IC
16-Lead SOIC_IC, 13” Reel
Package
Option
RW-16
RW-16
RI-16-1
RI-16-1
RW-16
RW-16
RI-16-1
RI-16-1
ADuM2250/ADuM2251
Data Sheet
NOTES
Rev. A | Page 14 of 16
Data Sheet
ADuM2250/ADuM2251
NOTES
Rev. A | Page 15 of 16
ADuM2250/ADuM2251
Data Sheet
NOTES
©2007–2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06670-0-9/11(A)
Rev. A | Page 16 of 16
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