AOSMD AO6801E 30v dual p-channel mosfet Datasheet

AO6801E
30V Dual P-Channel MOSFET
General Description
Product Summary
The AO6801E combines advanced trench MOSFET
technology with a low resistance package to provide
extremely low RDS(ON). This device is ideal for load switch
and battery protection applications.
ID (at VGS=-10V)
-2A
RDS(ON) (at VGS=-10V)
< 110mΩ
VDS
-30V
RDS(ON) (at VGS=-4.5V)
< 135mΩ
RDS(ON) (at VGS=-2.5V)
< 185mΩ
Typical ESD protection
HBM Class 1C
TSOP6
Top View
D1
Bottom View
D2
Top View
G1
1
6
S2
2
5
S1
G2
3
4
D2
D1
G1
G2
S1
S2
Pin1
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
Continuous Drain
Current
VGS
TA=25°C
Pulsed Drain Current C
Junction and Storage Temperature Range
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Lead
Rev 0: April 2012
Steady-State
Steady-State
A
0.70
W
0.45
TJ, TSTG
Symbol
t ≤ 10s
V
-15
PD
TA=70°C
±12
-1.6
IDM
TA=25°C
Power Dissipation B
Units
V
-2.0
ID
TA=70°C
Maximum
-30
RθJA
RθJL
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-55 to 150
Typ
150
185
150
°C
Max
180
230
180
Units
°C/W
°C/W
°C/W
Page 1 of 5
AO6801E
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
Drain-Source Breakdown Voltage
BVDSS
IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=-250µA, VGS=0V
-30
-1
TJ=55°C
-5
Gate-Body leakage current
VDS=0V, VGS=±12V
VGS(th)
Gate Threshold Voltage
VDS=VGS, ID=-250µA
-0.7
ID(ON)
On state drain current
VGS=-10V, VDS=-5V
-15
VGS=-10V, ID=-2A
Static Drain-Source On-Resistance
TJ=125°C
90
110
129
158
A
mΩ
135
mΩ
mΩ
VDS=-5V, ID=-2A
IS
Maximum Body-Diode Continuous Current
DYNAMIC PARAMETERS
Input Capacitance
Ciss
Gate resistance
V
185
IS=-1A,VGS=0V
Rg
µA
-1.5
105
Diode Forward Voltage
Output Capacitance
±10
-1.05
140
Forward Transconductance
Reverse Transfer Capacitance
µA
VGS=-2.5V, ID=-1A
VSD
Coss
Units
VGS=-4.5V, ID=-1.5A
gFS
Crss
Max
V
VDS=-30V, VGS=0V
IGSS
RDS(ON)
Typ
VGS=0V, VDS=-15V, f=1MHz
7
-0.78
S
-1
V
-1
A
305
pF
42
pF
26
pF
8.5
17
Ω
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
7
12
nC
Qg(4.5V) Total Gate Charge
3.5
6
nC
Qgs
Gate Source Charge
VGS=0V, VDS=0V, f=1MHz
VGS=-10V, VDS=-15V, ID=-2A
0.7
nC
Qgd
Gate Drain Charge
1.2
nC
tD(on)
Turn-On DelayTime
6
ns
tr
Turn-On Rise Time
4
ns
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
Qrr
VGS=-10V, VDS=-15V, RL=7.5Ω,
RGEN=3Ω
23
ns
7
ns
IF=-2A, dI/dt=500A/µs
9.5
Body Diode Reverse Recovery Charge IF=-2A, dI/dt=500A/µs
13.5
ns
nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25°C.
D. The RθJA is the sum of the thermal impedance from junction to lead RθJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedance which is measured with the device mounted on 1in2 FR-4 board with
2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 0: April 2012
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Page 2 of 5
AO6801E
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
15
10
-10V
VDS=-5V
-4.5V
8
-6V
10
-ID(A)
-ID (A)
6
-2.5V
4
125°C
5
2
25°C
VGS=-2.0V
0
0
0
1
2
3
4
0
5
200
Normalized On-Resistance
VGS=-2.5V
160
RDS(ON) (mΩ
Ω)
2
3
4
1.8
180
140
VGS=-4.5V
120
100
80
VGS=-10V
VGS=-10V
ID=-2A
1.6
VGS=-4.5V
ID=-1.5A
1.4
17
5
2
VGS=-2.5V
10
1.2
ID=-1A
1
0.8
60
0
0
2
4
6
8
-ID (A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
25
50
75
100
125
150
175
0
Temperature (°C)
Figure 4: On-Resistance vs. Junction
18Temperature
(Note E)
260
1.0E+01
ID=-2A
240
1.0E+00
220
40
200
1.0E-01
180
160
125°C
-IS (A)
RDS(ON) (mΩ
Ω)
1
-VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
-VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
125°C
1.0E-02
140
1.0E-03
120
100
25°C
1.0E-04
80
25°C
60
0
6
8
10
-VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev 0: April 2012
2
1.0E-05
4
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0.0
0.2
0.4
0.6
0.8
1.0
1.2
-VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
Page 3 of 5
AO6801E
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
500
VDS=-15V
ID=-2A
450
Ciss
400
350
Capacitance (pF)
-VGS (Volts)
8
6
4
300
250
200
150
2
Coss
100
50
0
Crss
0
0
2
4
6
Qg (nC)
Figure 7: Gate-Charge Characteristics
8
0
100.0
5
10
15
20
25
-VDS (Volts)
Figure 8: Capacitance Characteristics
30
100
TA=25°C
-ID (Amps)
RDS(ON)
limited
100µs
1.0
1ms
Power (W)
10µs
10.0
10ms
0.1
TJ(Max)=150°C
TA=25°C
1
10s
DC
0.0
0.01
0.1
10
1
-VDS (Volts)
0.1
10
1E-05
100
0.001
0.1
10
1000
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F)
Figure 9: Maximum Forward Biased
Safe Operating Area (Note F)
Zθ JA Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJA=230°C/W
0.1
PD
0.01
Single Pulse
Ton
T
0.001
1E-05
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev 0: April 2012
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Page 4 of 5
AO6801E
Gate Charge Test Circuit & Waveform
Vgs
Qg
-10V
-
-
VDC
+
VDC
Qgd
Qgs
Vds
+
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
toff
ton
Vgs
-
DUT
Vgs
VDC
td(on)
t d(off)
tr
tf
90%
Vdd
+
Rg
Vgs
10%
Vds
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
2
L
E AR= 1/2 LIAR
Vds
Vds
Id
-
Vgs
Vgs
VDC
+
Rg
BVDSS
Vdd
Id
I AR
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vgs
Vds Isd
Vgs
Ig
Rev 0: April 2012
L
-Isd
+ Vdd
t rr
dI/dt
-I RM
Vdd
VDC
-
-I F
-Vds
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Page 5 of 5
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