ETC AAT1341-S6 2-channel switching regulator Datasheet

Advanced Analog Technology, Inc.
AAT1341
Details are subject to change without notice
2-CHANNEL SWITCHING REGULATOR
FEATURES
GENERAL DESCRIPTION
z
Complete PWM Power Control Circuitry
z
Under-Voltage Lockout (UVLO) Protection
z
Open Drain Output
z
Output Short Circuit Protection
z
Low Dissipation Current:1.6mA
z
Dead-Time Control:0 % to 100%
z
Wide Operating Frequency:
The AAT1341 provides an integrated two-channel
pulse-width-modulation (PWM) solution for the
power supply of DC-DC system; this device offers
system engineers the flexibility to tailor-make the
power supply circuitry for specific applications.
Each channel contains its own error amplifier,
PWM comparator, dead–time control (DTC), and
output driver. The under-voltage protection,
oscillator, short circuit protection and voltage
reference circuit are the common features of the two
channels.
Both channels of AAT1341 can be used for DC-DC
converter operations including step-up, step-down,
and inverting. Dead-time control can be set to
provide 0% to 100% dead-time through a resistive
divider network. Soft-start can be implemented by
paralleling the DTC resistor with a capacitor. Two
dead-time control inputs are assigned for CH1 and
CH2 individually, and dead-time control inputs can
be used to control on / off operation.
With a minimal number of external components, the
AAT1341 offers a simple and cost effective
solution.
10kHz to 800kHz
z
VDD Range:4.0V to 14.0V
PIN CONFIGURATION
TOP VIEW
Ct
1
16
VREF
Rt
2
15
SCP
NE1
3
14
NE2
IE1
4
13
IE2
OE1
5
12
OE2
DTC1
6
11
DTC2
OUT1
7
10
OUT2
GND
8
9
VDD
SOP-16PACKAGE
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PIN DESCRIPTION
PIN NO NAME
Ct
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Rt
NE1
IE1
OE1
DTC1
OUT1
GND
VDD
OUT2
DTC2
OE2
IE2
NE2
SCP
VREF
I/O
DESCRIPTION
I
External Timing Capacitance
I
I
I
I
I
O
External Timing Resistance
Noninverting Input of Error Amplifier 1
Inverting Input of Error Amplifier 1
Output of Error Amplifier 1
Output 1 Dead-Time / Soft-Start Setting
Output 1
Ground
Power
Supply
I
O Output 2
I Output 2 Dead-Time / Soft-Start Setting
I Output of Error Amplifier 2
I Inverting Input of Error Amplifier 2
I Noninverting Input of Error Amplifier 2
I Timer Latch Setting
O Reference Voltage (2.5V) Output
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AAT1341
ABSOLUTE MAXIMUM RATINGS
CHARACTERISTICS
VALUE
14.0
VDD
UNIT
V
V
Output Voltage
SYMBOL
VDD
VI
VO
VDD +0.3
V
Output Current
IO
120
mA
Operating Free-Air Temperature Range
TC
− 20 to + 85
o
Tstorage
− 45 to + 125
o
Pd
500
Supply Voltage
Input Voltage ( IE − , DTC)
Storage Temperature Range
Power Dissipation
C
C
mW
RECOMMENDED OPERATING CONDITION
CHARACTERISTICS
Supply Voltage, VDD
Input Voltage, IE1, IE2
SYMBOL
VDD
Vcm
MIN
4.0
MAX
14.0
UNIT
V
0.5
1.6
V
VO
0
VDD
V
Oscillation (OSC) Capacitance
C OSC
100
15,000
pF
Oscillation (OSC) Resistance
R OSC
5.1
50.0
kΩ
Oscillation (OSC) Frequency
f OSC
10
800
kHz
Output Current, I OUT1 , I OUT 2
IO
-
100
mA
Operating Free-Air Temperature
TC
− 20
85
Output Voltage
o
C
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AAT1341
ELECTRICAL CHARACTERISTICS, VDD = 6.0V (UNLESS OTHERWISE
SPECIFIED) (SEE NOTE 1)
OSCILLATOR
PARAMETER
f OSC
Frequency
Frequency Changes with
VDD
f ∆V
UNDER VOLTAGE PROTECTION
PARAMETER
Upper Threshold Voltage
VUPH
Lower Threshold Voltage
Hysteresis ( VUPH – VUPL )
VUPL
VHYS
TEST CONDITION
C OSC = 220pF,
R OSC = 10kΩ
VDD = 4.0V to 14.0V,
TC = 25 oC
C OSC = 220pF,
R OSC =10 kΩ
TEST CONDITION
TC = 25 oC
MIN
TYP MAX UNIT
320
400
480
kHz
-
1
-
%
MIN TYP MAX UNIT
-
2.90
-
V
o
-
2.53
-
V
o
-
0.37
-
V
TC = 25 C
TC = 25 C
SHORT CIRCUIT PROTECTION CONTROL
PARAMETER
TEST CONDITION
MIN
TYP MAX UNIT
0.90
1.05
1.20
V
Input Threshold Voltage
Vr1
Short-Circuit Detect
Threshold Voltage
Vr 2
1.48
1.64
1.80
V
SCP Terminal Source
Current
I SCP
− 3 .5
− 2 .5
− 1 .5
µA
Stand-by Voltage
Latch Voltage
VSTB
VLT
-
50
30
100
100
mV
mV
CH1, CH2
Note1: Typical values of all parameters are specified at
TC =25 oC.
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AAT1341
ELECTRICAL CHARACTERTISTICS, VDD = 6.0V (UNLESS OTHERWISE
SPECIFIED) (SEE NOTE 1) (CONT.)
REFERENCE VOLTAGE
PARAMTER
SYMBOL
VREF
Reference Voltage
Input Voltage Regulation
VRI
Output Regulation
VRO
EA (ERROR AMPLIFIER)
PARAMETER
SYMBOL
VIO
Input Offset Voltage
Input Bias Current
Input Voltage Range
Open-Loop Voltage
Gain
Output Voltage Swing
TEST CONDITION
I REF = −1mA ,
TC = 25 oC
I REF = −1mA ,
VDD = 4.0V to 14.0V
I REF = −0.1mA to
− 3.0 mA
TEST CONDITION
TYP MAX UNIT
2.4
2.5
2.6
V
-
1
5
mV
-
1
10
mV
MIN
TYP MAX UNIT
-
-
6
mV
0.5
±15
-
±100
1.6
nA
V
A VO
70
85
-
dB
VOS+
2.3
2.5
-
VOS−
-
0.7
0.9
I IB
VIR
CH1, CH2, Unity Gain
MIN
CH1, CH2
CH1, CH2
V
Output Sink Current
I OS+
OE=1.25V
3
20
-
Output Source Current
I OS−
OE=1.25V
− 75
− 45
-
mA
µA
60
80
-
dB
Common-Mode
Rejection Ratio
CMRR
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AAT1341
ELECTRICAL CHARACTERISTICS, VDD = 6.0V
(UNLESS OTHERWISE SPECIFIED) (SEE NOTE 1) (CONT.)
DEAD-TIME CONTROL & PWM
PARAMETER
SYMBOL
I IB
Input Bias Current
Input Threshold
Voltage (DTC)
Latch Input Voltage
Latch Mode Source
Current
OUTPUT STAGE
PARAMETER
TEST CONDITION
VDTC = 2.0V
MIN TYP MAX UNIT
-
0.1
1.0
Vd 0
Duty = 0%, f OSC = 10kHz
1.79
1.97
2.15
Vd100
Duty = 100%, f OSC = 10kHz
1.32
1.48
1.64
VDTC
I DTC = 40µA
2.28
2.48
-
V
I DTC
DTC1, DTC2=0V
− 560 − 200
-
µA
SYMBOL
VSAT
Saturation Voltage
I LEAK
Leakage Current
OPERATING CURRENT
PARAMETER
Supply Current
TEST CONDITION
MIN
I O = 75mA(CH1, CH2) VO =14.0V
-
TEST CONDITION
MIN
µA
V
TYP MAX UNIT
0.8
1.2
-
5.0
V
µA
TYP MAX UNIT
I DD−OFF
Output “OFF” State
-
1.3
1.8
mA
I DD−ON
R OSC = 10kΩ
-
1.6
2.3
mA
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AAT1341
BLOCK DIAGRAM
OE1
NE1
IE1
OUT1
SCP
Comp
Err-Amp
PWM
GND
UVC
NE2
OUT2
IE2
Err-Amp
OE2
PWM
V REF
Ct
UVC
DTC1
OSC
Rt
V REF
UVC
UVC
DTC2
LATCH
UVLO
V REF
VREF
VDD
LATCH
V
DD
SCP
SCP
V REF
UVC
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AAT1341
APPLICATION CIRCUIT
VREF
Optional Circuit:
Charge Pump Circuit
VDD
R12
R13
R11
VP3
VDD
Q1
OUT1
NE1
VN1
D4
VN1
R5
D1
OE1
L1
C1
R1
D3
C8
Inverting
Output
C9
C7
IE1
R2
VREF
VP2
R3
R4
VDD
AAT1341
VDD
VDD
L2
R16
VP2
OUT2
Q3
D2
R17
NE2
VREF
C10
Q4
R6
Step Up
Output
R18
OE2
R14
Q2
C2
IE2
R15
VREF
C4
Ct
R7
R9
C5
DTC1
Rt
DTC2
R8
GND
Ct
R10
SCP
Rt
CSCP
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AAT1341
TIMING CHART
1.97V
OE
DTC
1.05V
1.48V
PWM OUTPUT
OUTPUT
1.64V
SCP
tSCP
SCP Comp
2.53V
VDD
Note:
LOCKOUT
FREE
t SCP ≅
C SCP Vr 2
I SCP
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AAT1341
PACKAGE DIMENSION
16-PIN SOP
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AAT1341
PACKAGE DIMENSION (CONT.)
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PACKAGE DIMENSION (CONT.)
SYMBOLS
A
A1
A2
b
C
D
E
E1
e
L
y
θ
DIMENSIONS IN MILLIMETERS
MIN
TYP
MAX
1.47
1.60
1.73
0.10
-----0.25
-----1.45
-----0.33
0.41
0.51
0.19
0.20
0.25
9.80
9.91
10.01
5.79
5.99
6.20
3.81
3.91
3.99
-----1.27
-----0.38
0.71
1.27
----------0.076
o
-----0
8o
DEMINSIONS IN INCHES
MIN
TYP
MAX
0.058
0.063
0.068
0.004
-----0.010
-----0.057
-----0.013
0.016
0.020
0.0075 0.0080 0.0098
0.386
0.390
0.394
0.228
0.236
0.244
0.150
0.154
0.157
-----0.050
-----0.015
0.028
0.050
---------0.003
o
-----0
8o
NOTE:
1.
2.
3.
4.
5.
6.
7.
CONTROLLING DIMENSION: INCH
LEAD FRAME MATERIAL: COPPER 194
DIMENSION “D” DOES NOT INCLUDE MOLD FLASH, TIE BAR BURRS AND GATE BURRS. MOLD FLASH, TIE
BAR BURRS AND GATE BURRS SHALL NOT EXCEED 0.006” [0.15 MILLIMETERS] PER END DIMENSION “E1” DOES
NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SAHLL NOT EXCEED 0.010” [0.25 MILLIMETERS] PER
SIDE.
DIMENSION “b” DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE
0.003” [0.08 MILLIMETERS] TOTAL IN EXCESS OF THE “b” DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN
PROTRUSION AND AN ADJACENT LEAD TO BE 0.0028” [0.07 MILLIMETERS].
TOLERANCE: ± 0.010” [0.25 MILLIMETERS] UNLESS OTHERWISE SPECIFIED.
OTHERWISE DIMENSION FOLLOW ACCEPTABLE SPEC.
REFERENCE DOCUMENT: JEDEC SPEC MS-012
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TAPE AND REEL
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TAPE AND REEL (CONT.)
X.XXX X
± 0.0025
X.XXX
± 0.006
X.XX
± 0.025
X.X
± 0.10
X
± 0.25
UNIT: MILLIMETERS
NOTE:
1.
2.
3.
4.
5.
6.
10 SPROCKET HOLE PITCH CUMULATIVE TOLERANCE ± 0.2.
CAMBER NOT TO EXCEED 1 MILLIMETER IN 100 MILLIMETERS.
MATERIAL: BLACK ADVANTEK POLYSTYRENE.
A 0 AND B 0 MEASURED ON A PLANE 0.3 MILLIMETERS ABOVE THE BOTTOM OF THE POCKET.
K 0 MEASURED FROM A PLANE ON THE INSIDE BOTTOM OF THE POCKET TO THE TOP SURFACE OF THE
CARRIER.
POCKET POSITION RELATIVE TO SPROCKET HOLE MEASURED AS TRUE POSITION OF POCKET, NOT POCKET
HOLE.
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AAT1341
PART MARKING
SOP16 TOP MARKING
AAT1341
BXXXXX.X
YYWW TAIWAN
LOT NO.
DATE CODE
(0416 = 16th week of Year 2004)
NOTE: SOP16 HAS NO BACK MARKING.
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ORDERING INFORMATION
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