TCD2703D TOSHIBA CCD Linear Image Sensor CCD (Charge Coupled Device) TCD2703D The TCD2703D is a high sensitive and low dark current 7500 pixels × 3 line CCD color image sensor. The sensor is designed for color scanner. The device contains a row of 7500 pixels × 3 line photodiodes which provide a 24 lines/mm across a A3 size paper. The device is operated by 5-V pulse, and 12-V power supply. Features · Number of image sensing pixels : 22500 pixels (7500 pixels × 3 line) · Image sensing pixels size : 9.325 µm by 9.325 µm on 9.325 µm center · Photo sensing region: High sensitive pn photodiode · Clock: 2-phase (5 V) · Distance between photodiode array Weight: 16.0 g (typ.) Pin Connections (top view) : Pixel R to pixel G: 37.3 µm (4 lines) · Package: 68-pin CERDIP · Color filter: Red, Green, Blue Maximum Ratings (Note 1) Characteristics Symbol Rating Unit −0.3 to 8 V Clock pulse voltage VBA Last stage clock pulse voltage VBB Shift pulse voltage VSH Reset pulse voltage VRS Clamp pulse voltage VCP Power supply voltage VOD, VDD −0.3 to 15 V Operating temperature Topr 0 to 60 °C Storage temperature Tstg −25 to 85 °C Note 1: All voltages are with respect to SS pins (ground). 1 OS3 ODG OS5 OS6 ODR DSS f2B f2A f1A VDD NC NC NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 NC NC NC NC NC NC NC NC NC NC 15 16 17 18 19 20 21 22 23 24 NC NC NC NC NC f1A f2A SH3 NC SH2 25 26 27 28 29 30 31 32 33 34 R G B Internal circuit: Clamp circuit 7500 7500 7500 · 1 1 1 Pixel G to pixel B: 37.3 µm (4 lines) 68 67 66 65 64 63 62 61 60 59 58 57 56 55 OS4 ODB OS2 OS1 ASS CP RS f2A f1A VDD NC NC NC NC 54 53 52 51 50 49 48 47 46 45 NC NC NC NC NC NC NC NC NC NC 44 43 42 41 40 39 38 37 36 35 NC NC NC NC NC DSS f1A f2A NC SH1 2002-11-14 TCD2703D Circuit Diagram ODB ASS 67 64 CP RS f2A f1A f1A f2A DSS VDD 63 62 61 60 38 37 39 59 OS1 65 CCD analog shift register 1 35 SH1 … D142 D143 Photo … diode … (B) S7498 S7499 S7500 D128 … D125 D126 D127 S1 S2 D26 D27 D28 Shift gate 1 Shift gate 2 OS2 66 CCD analog shift register 2 OS4 68 CCD analog shift register 4 34 SH2 … D142 D143 Photo … diode … (G) S7498 S7499 S7500 D128 … D125 D126 D127 S1 S2 D26 D27 D28 Shift gate 4 Shift gate 3 OS3 1 CCD analog shift register 3 OS5 3 CCD analog shift register 5 32 SH3 … D142 D143 Photo … diode … (R) S7498 S7499 S7500 D128 … D125 D126 D127 S1 S2 D26 D27 D28 Shift gate 3 Shift gate 6 OS6 4 CCD analog shift register 6 2 5 6 ODG ODR DSS 7 f2B 8 f2A 9 f1A 2 30 f1A 31 f2A 10 VDD 2002-11-14 TCD2703D Pin Names Pin No. Symbol 1 OS3 2 3 Name Pin No. Symbol Output signal 3 (green) 35 SH1 Shift gate 1 ODG Power supply (green) 36 NC No connect OS5 Output signal 5 (red) 37 f2A Transfer clock (phase 2) 4 OS6 Output signal 6 (red) 38 f1A Transfer clock (phase 1) 5 ODR Power supply (red) 39 DSS Ground (digital) 6 DSS Ground (digital) 40 NC No connect 7 f2B Last stage clock (phase 2) 41 NC No connect 8 f2A Transfer clock (phase 2) 42 NC No connect 9 f1A Transfer clock (phase 1) 43 NC No connect 10 VDD Power supply (digital) 44 NC No connect 11 NC No connect 45 NC No connect 12 NC No connect 46 NC No connect 13 NC No connect 47 NC No connect 14 NC No connect 48 NC No connect 15 NC No connect 49 NC No connect 16 NC No connect 50 NC No connect 17 NC No connect 51 NC No connect 18 NC No connect 52 NC No connect 19 NC No connect 53 NC No connect 20 NC No connect 54 NC No connect 21 NC No connect 55 NC No connect 22 NC No connect 56 NC No connect 23 NC No connect 57 NC No connect 24 NC No connect 58 NC No connect 25 NC No connect 59 VDD Power supply (digital) 26 NC No connect 60 f1A Transfer clock (phase 1) 27 NC No connect 61 f2A Transfer clock (phase 2) 28 NC No connect 62 RS Reset gate 29 NC No connect 63 CP Clamp gate 30 f1A Transfer clock (phase 1) 64 ASS Ground (analog) 31 f2A Transfer clock (phase 2) 65 OS1 Output signal 1 (blue) 32 SH3 Shift gate 3 66 OS2 Output signal 2 (blue) 33 NC No connect 67 ODB Power supply (blue) 34 SH2 Shift gate 2 68 OS4 Output signal 4 (green) 3 Name 2002-11-14 TCD2703D Optical/Electrical Characteristics (bit clamp) (Ta = 25°C, VOD = VDD = 11 V, VB = VRS = VSH = VCP = 5 V (pulse), fB = 1 MHz, load resistance = 100 kW W, tINT (integration time) = 10 ms, light source = A light source + CM500S filter (t = 1.0 mm) ) Characteristics Symbol Min Typ. Max Unit Note Red R (R) 7.9 11.4 14.9 Green R (G) 10.7 15.4 20.1 V/lx･s (Note 2) Blue R (B) 4.2 6.1 8.0 PRNU (1) ¾ 10 PRNU (3) ¾ 3 20 % (Note 3) 12 mV (Note 4) VSAT 1.0 1.5 ¾ V (Note 5) Saturation exposure SE 0.05 0.1 ¾ lx･s (Note 6) Dark signal voltage VDRK ¾ 3 6 mV (Note 7) Dark signal non uniformity DSNU ¾ 8 12 mV (Note 8) Dc power dissipation PD ¾ 900 1300 mW ¾ Total transfer efficiency TTE 92 98 ¾ % ¾ ZO ¾ 0.2 0.5 kW ¾ Dc signal output voltage VOS 4.5 6.0 7.5 V (Note 9) Random noise NDI ¾ 1.0 ¾ mV (Note 10) Sensitivity Photo response non uniformity Saturation output voltage Output impedance Note 2: Sensitivity is defined for each color of signal outputs average when the photosensitive surface is applied with the light of uniform illumination and uniform color temperature. Note 3: PRNU (1) is defined for each color on a single chip by the expressions below when the photosensitive surface is applied with the light of uniform illumination and uniform color temperature. DX PRNU (1) = ´ 100 (%) X X : Average of total signal outputs DX: The maximum deviation from X . Note 4: PRNU (3) is defined as maximum voltage with next pixel, where measured 5% of SE (typ.). Note 5: VSAT is defined as minimum Saturation Output voltage of all effective pixels. V Note 6: Definition of SE: SE = SAT RG Note 7: VDRK is defined as average dark signal voltage of all effective pixels. Note 8: DSNU is defined by the difference between average value (VDRK) and the maximum value of the dark voltage. OS VDRK DSNU Note 9: DC signal output voltage is defined as follows : OS VOS SS 4 2002-11-14 TCD2703D Note 10: Random noise is defined as the standard deviation (sigma) of the output level difference between two adjacent effective pixels under no illumination (i.e. dark condition) calculated by the following procedure. Video output Video output 200 ns 200 ns Output waveform (effective pixels under dark condition) (1) (2) (3) (4) DV Pixel n Pixel n + 1 Two adjacent pixels (pixel n and n + 1) in one reading are fixed as measurement points. Each of the output levels at video output periods averaged over 200 nanosecond period to get Vn and Vn + 1. Vn + 1 is subtracted from Vn to get DV. DV = Vn - Vn + 1 The standard deviation of DV is calculated after procedure (2) and (3) are repeated 30 times (30 readings). 30 30 DV = 1 å | DVi | 30 i =1 (5) s= 2 1 (| DVi | －DV ) 30 iå =1 Procedure (2), (3) and (4) are repeated 10 times to get 10 sigma values. 10 s = 1 åsj 10 j=1 (6) I value calculated using the above procedure is observed 2 times larger than that measured relative to the ground level. So we specify the random noise as follows. Random noise = 1 s 2 5 2002-11-14 TCD2703D Operating Condition (Ta = 25°C) Characteristics Clock pulse voltage Symbol High level Low level Final stage clock pulse voltage High level Shift pulse voltage (Note 11) High level Reset pulse voltage Clamp pulse voltage Low level Low level High level Low level High level Low level Power supply voltage Min Typ. Max 4.5 5.0 5.5 0 ¾ 0.3 4.5 5 5.5 0 ¾ 0.3 VB “H” - 0.5 VB “H” VB “H” 0 ¾ 0.3 4.5 5 5.5 0 ¾ 0.3 4.5 5 5.5 0 ¾ 0.3 10.5 11.0 13.0 VB1A, VB2A VB2B VSH VRS VCP VOD, VDD Unit V V V V V V Note 11: Vf “H” means the high level voltage of VfA when SH pulse is high level. Clock Characteristics (Ta = 25°C) Characteristics Symbol Min Typ. Max Unit Clock pulse frequency fB ¾ 1 25 MHz Reset pulse frequency fRS ¾ 1 25 MHz Clamp pulse frequency fCP ¾ 1 25 MHz CBA ¾ 150 ¾ pF Final stage clock capacitance CBB ¾ 20 ¾ pF Shift gate capacitance CSH ¾ 40 ¾ pF Reset gate capacitance CRS ¾ 20 ¾ pF Clamp gate capacitance CCP ¾ 20 ¾ pF Clock capacitance (Note 12) Note 12: VOD = 11 V 6 2002-11-14 SH OS2, 4, 6 OS1, 3, 5 CP RS f2A1, 2, 3, 4 f2B f1A1, 2, 3, 4 Timing Chart tINT (Integration time) D136 D137 D134 D135 D132 D133 D130 D131 D128 D129 S7499 S7500 S7497 S7498 D7495 D7496 S7493 S7494 S7491 S7492 S9 S10 S7 S8 S5 S6 S3 S4 S1 S2 D126 D127 D124 D125 D122 D123 D120 D121 D42 D43 D40 D41 D38 D39 D36 D37 D34 D35 D32 D33 D30 D31 D28 D29 D26 D27 D24 D25 D6 D7 D4 D5 D2 D3 D0 D1 Dummy outputs (64 pixels ´ 2) 7 1 Line readout period (3822 pixels ´ 2) Dummy outputs (8 pixels ´ 2) (3pixels ´ 2) D139 Signal outputs (3750 pixels ´ 2) D138 (3pixels ´ 2) D141 Light shield outputs (48 pixels ´ 2) D140 Dummy outputs (4 pixels ´ 2) D143 Dummy outputs (13 pixels ´ 2) D142 TTE test outputs (1 pixels ´ 2) 2002-11-14 TCD2703D TCD2703D Timing Requirements t2 t4 t3 SH t1 t5 f1A t18 RS CP (Note 13) Note 13: Hold the RS and CP pins at low during this period. t6 t7 f2B t8 t10 t14 t9 RS t16 t15 CP t12 t11 t13 t17 OS f1 f2 GND 1.5 V (min) 1.5 V (min) 8 2002-11-14 TCD2703D Timing Requirements (line clamp) SH f1A t19 t18 t21 RS t20 CP Characteristics Pulse timing of SH and f1A SH pulse rise time, fall time Typ. (Note 14) Max Unit 1000 ¾ ns 300 1000 ¾ ns t2, t4 0 50 ¾ ns Symbol Min t1 60 t5 t3 1000 2000 ¾ ns f1, f2 Pulse rise time, fall time t6, t7 0 50 ¾ ns RS pulse rise time, fall time t8, t10 0 20 ¾ ns t9 10 100 ¾ ns t11, t13 0 20 ¾ ns CP pulse width t12 10 100 ¾ ns Pulse timing of f2B and CP t14 0 40 ¾ ns t15 0 0 ¾ ns t16 10 100 ¾ ns t17 ¾ 10 ¾ ns SH, RS pulse timing t18 300 ¾ ¾ ns RS pulse width (line clamp) t19 10 ¾ ¾ ns CP pulse width (line clamp) t20 10 ¾ ¾ ns CP, f1A pulse timing (line clamp) t21 5 ¾ ¾ ns SH pulse width RS pulse width CP pulse rise time, fall time Pulse timing of RS and CP Video data delay time (Note 15) Note 14: Measured with fRS = 1 MHz. Note 15: Load resistance is 100 kW. 9 2002-11-14 TCD2703D Typical Spectral Response Spectral response (typ.) 1.0 Ta = 25°C Relative response 0.8 0.6 0.4 0.2 0 400 450 500 550 600 650 700 Wave length l (nm) 10 2002-11-14 TCD2703D Caution 1. Electrostatic Breakdown The dust and stain on the glass window of the package degrade optical performance of CCD sensor. Keep the glass window clean by saturating a cotton swab in alcohol and lightly wiping the surface, and allow the glass to dry, by blowing with filtered dry N2. Care should be taken to avoid mechanical or thermal shock because the glass window is easily to damage. a. b. c. Prevent the generation of static electricity due to friction by making the work with bare hands or by putting on cotton gloves and non-charging working clothes. Discharge the static electricity by providing earth plate or earth wire on the floor, door or stand of the work room. Ground the tools such as soldering iron, radio cutting pliers of or pincer. It is not necessarily required to execute all precaution items for static electricity. It is all right to mitigate the precautions by confirming that the trouble rate within the prescribed range. 2. Window Glass The dust and stain on the glass window of the package degrade optical performance of CCD sensor. Keep the glass window clean by saturating a cotton swab in alcohol and lightly wiping the surface, and allow the glass to dry, by blowing with filtered dry N2. Care should be taken to avoid mechanical or thermal shock because the glass window is easily to damage. 3. Incident Light CCD sensor is sensitive to infrared light. Note that infrared light component degrades resolution and PRNU of CCD sensor. 4. Mounting on a PCB This package is sensitive to mechanical stress. Toshiba recommends using IC inserters for mounting, instead of using lead forming equipment. 5. Soldering Soldering by the solder flow method cannot be guaranteed because this method may have deleterious effects on prevention of window glass soiling and heat resistance. Using a soldering iron, complete soldering within ten seconds for lead temperatures of up to 260°C, or within three seconds for lead temperatures of up to 350°C. 11 2002-11-14 TCD2703D Package Dimensions Weight: 16.0 g (typ.) 12 2002-11-14 TCD2703D RESTRICTIONS ON PRODUCT USE 000707EBA · TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc.. · The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer’s own risk. · The products described in this document are subject to the foreign exchange and foreign trade laws. · The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. · The information contained herein is subject to change without notice. 13 2002-11-14