TI1 bq34z110PWR Wide range fuel gauge with impedance trackâ ¢ for lead-acid battery Datasheet

bq34z110
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SLUSB55 – JUNE 2012
Wide Range Fuel Gauge with Impedance Track™ for Lead-Acid Batteries
Check for Samples: bq34z110
FEATURES
1
•
•
•
•
•
•
•
•
Supports Lead-Acid Chemistries
Capacity Estimation Using Patented
Impedance Track™ Technology for Batteries
from 4 V to 64 V
– Aging Compensation
– Self-Discharge Compensation
Supports Battery Capacities Above 65 Ahr
Supports Charge and Discharge Currents
Above 32 A
External NTC Thermistor Support
Supports Two-Wire I2C and HDQ Single Wire
Communication Interfaces with Host System
SHA-1/HMAC Authentication
One- or Four-LED Direct Display Control
Five-LED and Higher Display Through Port
Expander
•
Reduced Power Modes (Typical Battery Pack
Operating Range Conditions)
– Normal Operation: < 140 µA Average
– Sleep: < 64 µA Average
– Full Sleep: < 19 µA Average
Package: 14-Pin TSSOP
APPLICATIONS
•
•
•
•
•
Light Electric Vehicles
Power Tools
Medical Instrumentation
Uninterruptable Power Supplies (UPS)
Mobile Radios
DESCRIPTION
The Texas Instruments bq34z110 is a fuel gauge solution that works independently of battery series-cell
configurations, and supports Lead-Acid battery chemistries. Batteries from 4 V to 64 V can be supported through
an external voltage translation circuit that can be controlled automatically to reduce system power consumption.
The bq34z110 device provides several interface options, including an I2C™ slave, an HDQ slave, one or four
direct LEDs, and an Alert output pin. Additionally, the bq34z110 provides support for an external port expander
for more than four LEDs.
ORDERING INFORMATION
TA
PART NUMBER
PACKAGE
(TSSOP)
TUBE
TAPE AND REEL
–40°C to 85°C
bq34z110PW or
bq34z110PWR
14-Pin
PW
PWR
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Impedance Track is a trademark of Texas Instruments.
I2C is a trademark of NXP B.V Corporation.
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
Copyright © 2012, Texas Instruments Incorporated
PRODUCT PREVIEW
•
•
23
bq34z110
SLUSB55 – JUNE 2012
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
PIN DETAILS
PIN-OUT DIAGRAM
PRODUCT PREVIEW
P2
1
14
P3/SDA
VEN
2
13
P4/SCL
P1
3
12
P5/HDQ
BAT
4
11
P6/TS
CE
5
10
SRN
REGIN
6
9
SRP
REG25
7
8
VSS
Figure 1. bq34z110 Pin-Out Diagram
Table 1. bq34z110 External Pin Functions
PIN NAME
PIN
NUMBER
TYPE (1)
P2
1
O
LED 2 or Not Used (connect to Vss)
VEN
2
O
Active High Voltage Translation Enable. This signal is optionally used to switch the input voltage
divider on/off to reduce the power consumption (typ 45 uA) of the divider network.
P1
3
O
LED 1 or Not Used (connect to Vss). This pin is also used to drive an LED for single-LED mode.
Use a small signal N-FET (Q1) in series with the LED as shown on Figure 9.
BAT
4
I
Translated Battery Voltage Input
(1)
2
DESCRIPTION
CE
5
I
Chip Enable. Internal LDO is disconnected from REGIN when driven low.
REGIN
6
P
Internal integrated LDO input. Decouple with a 0.1-µF ceramic capacitor to Vss.
REG25
7
P
2.5-V Output voltage of the internal integrated LDO. Decouple with 1-µF ceramic capacitor to Vss
VSS
8
P
Device ground
SRP
9
I
Analog input pin connected to the internal coulomb-counter peripheral for integrating a small
voltage between SRP and SRN where SRP is nearest the BAT– connection.
SRN
10
I
Analog input pin connected to the internal coulomb-counter peripheral for integrating a small
voltage between SRP and SRN where SRN is nearest the PACK– connection.
Pack thermistor voltage sense (use 103AT-type thermistor)
P6/TS
11
I
P5/HDQ
12
I/O
P4/SCL
13
I
Slave I2C serial communication clock input. Use with a 10-K pull-up resistor (typical). Also used
for LED 4 in the four-LED mode.
P3/SDA
14
I/O
Open drain slave I2C serial communication data line. Use with a 10-kΩ pull-up resistor (typical).
Also used for LED 3 in the four-LED mode.
Open drain HDQ Serial communication line (slave)
I = Input, O = Output, P = Power, I/O = Digital input/output
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SLUSB55 – JUNE 2012
TYPICAL IMPLEMENTATION
PACK +
Protection
FETs
n Series cells
**
CE
BAT
VEN
P1
P2
REG25
P3/DAT
I2C
PROG
**
P4/CLK
P5/HDQ
Protection
and
Balancing
Solution
P6/TS
SRP
Sense
Resistor
SRN
PRODUCT PREVIEW
REGIN
VSS
HDQ COMM
ALERT
PACK –
** optional to reduce divider power consumption
Figure 2. bq34z110 Typical Implementation
THERMAL INFORMATION
bq34z110
THERMAL METRIC (1)
TSSOP (14-Pins)
θJA, High K
Junction-to-ambient thermal resistance
103.8
θJC(top)
Junction-to-case(top) thermal resistance
31.9
θJB
Junction-to-board thermal resistance
46.6
ψJT
Junction-to-top characterization parameter
2.0
ψJB
Junction-to-board characterization parameter
45.9
θJC(bottom)
Junction-to-case(bottom) thermal resistance
N/A
(1)
UNITS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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ABSOLUTE MAXIMUM RATINGS
Over operating free-air temperature range (unless otherwise noted) (1)
VALUE
PARAMETER
MIN
UNIT
MAX
VREGIN
Regulator Input Range
–0.3
5.5
V
VCC
Supply Voltage Range
–0.3
2.75
V
VIOD
Open-drain I/O pins (SDA, SCL, HDQ)
–0.3
5.5
V
VBAT
Bat Input pin
–0.3
5.5
V
VI
Input Voltage range to all other pins (P1, P2, SRP, SRN)
–0.3
VCC + 0.3
V
1.5
kV
Human-body model (HBM), BAT pin
ESD
2
kV
TA
Operating free-air temperature range
–40
85
°C
TF
Functional temperature range
–40
100
°C
(1)
Human-body model (HBM), all other pins
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
PRODUCT PREVIEW
TA = 25ºC, CLDO25 = 1 µF, and VREGIN = 3.6 V (unless otherwise noted)
PARAMETER
CONDITIONS
VREGIN
Supply Voltage
CREGIN
External input capacitor for
internal LDO between REGIN
and VSS
CLDO25
External output capacitor for
internal LDO between VCC and
VSS
ICC
Normal operating-mode current
ISLP
MAX
UNIT
No operating restrictions
MIN
2.7
TYP
4.5
V
No FLASH writes
2.45
2.7
V
0.1
μF
1
μF
Gas Gauge in NORMAL mode,
ILOAD > Sleep Current
140
μA
SLEEP operating-mode current
Gas Gauge in SLEEP mode,
ILOAD < Sleep Current
64
μA
ISLP+
FULL SLEEP operating-mode
current
Gas Gauge in FULL SLEEP mode,
ILOAD < Sleep Current
19
μA
VOL
Output voltage, low (SCL, SDA,
HDQ)
IOL = 3 mA
VOH(PP)
Output voltage, high
IOH = –1 mA
VCC – 0.5
V
VOH(OD)
Output voltage, high (SDA,
SCL, HDQ)
External pull-up resistor connected to VCC
VCC – 0.5
V
VIL
Input voltage, low
–0.3
0.6
V
VIH(OD)
Input voltage, high (SDA, SCL,
HDQ)
1.2
6
V
VA1
Input voltage range (TS)
VSS – 0.05
1
V
5
V
0.125
V
0.3
μA
Nominal capacitor values specified.
Recommend a 10% ceramic X5R type
capacitor located close to the device.
0.47
0.4
VA2
Input voltage range (BAT)
VSS –
0.125
VA3
Input voltage range (SRP, SRN)
VSS –
0.125
ILKG
Input leakage current (I/O pins)
tPUCD
Power-up communication delay
4
250
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V
ms
Copyright © 2012, Texas Instruments Incorporated
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SLUSB55 – JUNE 2012
POWER-ON RESET
TA = –40°C to 85°C; Typical Values at TA = 25°C and VREGIN = 3.6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIT+
Positive-going battery voltage
input at REG25
VHYS
Power-on reset hysteresis
MIN
TYP
MAX
UNIT
2.05
2.20
2.31
V
45
115
185
mV
MIN
NOM
MAX
UNIT
2.5
2.7
LDO REGULATOR
TA = 25°C, CLDO25 = 1 µF, VREGIN = 3.6 V (unless otherwise noted) (1)
PARAMETER
VREG25
ISHORT (2)
Regulator output
voltage
Short Circuit
Current Limit
TA= –40°C to 85°C
2.3
2.45 V ≤ VREGIN < 2.7 V
(low battery), IOUT ≤ 3 mA
TA = –40°C to 85°C
2.3
VREG25 = 0 V
TA = –40°C to 85°C
V
250
mA
LDO output current, IOUT, is the sum of internal and external load currents.
Assured by design. Not production tested.
PRODUCT PREVIEW
(1)
(2)
TEST CONDITION
2.7 V ≤ VREGIN ≤ 4.5 V,
IOUT ≤ 16 mA
INTERNAL TEMPERATURE SENSOR CHARACTERISTICS
TA = –40°C to 85°C, 2.4 V < REG25 < 2.6 V; Typical Values at TA = 25°C and REG25 = 2.5 V (unless otherwise noted)
PARAMETER
GTEMP
TEST CONDITIONS
MIN
Temperature sensor voltage gain
TYP
MAX
–2
UNIT
mV/°C
LOW-FREQUENCY OSCILLATOR
TA = –40°C to 85°C, 2.4 V < REG25 < 2.6 V; Typical Values at TA = 25°C and REG25 = 2.5 V (unless otherwise noted)
PARAMETER
f(LOSC)
TEST CONDITIONS
Operating frequency
f(LEIO)
Frequency error (1) (2)
t(LSXO)
Start-up time (3)
(1)
(2)
(3)
MIN
TYP
MAX
UNIT
32.768
kHz
TA = 0°C to 60°C
–1.5%
0.25%
1.5%
TA = –20°C to 70°C
–2.5%
0.25%
2.5%
TA = –40°C to 85°C
–4%
0.25%
4%
μs
500
The frequency drift is included and measured from the trimmed frequency at VCC = 2.5 V, TA = 25°C.
The frequency error is measured from 32.768 kHz.
The startup time is defined as the time it takes for the oscillator output frequency to be ±3%.
HIGH-FREQUENCY OSCILLATOR
TA = –40°C to 85°C, 2.4 V < REG25 < 2.6 V; Typical Values at TA = 25°C and REG25 = 2.5 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
f(OSC)
Operating frequency
f(EIO)
Frequency error (1) (2)
t(SXO)
(1)
(2)
(3)
MIN
TYP
MAX
8.389
MHz
TA = 0°C to 60°C
–2%
0.38%
TA = –20°C to 70°C
–3%
0.38%
3%
TA = –40°C to 85°C
–4.5%
0.38%
4.5%
2.5
5
Start-up time (3)
UNIT
2%
ms
The frequency error is measured from 2.097 MHz.
The frequency error is measured from 32.768 kHz.
The startup time is defined as the time it takes for the oscillator output frequency to be ±3%.
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INTEGRATING ADC (COULOMB COUNTER) CHARACTERISTICS
TA = –40°C to 85°C, 2.4 V < REG25 < 2.6 V; Typical Values at TA = 25°C and REG25 = 2.5 V (unless otherwise noted)
PARAMETER
V(SR)
tSR_CONV
TEST CONDITIONS
Input voltage range, V(SRN) and V(SRP)
V(SR) = V(SRN) – V(SRP)
Conversion time
Single conversion
Resolution
TYP
–0.125
Input offset
INL
Integral nonlinearity error
ZIN(SR)
Effective input resistance (1)
Ilkg(SR)
Input leakage current (1)
MAX
UNIT
0.125
V
15
bits
1
14
VOS(SR)
(1)
MIN
s
10
±0.007
µV
±0.034
% FSR
2.5
MΩ
0.3
µA
Assured by design. Not tested in production.
ADC (TEMPERATURE AND CELL MEASUREMENT) CHARACTERISTICS
TA = –40°C to 85°C, 2.4 V < REG25 < 2.6 V; Typical Values at TA = 25°C and REG25 = 2.5 V (unless otherwise noted)
PARAMETER
VIN(ADC)
tADC_CONV
TEST CONDITIONS
Input voltage range
MIN
TYP
0.05
Conversion time
Resolution
14
PRODUCT PREVIEW
VOS(ADC)
Input offset
ZADC1
Effective input resistance (TS) (1)
MAX
UNIT
1
V
125
ms
15
bits
1
ZADC2
Effective input resistance (BAT)(1)
Ilkg(ADC)
Input leakage current (1)
bq34z110 not measuring cell
voltage
mV
8
MΩ
8
MΩ
bq34z110 measuring cell voltage
100
KΩ
0.3
µA
DATA FLASH MEMORY CHARACTERISTICS
TA = –40°C to 85°C, 2.4 V < REG25 < 2.6 V; Typical Values at TA = 25°C and REG25 = 2.5 V (unless otherwise noted)
PARAMETER
Data retention
tDR
Flash-programming write cycles (1)
tWORDPROG
ICCPROG
(1)
TEST CONDITIONS
(1)
MIN
TYP
UNIT
10
Years
20,000
Cycles
Word programming time (1)
Flash-write supply current
MAX
(1)
5
2
ms
10
mA
Assured by design. Not tested in production.
HDQ COMMUNICATION TIMING CHARACTERISTICS
TA = –40°C to 85°C, CREG = 0.47 μF, 2.45 V < VREGIN = VBAT < 5.5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
205
250
μs
μs
t(CYCH)
Cycle time, host to bq34z110
190
t(CYCD)
Cycle time, bq34z110 to host
190
t(HW1)
Host sends 1 to bq34z110
0.5
50
μs
t(DW1)
bq34z110 sends 1 to host
32
50
μs
t(HW0)
Host sends 0 to bq34z110
86
145
μs
t(DW0)
bq34z110 sends 0 to host
80
145
μs
t(RSPS)
Response time, bq34z110 to host
190
950
μs
t(B)
Break time
190
t(BR)
Break recovery time
40
t(RISE)
HDQ line rising time to logic 1 (1.2 V)
t(RST)
HDQ Reset
6
1.8
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μs
μs
950
ns
2.2
s
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Product Folder Link(s): bq34z110
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SLUSB55 – JUNE 2012
1.2V
t(BR)
t(B)
t(RISE)
(b) HDQ line rise time
(a) Break and Break Recovery
t(DW1)
t(HW1)
t(DW0)
t(CYCD)
t(HW0)
t(CYCH)
(d) Gauge Transmitted Bit
(c) Host Transmitted Bit
1-bit
R/W
7-bit address
Break
8-bit data
t(RSPS)
(e) Gauge to Host Response
PRODUCT PREVIEW
Figure 3. Timing Diagrams
I2C-COMPATIBLE INTERFACE TIMING CHARACTERISTICS
TA = –40°C to 85°C, CREG = 0.47 μF, 2.45 V < VREGIN = VBAT < 5.5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
300
ns
300
ns
tr
SCL/SDA rise time
tf
SCL/SDA fall time
tw(H)
SCL pulse width (high)
600
ns
tw(L)
SCL pulse width (low)
1.3
μs
tsu(STA)
Setup for repeated start
600
ns
td(STA)
Start to first falling edge of SCL
600
ns
tsu(DAT)
Data setup time
100
ns
th(DAT)
Data hold time
0
ns
tsu(STOP)
Setup time for stop
600
ns
tBUF
Bus free time between stop and start
66
μs
fSCL
Clock frequency
400
tSU(STA)
tw(H)
tf
tw(L)
tr
kHz
t(BUF)
SCL
SDA
td(STA)
tsu(STOP)
tf
tr
th(DAT)
tsu(DAT)
REPEATED
START
STOP
START
Figure 4. I2C-Compatible Interface Timing Diagrams
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PACKAGE OPTION ADDENDUM
www.ti.com
25-Jul-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
BQ34Z110PW
PREVIEW
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
BQ34Z110PWR
PREVIEW
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Samples
(Requires Login)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
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www.ti.com/omap
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www.ti.com/wirelessconnectivity
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