C8051F321 USB, 25 MIPS, 16 kB Flash, 10-Bit ADC, 28-Pin Mixed-Signal MCU Analog Peripherals High-Speed 8051 µC Core - 10-Bit ADC - ±1 LSB INL; no missing codes Programmable throughput up to 200 ksps Up to 13 external inputs; programmable as single-ended or differential Built-in temperature sensor (±3 °C) Two Comparators Internal Voltage Reference: 2.4 V POR/Brown-out Detector - USB specification 2.0 compliant Full-speed (12 Mbps) or low-speed (1.5 Mbps) operation Integrated clock recovery; no external crystal required for either fullspeed or low-speed operation Supports eight flexible endpoints Dedicated 1 kB USB buffer memory Integrated transceiver; no external resistors required On-Chip Debug - Memory - 1280 bytes data RAM 16 kB Flash; in-system programmable in 512-byte sectors (512 bytes are reserved) Digital Peripherals USB Function Controller - - Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks Up to 25 MIPS throughput with 25 MHz Clock Expanded interrupt handler On-chip debug circuitry facilitates full speed, non-intrusive in-system debug (no emulator required) Provides breakpoints, single stepping Inspect/modify memory, registers, and USB memory Superior performance to emulation systems using ICE-chips, target pods, and sockets Operating Voltage: 2.7 to 5.25 V Temperature Range: –40 to +85 °C - 21 port I/O; all are 5 V tolerant Hardware SMBus™ (I2C™ compatible), SPI™, and UART serial ports available concurrently Programmable 16-bit counter/timer array with five capture/compare modules 4 general-purpose 16-bit counter/timers Clock Sources - Internal oscillator: 0.25% accuracy with clock recovery enabled; supports all USB and UART modes External oscillator: Crystal, RC, C, or Clock On-chip clock multiplier for USB controller Voltage Regulator - On-chip voltage regulator supports USB bus-powered operation Regulator bypass mode supports USB self-powered operation Package - 28-pin QFN (lead-free package) Ordering Part Number - REGIN 5.0 V IN Voltage Regulator C8051F321-GM Enable OUT VDD Analog/Digital Power Debug HW Reset RST/C2CK POR BrownOut External Oscillator Circuit System Clock x4 2 Clock Recovery D+ DVBUS USB Port 1 Latch D r v 2 16 kB FLASH PCA/ WDT 256 Byte SRAM SMBus P 1 D r v P 2 SPI C o r SFR Bus e P0.0 P0.1 P0.2/XTAL1 P0.3/XTAL2 P0.4 P0.5 P0.6/CNVSTR P0.7/VREF P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P2.0 P2.1 P2.2 P2.3 D r v Port 2 Latch P 3 Port 3 Latch P3.0/C2D D r v VREF USB Clock 1,2,3,4 USB Transceiver 8 0 5 1 C R O S S B A R Timer 0,1,2,3 / RTC 1 kB XRAM XTAL1 XTAL2 12 MHz Internal Oscillator P 0 UART GND C2D Port 0 Latch CP0 + - CP1 + - VREF USB Controller 1 kB USB SRAM VDD Temp 10-bit 200 ksps ADC Copyright © 2006 by Silicon Laboratories A M U X AIN0-AIN11 VDD VREF 1.9.2006 C8051F321 USB, 25 MIPS, 16 kB Flash, 10-Bit ADC, 28-Pin Mixed-Signal MCU Selected Electrical Specifications (TA = 0 to +70 C°, VREG = 5.0 V unless otherwise specified) Parameter Global Characteristics Conditions Min Regulator Input Voltage (REGIN) VDD (VREG Output) VREG Bias Current VREG Enabled Supply Current with CPU and USB active Supply Current (suspend mode, Oscillator off) CPU Clock = 24 MHz, USB Clock = 48 MHz CPU Clock = 12 MHz, USB Clock = 6 MHz VDD Monitor Enabled; VREG Disabled VDD Monitor Disabled; VREG Disabled CPU System Clock Range Typ Max Units 4.0 — 5.25 V 3.0 3.3 3.6 V — 70 — µA 18 — mA — 9 mA — 30 <0.1 — µA µA DC — 25 MHz 11.97 11.82 47.88 5.91 12.0 12.0 48.0 6.0 12.03 12.18 48.12 6.09 MHz MHz MHz MHz — — 53 — 10 ±½ ±½ — — 0 — ±1 ±1 — 200 VREF — — — — — — — — 0.1 7.6 0.18 3.2 0.32 1.3 1 0.4 — — — — — — — — Internal Oscillator & Clocks Clock Recovery Enabled Clock Recovery Disabled Full-Speed Operation Low-Speed Operation Frequency USB Clock A/D Converter Resolution Integral Nonlinearity Differential Nonlinearity Signal-to-Noise Plus Distortion Throughput Rate Guaranteed Monotonic Input Voltage Range bits LSB LSB dB ksps V Comparator Response Time Mode0 Current Consumption Mode0 Response Time Mode1 Current Consumption Mode1 Response Time Mode2 Current Consumption Mode2 Response Time Mode3 Current Consumption Mode3 (CP+) – (CP-) = 100 mV (CP+) – (CP-) = 100 mV (CP+) – (CP-) = 100 mV (CP+) – (CP-) = 100 mV Package Information µs µA µs µA µs µA µs µA C8051F320DK Development Kit 14 13 12 10 11 9 8 Bottom View L 7 15 16 D2 D2 2 5 17 e E2 4 2 20 21 22 23 24 25 26 27 DETAIL 1 28 1 18 19 E2 2 3 R 6xe E b 6 6xe D Side View A A1 A2 A3 b D D2 E E2 e L N ND NE R AA BB CC DD MIN 0.80 0 0 0.18 2.90 2.90 0.45 MM TYP 0.90 0.02 0.65 0.25 0.23 5.00 3.15 5.00 3.15 0.5 0.55 28 7 7 MAX 1.00 0.05 1.00 0.30 3.35 3.35 0.65 0.09 0.435 0.435 0.18 0.18 DETAIL 1 USB CC DD e A1 A3 BB A A2 AA Copyright © 2006by Silicon Laboratories Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders 1.9.2006