FEATURES FUNCTIONAL BLOCK DIAGRAMS High accuracy over line and load ±0.8% at +25°C, ±1.4% over temperature Ultralow dropout voltage: 180 mV (typical) at 200 mA Requires only CO = 0.47 µF for stability anyCAP = stable with all types of capacitors (including MLCC) 3.2 V to 12 V supply range Current and thermal limiting Low noise Dropout detector Low shutdown current: < 1 µA Thermally enhanced SOIC_N package Excellent Line and Load Regulation Performance ADP3303 Q1 IN THERMAL PROTECTION ERR OUT R1 CC gm DRIVER Q2 SD R2 10335-001 BANDGAP REF GND Figure 1. Functional Block Diagram NR 3 ADP3303-5.0 APPLICATIONS VIN Cellular telephones Notebook, palmtop computers Battery powered systems Portable instruments Post regulator for switching supplies Bar code scanners 7 8 IN OUT 1 VOUT = +5V 2 330kΩ C1 0.47µF ERR 6 SD GND 5 4 C2 0.47µF EOUT ON OFF 10335-002 Data Sheet High Accuracy anyCAP™ 200 mA Low Dropout Linear Regulator ADP3303 SD Figure 2. Typical Application Circuit GENERAL DESCRIPTION The ADP3303 is a member of the ADP330x family of precision low dropout anyCAP 1 voltage regulators. The ADP3303 stands out from the conventional LDOs with a different architecture, an enhanced process, and a different package. Its patented design requires only a 0.47 µF output capacitor for stability. This device is insensitive to capacitor Equivalent Series Resistance (ESR) and is stable with any good quality capacitor, including ceramic types (MLCC) for space restricted applications. The ADP3303 achieves exceptional accuracy of ±0.8% at room temperature and ±1.4% overall accuracy over temperature, line, and load regulations. The dropout voltage of the ADP3303 is only 180 mV (typical) at 200 mA. In addition to the architecture and process, the Analog Devices, Inc., proprietary thermally enhanced package (Thermal Coastline) can handle 1 W of power dissipation without external heatsink or large copper surface on the printed circuit board (PCB). This keeps PCB real estate to a minimum and makes the ADP3303 very attractive for use in portable equipment. Rev. C The ADP3303 operates with a wide input voltage range from 3.2 V to 12 V and delivers a load current in excess of 200 mA. It features an error flag that signals when the device is about to lose regulation or when the short circuit or thermal overload protection is activated. Other features include shutdown and optional noise reduction capabilities. The ADP330x anyCAP LDO family offers a wide range of output voltages and output current levels: Table 1. ADP330x anyCAP LDO Family Model ADP3300 ADP3301 ADP3309 1 Output Current 50 mA 100 mA 100 mA Package Options 6-Lead SOT-23 8-Lead SOIC_N 5-Lead SOT-23 anyCAP is a trademark of Analog Devices, Inc. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADP3303 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Capacitor Selection .................................................................... 10 Applications ....................................................................................... 1 Noise Reduction ......................................................................... 10 Functional Block Diagrams ............................................................. 1 Thermal Overload Protection .................................................. 10 General Description ......................................................................... 1 Calculating Junction Temperature ........................................... 10 Revision History ............................................................................... 2 Printed Circuit Board Layout Consideration ......................... 10 Specifications..................................................................................... 3 Error Flag Dropout Detector .................................................... 11 Absolute Maximum Ratings............................................................ 4 Shutdown Mode ......................................................................... 11 Thermal Resistance ...................................................................... 4 Application Circuits ....................................................................... 12 ESD Caution .................................................................................. 4 Crossover Switch ........................................................................ 12 Pin Configuration and Function Descriptions ............................. 5 Higher Output Current ............................................................. 12 Typical Performance Characteristics ............................................. 6 Constant Dropout Post Regulator............................................ 12 Theory of Operation ........................................................................ 9 Outline Dimensions ....................................................................... 13 Application Information ................................................................ 10 Ordering Guide .......................................................................... 13 REVISION HISTORY 3/14—Rev. B to Rev. C Changed SO-8 Package Notation to SOIC_N ........... Throughout Changes to General Description, Added Table 1; Renumbered Sequentially ....................................................................................... 1 Changed Figure 1 to Figure 1 and Figure 2; Renumbered Sequentially ....................................................................................... 1 Changes to Table 6 ............................................................................ 5 Changes to Ordering Guide ............................................................ 9 11/11—Rev. A to Rev. B Changed TA = −20°C to +85°C to TA = −25°C to +85°C .............2 Changed Operating Ambient Temperature Range from −20°C to +85°C to −25°C to +85°C ............................................................3 Changed Operating Junction Temperature Range from −20°C to +85°C to −25°C to +125°C ..........................................................3 Updated Outline Dimensions ..........................................................9 Changes to Ordering Guide .............................................................9 Rev. C | Page 2 of 16 Data Sheet ADP3303 SPECIFICATIONS TA = −25°C to +85°C, VIN = 7 V, CIN = 0.47 µF, COUT = 0.47 µF, unless otherwise noted. 1 Specifications subject to change without notice. Table 2. Parameter OUTPUT VOLTAGE ACCURACY Symbol VOUT LINE REGULATION ∆VO ∆VIN LOAD REGULATION ∆VO ∆I L GROUND CURRENT IGND GROUND CURRENT IN DROPOUT DROPOUT VOLTAGE IGND VDROP SHUTDOWN THRESHOLD VTHSD SHUTDOWN PIN INPUT CURRENT ISDIN GROUND CURRENT IN SHUTDOWN MODE IQ OUTPUT CURRENT IN SHUTDOWN MODE IOSD ERROR PIN OUTPUT LEAKAGE ERROR PIN OUTPUT LOW VOLTAGE PEAK LOAD CURRENT OUTPUT NOISE AT 5 V OUTPUT IEL VEOL ILDPK VNOISE 1 Conditions VIN = VOUTNOM +0.5 V to 12 V IL = 0.1 mA to 200 mA TA = +25°C VIN = VOUTNOM +0.5 V to 12 V IL = 0.1 mA to 200 mA VIN = VOUTNOM +0.5 V to 12 V, TA = +25°C Min −0.8 Typ –1.4 Max +0.8 Units % +1.4 % 0.01 mV/V IL = 0.1 mA to 200 mA, TA = +25°C 0.013 mV/mA IL = 200 mA IL = 0.1 mA VIN = 2.5 V, IL = 0.1 mA VOUT = 98% of VOUTNOM IL = 200 mA IL = 10 mA IL = 1 mA ON OFF 0 < VSD < 5 V 1.5 0.25 1.12 4 0.4 2.5 mA mA mA 0.18 0.02 0.003 0.4 0.07 0.03 0.3 1 V V V V V µA 5 ≤ VSD ≤ 12 V at VIN = 12 V 22 µA VSD = 0, VIN = 12 V, TA = +25°C 1 µA VSD = 0, VIN = 12 V, TA = +85°C 5 µA TA = +25°C at VIN = 12 V TA = +85°C t VIN = 12 V VEO = 5 V ISINK = 400 µA VIN = VOUTNOM + 1 V f = 10 Hz–100 kHz CNR = 0 CNR = 10 nF, CL = 10 µF 2.5 4 13 0.3 µA µA µA V mA 2.0 Ambient temperature of +85°C corresponds to a typical junction temperature of +125°C under typical full load test conditions. Rev. C | Page 3 of 16 0.15 300 100 30 µV rms µV rms ADP3303 Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 3. Parameter Input Supply Voltage Shutdown Input Voltage Error Flag Output Voltage Noise Bypass Pin Voltage Power Dissipation Operating Ambient Temperature Range Operating Junction Temperature Range Storage Temperature Range Lead Temperature Range (Soldering 10 sec) Vapor Phase (60 sec) Infrared (15 sec) Rating –0.3 V to +16 V –0.3 V to +16 V –0.3 V to +16 V –0.3 V to +5 V Internally Limited −25°C to +85°C −25°C to +125°C −65°C to +150°C +300°C +215°C +220°C Table 4. Thermal Resistance Package Type 8-Lead SOIC_N ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. C | Page 4 of 16 θJA 96 θJC 55 Unit °C/W Data Sheet ADP3303 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUT 1 8 IN ADP3303 7 IN TOP VIEW NR 3 (Not to Scale) 6 ERR GND 4 5 SD 10335-003 OUT 2 Figure 3. Pin Configuration Table 5. Pin Function Descriptions Pin No. 1, 2 Mnemonic OUT 3 NR 4 5 GND SD 6 7, 8 ERR IN Description Output of the Regulator. Bypass to ground with a 0.47 µF or larger capacitor. Pin 1 and Pin 2 must be connected together for proper operation. Noise Reduction Pin. Used for reduction of the output noise. See the Noise Reduction section for details. No connection if not used. Ground Pin. Active Low Shutdown Pin. Connect to ground to disable the regulator output. When shutdown is not used, connect this pin to the input pin. Open Collector Output. Goes low to indicate that the output is about to go out of regulation. Regulator Input. Pin 7 and Pin 8 must be connected together for proper operation. Table 6. Other Members of anyCAP Family 1 Model ADP3300 ADP3301 ADP3309 1 2 Output Current 50 mA 100 mA 100 mA Package Options 2 6-Lead SOT-23 8-Lead SOIC_N 5-Lead SOT-23 See individual data sheets for detailed ordering information. SOIC_N = small outline, SOT = surface mount. Rev. C | Page 5 of 16 Comments High accuracy High accuracy Improved MIC5205 ADP3303 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 1600 IL = 0mA 3.3005 IL = 10mA 3.3000 1400 3.2995 GROUND CURRENT (µA) IL = 100mA 3.2990 3.2985 IL = 200mA 3.2980 3.2975 1200 1000 800 IL = 0mA TO 200mA 600 4 5 6 7 8 9 10 11 12 13 14 16 15 200 10335-004 3.2970 3.3 INPUT VOLTAGE (V) 0 140 120 160 180 200 0.2 VIN = 7V VOUT = 3.2V 0.1 OUTPUT VOLTAGE (%) OUTPUT VOLTAGE (V) 100 80 Figure 7. Quiescent Current vs. Load Current 3.2000 3.1995 3.1990 3.1985 3.1980 0 IL = 0mA –0.1 –0.2 –0.3 0 20 40 60 80 100 120 140 160 180 10335-005 3.1975 60 40 OUTPUT LOAD (mA) Figure 4. Line Regulation: Output Voltage vs. Supply Voltage 3.2005 20 10335-007 400 200 OUTPUT LOAD (mA) –0.4 –45 –5 15 35 55 75 95 115 135 TEMPERATURE (°C) Figure 8. Output Voltage Variation % vs. Temperature Figure 5. Output Voltage vs. Load Current 2500 VOUT = 3.3V IL = 0mA 1.0 –25 10335-008 OUTPUT VOLTAGE (V) VOUT = 3.3V VIN = 7V GROUND CURRENT (µA) 0.6 0.4 IL = 200mA 1500 1000 500 0.2 0 0 2 4 6 8 10 12 14 INPUT VOLTAGE (V) 16 0 –25 –5 15 35 55 75 95 115 TEMPERATURE (°C) Figure 6. Quiescent Current vs. Supply Voltage Figure 9. Quiescent Current vs. Temperature Rev. C | Page 6 of 16 135 10335-009 IL = 0mA 10335-006 GROUND CURRENT (µA) 2000 0.8 Data Sheet ADP3303 180 5.02 160 5.01 140 5.00 120 VOLTAGE (V) 100 80 4.99 25Ω, 0.47µF LOAD 4.98 60 VIN 7.5 40 7.0 0 0 20 40 60 80 100 120 140 160 180 200 OUTPUT LOAD (mA) 10335-010 20 0 20 40 80 100 120 140 160 180 200 180 200 TIME (µs) Figure 10. Dropout Voltage vs. Output Current 5 60 10335-013 INPUT-OUTPUT VOLTAGE (mV) VOUT = 5V Figure 13. Line Transient Response 5.02 VOUT = 3.3V VOUT = 5V 5.00 VOLTAGE (V) INPUT-OUTPUT VOLTAGE (V) 5.01 4 3 2 RL = 16.5Ω 4.99 5kΩ, 0.47µF LOAD 4.98 VIN 7.5 1 1 0 2 3 4 3 1 2 0 INPUT VOLTAGE (V) 0 80 100 120 140 160 3.310 VSD = VIN OR 3V VOUT = 3.3V VIN CL = 0.47µF RL = 16.5Ω VOUT = 3.3V 3.305 VOUT 3.300 VOLTAGE (V) 5 4 VOUT 3 3.295 CL = 0.47µF 3.290 I (VOUT) 200 2 0 0 20 40 60 80 100 120 140 TIME (µs) 160 180 200 0 200 400 600 800 TIME (µs) Figure 15. Load Transient for 10 mA to 200 mA Pulse Figure 12. Power-Up Transient Rev. C | Page 7 of 16 1000 10335-015 10 1 10335-012 INPUT-OUTPUT VOLTAGE (V) 60 Figure 14. Line Transient Response 8 6 40 TIME (µs) Figure 11. Power-Up/Power-Down 7 20 10335-014 0 10335-011 7.0 ADP3303 3.310 Data Sheet 4 VOUT = 3.3V (V) 3.305 C = 0.47µF R = 16.5Ω ON 3.3V OUTPUT 3 VOUT 3.300 VOLTAGE (V) 2 3.295 CL = 10µF 3.290 VOUT 1 0 I (VOUT) (mA) 200 5 10 VSD 400 600 800 1000 TIME (µs) 0 5 0 a. 0.47µF, RL = 33kΩ b. 0.47µF, RL = 16.5Ω c. 10µF, RL = 33kΩ d. 10µF, RL = 16.5Ω –10 (V) 3.3V VOUT RIPPLE REJECTION (dB) –20 400 300 (mA) 25 20 Figure 19. Turn Off VIN = 7V 0 15 TIME (µs) Figure 16. Load Transient for 10 mA to 200 mA Pulse 3.5 10 10335-019 200 10335-016 0 0 IOUT 200 100 VOUT = 3.3V b –30 –40 d –50 –60 a –70 b c d –80 0 2 3 5 4 TIME (Seconds) –100 a 10 VOLTAGE NOISE SPECTRAL DENSITY (µV/√Hz) VOUT 3 2 CL = 10µF, RL = 3.3kΩ 1 0 SD 40 80 120 TIME (µs) 160 200 10335-018 VOLTAGE (V) CL = 10µF, RL = 16.5kΩ 0 100k 10 VIN = 7V 5 3 0 10k 1k 1M 10M Figure 20. Power Supply Ripple Rejection 3.3V CL = 0.47µF, RL = 3.3kΩ 100 FREQUENCY (Hz) Figure 17. Short Circuit Current 4 c 10335-020 1 Figure 18. Turn On 0.47µF BYPASS PIN 7, 8 TO PIN 3 VOUT = 5V, CL = 0.47µF, IL = 1mA, CNR = 0 1 VOUT = 3.3V, CL = 0.47µF, IL = 1mA, CNR = 0 0.1 0.01 100 VOUT = 2.7 TO 5V, CL = 10µF, IL = 1mA, CNR = 10nF 1k 10k FREQUENCY (Hz) Figure 21. Output Noise Density Rev. C | Page 8 of 16 100k 10335-021 0 10335-017 –90 Data Sheet ADP3303 THEORY OF OPERATION The new anyCAP LDO ADP3303 uses a single control loop for regulation and reference functions. The output voltage is sensed by a resistive voltage divider consisting of R1 and R2, which is varied to provide the available output voltage options. Feedback is taken from this network by way of a series diode (D1) and a second resistor divider (R3 and R4) to the input of an amplifier. Most LDOs place strict requirements on the range of ESR values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resistance. Moreover, the ESR value, required to keep conventional LDOs stable, changes depending on load and temperature. These ESR limitations make designing with LDOs more difficult because of their unclear specifications and extreme variations over temperature. OUT IN COMPENSATION R1 CAPACITOR ATTENUATION (VBANDGAP /VOUT) Q1 NONINVERTING WIDEBAND DRIVER gm PTAT VOS R4 R3 D1 (a) PTAT CURRENT R2 RLOAD CLOAD GND 10335-022 ADP3303 The patented amplifier controls a new and unique noninverting driver that drives the pass transistor, Q1. The use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole splitting arrangement to achieve reduced sensitivity to the value, type, and ESR of the load capacitance. Figure 22. Functional Block Diagram A very high gain error amplifier is used to control this loop. The amplifier is constructed so that at equilibrium it produces a large, temperature proportional input offset voltage that is repeatable and very well controlled. The temperature-proportional offset voltage is combined with the complementary diode voltage to form a virtual band gap voltage, implicit in the network, although it never appears explicitly in the circuit. Ultimately, this patented design makes it possible to control the loop with only one amplifier. This technique also improves the noise characteristics of the amplifier by providing more flexibility on the tradeoff of noise sources that leads to a low noise design. The R1, R2 divider is chosen in the same ratio as the band gap voltage to the output voltage. Although the R1, R2 resistor divider is loaded by the diode D1 and a second divider consisting of R3 and R4, the values are chosen to produce a temperature stable output. This unique arrangement specifically corrects for the loading of the divider to avoid the error resulting from base current loading in conventional circuits. This is not true with the ADP3303 anyCAP LDO. The ADP3303 can be used with virtually any capacitor, with no constraint on the minimum ESR. The innovative design allows the circuit to be stable with just a small 0.47 µF capacitor on the output. Additional advantages of the pole splitting scheme include superior line noise rejection and very high regulator gain, which leads to excellent line and load regulation. An impressive ±1.4% accuracy is guaranteed over line, load, and temperature. Additional features of the circuit include current limit, thermal shutdown, and noise reduction. Compared to standard solutions that give warning after the output loses regulation, the ADP3303 provides improved system performance by enabling the ERR pin to give warning before the device loses regulation. As the temperature of the chip rises above 165°C, the circuit activates a soft thermal shutdown, indicated by a signal low on the ERR pin, to reduce the current to a safe level. To reduce the noise gain of the loop, the node of the main divider network (a) is made available at the noise reduction (NR) pin, which can be bypassed with a small capacitor (10 nF to 100 nF). Rev. C | Page 9 of 16 ADP3303 Data Sheet APPLICATION INFORMATION CAPACITOR SELECTION CALCULATING JUNCTION TEMPERATURE Output Capacitors Device power dissipation is calculated as follows: As with any micropower device, output transient response is a function of the output capacitance. The ADP3303 is stable with a wide range of capacitor values, types and ESR. A capacitor as low as 0.47 µF is all that is needed for stability; larger capacitors can be used if high output current surges are anticipated. The ADP3303 is stable with extremely low ESR capacitors (ESR ≈ 0), such as multilayer ceramic capacitors (MLCC) or OSCON. PD = (VIN – VOUT) ILOAD + (VIN) IGND where: ILOAD and IGND are load current and ground current. VIN and VOUT are input and output voltages, respectively. Assuming ILOAD = 200 mA, IGND = 2 mA, VIN = 7 V and VOUT = 5.0 V, device power dissipation is: PD = (7 V – 5 V) 200 mA + (7 V) 2 mA = 414 mW Input Bypass Capacitor An input bypass capacitor is not required. For applications in which the input source is high impedance or far from the input pins, use a bypass capacitor. Connecting a 0.47 µF capacitor from the input pins to ground reduces the sensitivity of the circuit to PCB layout. If a larger value output capacitor is used, then a larger value input capacitor is also recommended. NOISE REDUCTION A noise reduction capacitor (CNR) can be used to further reduce the noise by 6 dB to 10 dB (see Figure 23). Low leakage capacitors in the 10 nF to 100 nF range provide the best performance. Since the noise reduction pin (NR) is internally connected to a high impedance node, any connection to this node must be carefully done to avoid noise pickup from external sources. The pad connected to this pin must be as small as possible. Long PCB traces are not recommended. NR 3 ADP3303-5.0 7 VIN C1 + 1µF 1 IN OUT 8 SD 5 2 ERR 6 GND CNR 10nF VOUT = 5V R1 + 330kΩ EOUT C2 10µF 4 10335-023 ON OFF SD Figure 23. Noise Reduction Circuit THERMAL OVERLOAD PROTECTION The ADP3303 is protected against damage due to excessive power dissipation by its thermal overload protection circuit, which limits the die temperature to a maximum of 165°C. Under extreme conditions (that is, high ambient temperature and power dissipation), where die temperature starts to rise above 165°C, the output current is reduced until the die temperature drops to a safe level. The output current is restored when the die temperature is reduced. The proprietary package used in the ADP3303 has a thermal resistance of 96°C/W, significantly lower than a standard 8-lead SOIC_N package at 170°C/W. Junction temperature above ambient temperature is approximately equal to: 0.414 W × 96°C/W = 39.7°C To limit the maximum junction temperature to 125°C, maximum ambient temperature must be lower than: TAMAX = 125°C – 40°C = 85°C PRINTED CIRCUIT BOARD LAYOUT CONSIDERATION All surface mount packages rely on the traces of the PCB to conduct heat away from the package. In standard packages, the dominant component of the heat resistance path is the plastic between the die attach pad and the individual leads. In typical thermally enhanced packages, one or more of the leads are fused to the die attach pad, significantly decreasing this component. To make the improvement meaningful, however, a significant copper area on the PCB must be attached to these fused pins. The patented thermal coastline lead frame design of the ADP3303 (see Figure 24) uniformly minimizes the value of the dominant portion of the thermal resistance. It ensures that heat is conducted away by all pins of the package. This yields a very low, 96°C/W, thermal resistance for an SOIC_N package, without any special board layout requirements, relying on the normal traces connected to the leads. The thermal resistance can be decreased approximately an additional 10% by attaching a few square cm of copper area to the IN pin of the ADP3303. Do not use solder mask or silkscreen on the PCB traces adjacent to the pins of the ADP3303 since it increases the junction to ambient thermal resistance of the package. Current and thermal limit protections are intended to protect the device against accidental overload conditions. For normal operation, device power dissipation must be externally limited so that junction temperatures does not exceed 125°C. Rev. C | Page 10 of 16 Data Sheet ADP3303 voltage below the combined regulated output and drop-out voltages, the ERR flag is activated. The ERR output is an open collector, which is driven low. COPPER LEAD-FRAME 1 8 2 7 Once set, the hysteresis of the ERR flag keeps the output low until a small margin of operating range is restored either by raising the supply voltage or reducing the load. 6 SHUTDOWN MODE COPPER PADDLE 4 5 Applying a TTL high signal to the shutdown (SD) pin, or tying it to the input pin, turns the output on. Pulling SD down to 0.3 V or below, or tying it to ground, turns the output off. In shutdown mode, quiescent current is reduced to much less than 1 µA. 10335-024 3 Figure 24. Thermal Coastline ERROR FLAG DROPOUT DETECTOR The ADP3303 maintains its output voltage over a wide range of load, input voltage and temperature conditions. If, for example, the output is about to lose regulation by reducing the supply Rev. C | Page 11 of 16 ADP3303 Data Sheet APPLICATION CIRCUITS MJE253* CROSSOVER SWITCH VIN = 6V TO 8V C1 47µF The circuit in Figure 25 shows that two ADP3303s can be used to form a mixed supply voltage system. The output switches between two different levels selected by an external digital input. Output voltages can be any combination of voltages from the Ordering Guide. VOUT = 5V AT 1A R1 50Ω IN OUT ERR SD VIN = 5.5V TO 12V OUT IN C2 10µF ADP3303-5 VOUT = 5V/3.3V GND SD 5V *AAVID531002 HEATSINK IS USED GND 0V Figure 26. High Output Current Linear Regulator CONSTANT DROPOUT POST REGULATOR OUT IN C1 1.0µF 10335-026 ADP3303-5.0 OUTPUT SELECT C2 0.47µF ADP3303-3.3 The circuit in Figure 27 provides high precision with low dropout for any regulated output voltage. It significantly reduces the ripple from a switching regulator while providing a constant dropout voltage, which limits the power dissipation of the LDO to 60 mW. The ADP3000 used in this circuit is a switching regulator in the step-up configuration. 10335-025 SD GND Figure 25. Crossover Switch HIGHER OUTPUT CURRENT The ADP3303 can source up to 200 mA without any heatsink or pass transistor. If higher current is needed, an appropriate pass transistor can be used, as in Figure 26, to increase the output current to 1 A. L1 6.8µH ADP3303-3.3 IN C1 100µF 10V R1 120Ω ILIM C2 100µF 10V VIN SW2 3.3V AT 160mA OUT GND + C3 2.2µF SW1 ADP3000-ADJ GND R2 30.1kΩ 1% SD Q1 2N3906 FB Q2 2N3906 R3 124kΩ 1% Figure 27. Constant Dropout Post Regulator Rev. C | Page 12 of 16 R4 274kΩ 10335-027 VIN = 2.5V TO 3.5V D1 1N5817 Data Sheet ADP3303 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 1 5 6.20 (0.2441) 5.80 (0.2284) 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 0.50 (0.0196) 0.25 (0.0099) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 012407-A 8 4.00 (0.1574) 3.80 (0.1497) Figure 28. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model 1 ADP3303AR-3-REEL ADP3303AR-3.2-REEL ADP3303ARZ-3.3 ADP3303ARZ-3.3-RL7 ADP3303ARZ-3.3REEL ADP3303ARZ-5 ADP3303ARZ-5-REEL 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Output Voltage (V) 3 3.2 3.3 3.3 3.3 5 5 Z = RoHS Compliant Part. Rev. C | Page 13 of 16 Package Description 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N Package Option R-8 R-8 R-8 R-8 R-8 R-8 R-8 ADP3303 Data Sheet NOTES Rev. C | Page 14 of 16 Data Sheet ADP3303 NOTES Rev. C | Page 15 of 16 ADP3303 Data Sheet NOTES ©2014 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D10335-0-3/14(C) Rev. C | Page 16 of 16