ATMEL AT27C080-90TU 8-megabit (1m x 8) otp eprom Datasheet

Features
• Fast Read Access Time – 90 ns
• Low Power CMOS Operation
•
•
•
•
•
•
•
•
– 100 µA Max Standby
– 40 mA Max Active at 5 MHz
JEDEC Standard Packages
– 32-lead PLCC
– 32-lead PDIP
– 32-lead TSOP
5V ± 10% Supply
High-Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Rapid Programming Algorithm – 50 µs/Byte (Typical)
CMOS and TTL Compatible Inputs and Outputs
Integrated Product Identification Code
Industrial Temperature Range
Green (Pb/Halide-free) Packaging Option
8-Megabit
(1M x 8) OTP
EPROM
AT27C080
1. Description
The AT27C080 chip is a low-power, high-performance 8,388,608-bit one-time programmable read only memory (OTP EPROM) organized as 1M by 8 bits. The
AT27C080 requires only one 5V power supply in normal read mode operation. Any
byte can be accessed in less than 90 ns, eliminating the need for speed reducing
WAIT states on high-performance microprocessor systems.
Atmel’s scaled CMOS technology provides low active power consumption and fast
programming. Power consumption is typically 10 mA in active mode and less than
10 µA in standby mode.
The AT27C080 is available in a choice of packages, including; one-time programmable (OTP) plastic PLCC, PDIP and TSOP. All devices feature two-line control (CE,
OE) to give designers the flexibility to prevent bus contention.
With high density 1-Mbyte storage capability, the AT27C080 allows firmware to be
stored reliably and to be accessed by the system without the delays of mass storage
media.
Atmel’s AT27C080 has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming time is typically only
50 µs/byte. The Integrated Product Identification Code electronically identifies the
device and manufacturer. This feature is used by industry standard programming
equipment to select the proper programming algorithms and voltages.
0360L–EPROM–12/07
2. Pin Configurations
Pin Name
Function
A0 - A19
Addresses
O0 - O7
Outputs
CE
Chip Enable
OE/VPP
Output Enable/Program Supply
2.2
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A7
A6
A5
A4
A3
A2
A1
A0
O0
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
A14
A13
A8
A9
A11
OE/VPP
A10
CE
O7
32-lead PDIP Top View
A19
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
2
OE/VPP
A10
CE
O7
O6
O5
O4
O3
GND
O2
O1
O0
A0
A1
A2
A3
A12
A15
A16
A19
VCC
A18
A17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32-lead PLCC Top View
4
3
2
1
32
31
30
A11
A9
A8
A13
A14
A17
A18
VCC
A19
A16
A15
A12
A7
A6
A5
A4
2.3
14
15
16
17
18
19
20
32-lead TSOP (Type 1) Top View
O1
O2
GND
O3
O4
O5
O6
2.1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A18
A17
A14
A13
A8
A9
A11
OE/VPP
A10
CE
O7
O6
O5
O4
O3
AT27C080
0360L–EPROM–12/07
AT27C080
3. System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the VCC and Ground terminals of the device, as close
to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the VCC and Ground terminals. This capacitor should be positioned as
close as possible to the point where the power supply is connected to the array.
4. Block Diagram
5. Absolute Maximum Ratings*
Temperature Under Bias................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V(1)
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V(1)
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions beyond those
indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
VPP Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V(1)
Integrated UV Erase Dose............................. 7258 W•sec/cm2
Note:
1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
VCC + 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns.
3
0360L–EPROM–12/07
6. Operating Modes
Mode/Pin
CE
OE/VPP
Ai
Outputs
Read
VIL
VIL
Ai
DOUT
Output Disable
(1)
X
VIH
VIH
X
X
High Z
VIL
VPP
Ai
DIN
PGM Verify
VIL
VIL
Ai
DOUT
PGM Inhibit
VIH
VPP
X
Standby
Rapid Program
(2)
X
High Z
High Z
(3)
Product Identification(4)
Notes:
VIL
VIL
A9 = VH
A0 = VIH or VIL
A1 - A19 = VIL
Identification Code
1. X can be VIL or VIH.
2. Refer to Programming Characteristics.
3. VH = 12.0 ± 0.5V.
4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled
low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.
7. DC and AC Operating Conditions for Read Operation
AT27C080-90
Industrial Operating Temperature (Case)
-40° C - 85° C
5V ± 10%
VCC Power Supply
8. DC and Operating Characteristics for Read Operation
Symbol
Parameter
Condition
ILI
Input Load Current
ILO
Output Leakage Current
ISB
VCC(1) Standby Current
ICC
VCC Active Current
VIL
Input Low Voltage
VIH
Input High Voltage
VOL
Output Low Voltage
IOL = 2.1 mA
VOH
Output High Voltage
IOH = -400 µA
Note:
4
Min
Max
Units
VIN = 0V to VCC (Com., Ind.)
±1.0
µA
VOUT = 0V to VCC (Com., Ind.)
±5.0
µA
ISB1 (CMOS), CE = VCC ± 0.3V
100
µA
ISB2 (TTL), CE = 2.0 to VCC + 0.5V
1.0
mA
f = 5 MHz, IOUT = 0 mA, CE = VIL
40
mA
-0.6
0.8
V
2.0
VCC + 0.5
V
0.4
V
2.4
V
1. VCC must be applied simultaneously or before OE/ VPP, and removed simultaneously or after OE/VPP.
AT27C080
0360L–EPROM–12/07
AT27C080
9. AC Characteristics for Read Operation
AT27C080-90
Symbol
Parameter
Condition
tACC(4)
Address to Output Delay
tCE(3)
Min
Max
Units
CE = OE/VPP
= VIL
90
ns
CE to Output Delay
OE = VIL
90
ns
tOE(3)(4)
OE to Output Delay
CE = VIL
20
ns
tDF(2)(5)
OE or CE High to Output Float, whichever occurred first
30
ns
tOH
Output Hold from Address, CE or OE/VPP, whichever occurred first
0
ns
10. AC Waveforms for Read Operation(1)
Notes:
1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. tDF is specified form OE/VPP or CE, whichever occurs first. Output float is defined as the point when data is no longer driven.
3. OE/VPP may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
4. OE/VPP may be delayed up to tACC- tOE after the address is valid without impact on tACC.
5. This parameter is only sampled and is not 100% tested.
5
0360L–EPROM–12/07
11. Input Test Waveform and Measurement Levels
tR, tF < 20 ns (10% to 90%)
12. Output Test Load
1.3V
(1N914)
OUTPUT
PIN
3.3K
CL
Note:
CL = 100 pF including jig capacitance.
13. Pin Capacitance
f = 1 MHz, T = 25° C(1)
Symbol
Typ
Max
Units
Conditions
CIN
4
8
pF
VIN = 0V
COUT
8
12
pF
VOUT = 0V
Note:
6
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
AT27C080
0360L–EPROM–12/07
AT27C080
14. Programming Waveforms
Notes:
1. The Input Timing reference is 0.8V for VIL and 2.0V for VIH.
2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer.
7
0360L–EPROM–12/07
15. DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V
Limits
Symbol
Parameter
Test Conditions
ILI
Input Load Current
VIN = VIL, VIH
VIL
Input Low Level
VIH
Input High Level
VOL
Output Low Voltage
IOL = 2.1 mA
VOH
Output High Voltage
IOH = -400 µA
ICC2
VCC Supply Current (Program and Verify)
IPP2
OE/VPP Supply Current
VID
A9 Product Identification Voltage
Min
Max
Units
±10
µA
-0.6
0.8
V
2.0
VCC + 1.0
V
0.4
V
2.4
V
40
mA
25
mA
12.5
V
Max
Units
CE = VIL
11.5
16. AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V
Limits
(1)
Symbol
Parameter
Test Conditions
tAS
Address Setup Time
2.0
µs
tOES
OE/VPP Setup Time
2.0
µs
tOEH
OE/VPP Hold Time
2.0
µs
tDS
Data SetupTime
2.0
µs
tAH
Address Hold Time
0.0
µs
tDH
Data Hold Time
2.0
µs
Input Rise and Fall Times:
(10% to 90%) 20 ns
Input Pulse Levels:
0.45V to 2.4V
(2)
tDFP
CE High to Output Float Delay
tVCS
VCC Setup Time
tPW
CE Program Pulse Width(3)
tDV
Data Valid from CE
tVR
OE/VPP Recovery Time
tPRT
OE/VPP Pulse Rise Time During
Programming
Notes:
Min
0.0
Input Timing Reference Level:
0.8V to 2.0V
130
2.0
µs
47.5
Output Timing Reference Level:
0.8V to 2.0V
ns
52.5
µs
1.0
µs
2.0
ns
50
ns
1. VCC must be applied simultaneously or before OE/VPP and removed simultaneously or after OE/VPP.
2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven –
see timing diagram.
3. Program Pulse width tolerance is 50 µs ± 5%.
17. Atmel’s AT27C080 Integrated Product Identification Code
Pins
Codes
A0
O7
O6
O5
O4
O3
O2
O1
O0
Hex Data
Manufacturer
0
0
0
0
1
1
1
1
0
1E
Device Type
1
1
0
0
0
1
0
1
0
8A
8
AT27C080
0360L–EPROM–12/07
AT27C080
18. Rapid Programming Algorithm
A 50 µs CE pulse width is used to program. The address is set to the first location. VCC is
raised to 6.5V and OE/VPP is raised to 13.0V. Each address is first programmed with one
50 µs CE pulse without verification. Then a verification reprogramming loop is executed for
each address. In the event a byte fails to pass verification, up to 10 successive 50 µs pulses
are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have
been applied, the part is considered failed. After the byte verifies properly, the next address is
selected until all have been checked. OE/VPP is then lowered to VIL and VCC to 5.0V. All bytes
are read again and compared with the original data to determine if the device passes or fails.
9
0360L–EPROM–12/07
19. Ordering Information
19.1
Standard Package
ICC (mA)
tACC
(ns)
Active
Standby
Ordering Code
Package
90
40
0.1
AT27C080-90JI
AT27C080-90PI
AT27C080-90TI
32J
32P6
32T
Note:
19.2
Operation Range
Industrial
(-40° C to 85° C)
Not recommended for new designs. Use Green package option.
Green Package (Pb/Halide-free)
ICC (mA)
tACC
(ns)
Active
Standby
Ordering Code
Package
90
40
0.1
AT27C080-90JU
AT27C080-90PU
AT27C080-90TU
32J
32P6
32T
Operation Range
Industrial
(-40° C to 85° C)
Package Type
32J
32-lead, Plastic J-leaded Chip Carrier (PLCC)
32P6
32-lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
32T
32-lead, Plastic Thin Small Outline Package (TSOP)
10
AT27C080
0360L–EPROM–12/07
AT27C080
20. Package Information
20.1
32J – PLCC
1.14(0.045) X 45˚
PIN NO. 1
IDENTIFIER
1.14(0.045) X 45˚
0.318(0.0125)
0.191(0.0075)
E1
E2
B1
E
B
e
A2
D1
A1
D
A
0.51(0.020)MAX
45˚ MAX (3X)
COMMON DIMENSIONS
(Unit of Measure = mm)
D2
Notes:
1. This package conforms to JEDEC reference MS-016, Variation AE.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254 mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
3. Lead coplanarity is 0.004" (0.102 mm) maximum.
SYMBOL
MIN
NOM
MAX
A
3.175
–
3.556
A1
1.524
–
2.413
A2
0.381
–
–
D
12.319
–
12.573
D1
11.354
–
11.506
D2
9.906
–
10.922
E
14.859
–
15.113
E1
13.894
–
14.046
E2
12.471
–
13.487
B
0.660
–
0.813
B1
0.330
–
0.533
e
NOTE
Note 2
Note 2
1.270 TYP
10/04/01
R
2325 Orchard Parkway
San Jose, CA 95131
TITLE
32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC)
DRAWING NO.
REV.
32J
B
11
0360L–EPROM–12/07
20.2
32P6 – PDIP
D
PIN
1
E1
A
SEATING PLANE
A1
L
B
B1
e
E
0º ~ 15º
C
COMMON DIMENSIONS
(Unit of Measure = mm)
REF
MIN
NOM
MAX
A
–
–
4.826
A1
0.381
–
–
D
41.783
–
42.291
E
15.240
–
15.875
E1
13.462
–
13.970
B
0.356
–
0.559
B1
1.041
–
1.651
L
3.048
–
3.556
C
0.203
–
0.381
eB
15.494
–
17.526
SYMBOL
eB
Note:
1. Dimensions D and E1 do not include mold Flash or Protrusion.
Mold Flash or Protrusion shall not exceed 0.25 mm (0.010").
e
NOTE
Note 1
Note 1
2.540 TYP
09/28/01
R
12
2325 Orchard Parkway
San Jose, CA 95131
TITLE
32P6, 32-lead (0.600"/15.24 mm Wide) Plastic Dual
Inline Package (PDIP)
DRAWING NO.
32P6
REV.
B
AT27C080
0360L–EPROM–12/07
AT27C080
20.3
32T – TSOP
PIN 1
0º ~ 8º
c
Pin 1 Identifier
D1 D
L
b
e
L1
A2
E
A
GAGE PLANE
SEATING PLANE
COMMON DIMENSIONS
(Unit of Measure = mm)
A1
MIN
NOM
MAX
A
–
–
1.20
A1
0.05
–
0.15
A2
0.95
1.00
1.05
D
19.80
20.00
20.20
D1
18.30
18.40
18.50
Note 2
E
7.90
8.00
8.10
Note 2
L
0.50
0.60
0.70
SYMBOL
Notes:
1. This package conforms to JEDEC reference MO-142, Variation BD.
2. Dimensions D1 and E do not include mold protrusion. Allowable
protrusion on E is 0.15 mm per side and on D1 is 0.25 mm per side.
3. Lead coplanarity is 0.10 mm maximum.
L1
0.25 BASIC
b
0.17
0.22
0.27
c
0.10
–
0.21
e
NOTE
0.50 BASIC
10/18/01
R
2325 Orchard Parkway
San Jose, CA 95131
TITLE
32T, 32-lead (8 x 20 mm Package) Plastic Thin Small Outline
Package, Type I (TSOP)
DRAWING NO.
REV.
32T
B
13
0360L–EPROM–12/07
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International
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0360L–EPROM–12/07
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