Revised August 1999 74FR9240 9-Bit Buffer/Line Driver with 3-STATE Outputs General Description Features The 74FR9240 is an inverting 9-bit buffer and line driver designed to be employed as memory and address driver, clock driver and bus oriented transmitter or receiver. ■ 3-STATE outputs drive bus lines or buffer memory address registers ■ Outputs sink 64 mA and source 15 mA ■ Guaranteed multiple output switching, 250 pF delay and pin-to-pin skew ■ Guaranteed 4000V minimum ESD protection ■ 9-bit architecture for systems carrying parity Ordering Code: Order Number Package Number Package Description 74FR9240SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74FR9240SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Description Pin Names Description OE1, OE2 Output Enable Input (Active-LOW) I0–I8 Inputs O0–O8 Outputs Truth Table OE1 OE2 In On H X X Z X H X Z L L H L L L L H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance © 1999 Fairchild Semiconductor Corporation DS010912 www.fairchildsemi.com 74FR9240 9-Bit Buffer/Line Driver with 3-STATE Outputs April 1991 74FR9240 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions −65°C to +150°C Storage Temperature Ambient Temperature under Bias −55°C to +125°C Free Air Ambient Temperature Junction Temperature under Bias −55°C to +150°C Supply Voltage 0°C to +70°C +4.5V to +5.5V −0.5V to +7.0V VCC Pin Potential to Ground Pin Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Current Applied to Output in LOW State (Max) Note 2: Either voltage limit or current limit is sufficient to protect inputs. Twice the Rated IOL (mA) ESD Last Passing Voltage (Min) 4000V DC Electrical Characteristics Symbol Parameter Min Typ Max 2.0 Units VCC V Conditions VIH Input HIGH Voltage Recognized HIGH Signal VIL Input LOW Voltage 0.8 V VCD Input Clamp Diode Voltage −1.2 V Min VOH Output HIGH Voltage 2.4 V Min IOH = −3 mA 2.0 V Min IOH = −15 mA Recognized LOW Signal IIN = −18 mA VOL Output LOW Voltage 0.55 V Min IOL = 64 mA IIH Input HIGH Current 5 µA Max VIN = 2.7V IBVI Input HIGH Current 7 µA Max VIN = 7.0V −150 µA Max VIN = 0.5V V 0.0 IID = 1.9 µA, 3.75 µA 0.0 VIOD = 150 mV, 20 µA Max VOUT = 2.7V VOUT = 0.5V Breakdown Test IIL Input LOW Current VID Input Leakage Test IOD Output Circuit Leakage Current IOZH Output Leakage Current IOZL Output Leakage Current IOS Output Short-Circuit Current ICEX Output HIGH Leakage Current 4.75 All Other Pins Grounded All Other Pins Grounded −100 −20 µA Max −225 mA Max VOUT = 0.0V 50 µA Max VOUT = VCC IZZ Bus Drainage Test 100 µA 0.0 VOUT = 5.25V ICCH Power Supply Current 9 13 mA Max All Outputs HIGH ICCL Power Supply Current 37 45 mA Max All Outputs LOW ICCZ Power Supply Current 31 38 mA Max Outputs 3-STATE CIN Input Capacitance 8.0 pF 5.0 www.fairchildsemi.com 2 Symbol Parameter TA = +25°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 50 pF Min Typ Max Min Max tPLH Propagation Delay 1.0 3.3 4.5 1.0 4.5 tPHL An to Bn or Bn to An 1.0 2.9 4.5 1.0 4.5 tPZH Output Enable Time 2.6 4.0 6.6 2.6 6.6 2.6 6.3 6.6 2.6 6.6 1.7 3.3 6.2 1.7 6.2 1.7 2.9 6.2 1.7 6.2 tPZL tPHZ Output Disable Time tPLZ Units ns ns ns Extended AC Electrical Characteristics Symbol Parameter TA = 0°C to +70°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 250 pF Units Eight Outputs Switching (Note 3) (Note 4) Min Max Min Max tPLH Propagation Delay 1.0 6.0 2.3 8.3 tPHL An to Bn or Bn to An 1.0 6.0 2.3 8.3 tPZH Output Enable Time tPZL tPHZ Output Disable Time tPLZ tOSHL Pin-to-Pin Skew (Note 5) for HL Transitions tOSLH Pin-to-Pin Skew (Note 5) for LH Transitions tOST Pin-to-Pin Skew (Note 5) for HL/LH Transitions 2.6 7.2 2.6 7.2 1.7 6.6 1.7 6.6 ns ns ns 2.0 ns 1.1 ns 3.0 ns Note 3: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase, i.e., all LOW-to-HIGH, HIGH-to-LOW, 3-STATE-to-HIGH, etc. Note 4: These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load. This specification pertains to single output switching only. Note 5: Skew is defined as the absolute value of the difference between the actual propagation delays for any two outputs of the same device. The specification applies to any outputs switching HIGH-to-LOW, (tOSHL), LOW-to-HIGH, (tOSLH), or HIGH-to-LOW and/or LOW-to-HIGH, (t OST). Specifications guaranteed with all outputs switching in phase. 3 www.fairchildsemi.com 74FR9240 AC Electrical Characteristics 74FR9240 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M24B www.fairchildsemi.com 4 74FR9240 9-Bit Buffer/Line Driver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide Package Number N24C Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com