Central CP782X Small signal transistor pnp - low vce(sat) transistor chip Datasheet

PROCESS
CP782X
Small Signal Transistor
PNP - Low VCE(SAT) Transistor Chip
PROCESS DETAILS
Die Size
26 x 26 MILS
Die Thickness
5.9 MILS
Base Bonding Pad Area
5.5 x 5.5 MILS
Emitter Bonding Pad Area
5.5 x 5.5 MILS
Top Side Metalization
Al - 30,000Å
Back Side Metalization
Au - 12,000Å
GEOMETRY
GROSS DIE PER 5 INCH WAFER
25,536
PRINCIPAL DEVICE TYPES
CMLT7820G
CMPT7820
CXT7820
R0 (9-September 2010)
w w w. c e n t r a l s e m i . c o m
PROCESS
CP782X
Typical Electrical Characteristics
R0 (9-September 2010)
w w w. c e n t r a l s e m i . c o m
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