FAIRCHILD 74LCX07MX_NL

Revised February 2005
74LCX07
Low Voltage Hex Buffer with Open Drain Outputs
General Description
Features
The LCX07 contains six buffers. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V
systems.
■ 5V tolerant inputs
The outputs of the LCX07 are open drain and can be connected to other open drain outputs to implement active
HIGH wire AND or active LOW wire OR functions.
The 74LCX07 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining
CMOS low power dissipation.
■ 2.3V to 5.5V VCC specifications provided
■ 2.9 ns tPD max (VCC
3.3V), 10 PA ICC max
■ Power down high impedance inputs and outputs
■ 24 mA output drive (VCC
3.0V)
■ Implements patented noise/EMI reduction circuitry
■ Latch-up performance exceeds JEDEC 78 conditions
■ ESD performance:
Human body model ! 2000V
Machine model ! 200V
■ Leadless Pb-Free DQFN package
Ordering Code:
Order Number
Package
Package Description
Number
74LCX07M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LCX07MX_NL
(Note 1)
M14A
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LCX07SJ
74LCX07BQX
(Note 2)
M14D
MLP014A
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
74LCX07MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LCX07MTCX_NL
(Note 1)
MTC14
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Note 2: DQFN package available in Tape and Reel only.
© 2005 Fairchild Semiconductor Corporation
DS500238
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74LCX07 Low Voltage Hex Buffer with Open Drain Outputs
October 1999
74LCX07
Logic Symbol
Connection Diagrams
IEEE/IEC
Pin Assignments for SOIC, SOP, and TSSOP
Pad Assignments for DQFN
Pin Descriptions
Pin Names
Description
An
Inputs
On
Outputs
(Top Through View)
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2
Symbol
Parameter
VCC
Supply Voltage
VI
DC Input Voltage
VO
DC Output Voltage
IIK
DC Input Diode Current
IOK
DC Output Diode Current
Value
IO
DC Output Current
ICC
DC Supply Current per Supply Pin
IGND
DC Ground Current per Ground Pin
TSTG
Storage Temperature
Recommended Operating Conditions
Symbol
VCC
Conditions
0.5 to 7.0
0.5 to 7.0
0.5 to 7.0
50
50
50
r50
r100
r100
65 to 150
Units
V
V
Output in HIGH or LOW State (Note 4)
VI GND
V
mA
VO GND
mA
VO ! VCC
mA
mA
mA
qC
(Note 5)
Parameter
Min
Max
Operating
2.0
5.5
Data Retention
1.5
5.5
Supply Voltage
Units
V
VI
Input Voltage
0
5.5
V
VO
Output Voltage
0
5.5
V
IOL
Output Current
32
24
12
8
mA
VCC
TA
Free-Air Operating Temperature
't/'V
Input Edge Rate, VIN
0.8V–2.0V, VCC
4.5 5.5V
VCC
3.0V 3.6V
VCC
2.7V 3.0V
VCC
2.3V 2.7V
40
85
qC
0
10
ns/V
3.0V
Note 3: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The Recommended Operating Conditions table will define the conditions for actual device operation.
Note 4: IO Absolute Maximum Rating must be observed.
Note 5: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
VIH
VIL
VOL
Parameter
Conditions
HIGH Level Input Voltage
2.3 2.7
1.7
2.7 3.6
2.0
4.5 5.5
0.7 x VCC
Max
Units
V
0.7
2.7 3.6
0.8
4.5 - 5.5
0.3 x VCC
100 PA
2.3 5.5
0.2
IOL
8 mA
2.3
0.6
IOL
12 mA
2.7
0.4
IOL
16 mA
3.0
0.4
IOL
24 mA
3.0
0.55
IOL
32 mA
V
V
4.5
0.55
2.3 5.5
r5.0
PA
0
10
PA
VCC or GND
2.3 5.5
10
3.6V d VI d 5.5V
2.3 5.5
r10
V CC 0.6V
2.3 3.6
500
PA
4.5 5.5
1
mA
2 - 5.5
10
PA
Input Leakage Current
0 d VI d 5.5V
IOFF
Power-Off Leakage Current
VI or VO
ICC
Quiescent Supply Current
VI
'ICC
Increase in ICC per Input
VIH
Off State Current
40qC to 85qC
Min
IOL
II
IOHZ
TA
(V)
2.3 2.7
LOW Level Input Voltage
LOW Level Output Voltage
VCC
VO
5.5V
5.5
3
PA
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74LCX07
Absolute Maximum Ratings(Note 3)
74LCX07
AC Electrical Characteristics
TA
Symbol
VCC
Parameter
5.0V r 0.5V
VCC
CL 50 pF
tPZL
Propagation Delay Time
tPLZ
40qC to 85qC, RL
3.3V r 0.3V
500:
VCC
CL 50 pF
2.7V
VCC
CL 50 pF
2.5V r 0.2V
Units
CL 30 pF
Min
Max
Min
Max
Min
Max
Min
Max
0.5
3.0
0.8
3.7
1.0
4.4
0.8
3.8
0.5
3.0
0.8
3.7
1.0
4.4
0.8
3.8
ns
Dynamic Switching Characteristics
Symbol
Parameter
VOLP
Quiet Output Dynamic Peak VOL
VOLV
Quiet Output Dynamic Valley VOL
VCC
Conditions
TA
25qC
(V)
Typical
0.9
CL
50 pF, VIH
3.3V, VIL
0V
3.3
CL
30 pF, VIH
2.5V, VIL
0V
2.5
0.7
CL
50 pF, VIH
3.3V, VIL
0V
3.3
0.8
CL
30 pF, VIH
2.5V, VIL
0V
2.5
0.6
Units
V
V
Capacitance
Symbol
Parameter
Conditions
CIN
Input Capacitance
VCC
Open, VI
COUT
Output Capacitance
VCC
3.3V, VI
0V or VCC
CPD
Power Dissipation Capacitance
VCC
3.3V, VI
0V or VCC, f
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4
0V or VCC
10 MHz
Typical
Units
7
pF
8
pF
25
pF
74LCX07
AC Loading and Waveforms
FIGURE 1. AC Test Circuit
(CL includes probe and jig capacitance)
Test
Switch
VCC x 2 at VCC
tPZL, tPLZ
6V at VCC
5.0 r 0.5V
3.3 r 0.3V
VCC x 2 at VCC
2.5 r 0.2V
trise and tfall
3-STATE Output Low Enable and
Disable Times for Logic
FIGURE 2. Waveforms
(Input Pulse Characteristics; f =1MHz, tr = tf = 3ns)
Symbol
VCC
5.0V r 0.5V
3.3V r 0.3V
2.7V
2.5V r 0.2V
Vmi
VCC/2
1.5V
1.5V
VCC/2
Vmo
VCC/2
1.5V
1.5V
VCC/2
Vx
VOL 0.3V
VOL 0.3V
VOL 0.3V
VOL 0.15V
Vy
VOH 0.3V
VOH 0.3V
VOH 0.3V
VOH 0.15V
5
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74LCX07
Tape and Reel Specification
Tape Format for DQFN
Package
Designator
BQX
Tape
Number
Cavity
Section
Cavities
Status
Cover Tape
Status
Leader (Start End)
125 (typ)
Empty
Sealed
Carrier
2500/3000
Filled
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
TAPE DIMENSIONS inches (millimeters)
REEL DIMENSIONS inches (millimeters)
Tape Size
12 mm
A
B
C
D
N
W1
W2
13.0
0.059
0.512
0.795
7.008
0.488
0.724
(330)
(1.50)
(13.00)
(20.20)
(178)
(12.4)
(18.4)
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74LCX07
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
7
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74LCX07
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
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8
74LCX07
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm
Package Number MLP014A
9
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74LCX07 Low Voltage Hex Buffer with Open Drain Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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