Cadeka CLC1008ISO8X 0.5ma, low cost, 2.5 to 5.5v, 75mhz rail-to-rail amplifier Datasheet

Data Sheet
Comlinear CLC1008, CLC1018, CLC2008
®
General Description
FEATURES
n 505μA supply current
n 75MHz bandwidth
n Power down to 33μA (CLC1018)
n Input voltage range with 5V supply:
-0.3V to 3.8V
n Output voltage range with 5V supply:
0.07V to 4.86V
n 50V/μs slew rate
n 12nV/√Hz input voltage noise
n 15mA linear output current
n Fully specified at 2.7V and 5V supplies
n Replaces AD8031 in VS ≤ 5 applications
n CLC1008: Pb-free SOT23-5, SOIC-8
n CLC1018: Pb-free SOT23-6, SOIC--8
n CLC2008: Pb-free MSOP-8, SOIC-8
The COMLINEAR CLC1008 (single), CLC1018 (single with disable), and
CLC2008 (dual) offer superior dynamic performance with 75MHz small signal
bandwidth and 50V/μs slew rate. These amplifiers use only 505μA of supply
current and are designed to operate from a supply range of 2.5V to 5.5V
(±1.25 to ±2.75).The combination of low power, high output current drive,
and rail-to-rail performance make the CLC1008, CLC1018, and CLC2008 well
suited for battery-powered communication/ computing systems.
The combination of low cost and high performance make the CLC1008,
CLC1018, and CLC2008 suitable for high volume applications in both
consumer and industrial applications such as wireless phones, scanners, and
color copiers.
Typical Performance Examples
APPLICATIONS
n Portable/battery-powered applications
n Mobile communications, cell phones,
pagers
n ADC buffer
n Active filters
n Portable test instruments
n Signal conditioning
n Medical Equipment
n Portable medical instrumentation
Frequency Response vs. Temperature
Frequency Response vs. VOUT
Magnitude (1dB/div)
Magnitude (1dB/div)
Vo = 1Vpp
Vo = 2Vpp
Vo = 4Vpp
0.1
1
10
100
Frequency (MHz)
0.01
1
0.1
10
100
Frequency (MHz)
Ordering Information
Package
Pb-Free
RoHS Compliant
Operating Temperature Range
Packaging Method
CLC1008IST5X*
SOT23-5
Yes
Yes
-40°C to +85°C
Reel
CLC1008ISO8X*
SOIC-8
Yes
Yes
-40°C to +85°C
Reel
CLC1018IST6X*
SOT23-6
Yes
Yes
-40°C to +85°C
Reel
CLC1018ISO8X*
SOIC-8
Yes
Yes
-40°C to +85°C
Reel
CLC2008IMP8X*
MSOP-8
Yes
Yes
-40°C to +85°C
Reel
CLC2008ISO8X
SOIC-8
Yes
Yes
-40°C to +85°C
Reel
Rev 2A
Part Number
Moisture sensitivity level for all parts is MSL-1. *Advance Information, contact CADEKA for availability.
©2009-2011 CADEKA Microcircuits LLC Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
0.5mA, Low Cost, 2.5 to 5.5V, 75MHz Rail-to-Rail Amplifiers
www.cadeka.com
Data Sheet
Prelim
CLC1008 Pin Assignments
CLC1008 Pin Configuration
1
-V S
2
+IN
3
+VS
5
+
-
-IN
4
CLC1018 Pin Configuration
1
-V S
2
+IN
3
+
-
6
+VS
5
DIS
4
-IN
CLC2008 Pin Configuration
+VS
OUT1
1
8
-IN1
2
7
OUT2
+IN1
3
6
-IN2
-V S
4
5
+IN2
1
OUT
Output
2
-VS
Negative supply
3
+IN
Positive input
4
-IN
Negative input
5
+VS
Positive supply
inary
Description
CLC1018 Pin Configuration
Prelim
OUT
Pin Name
Pin No.
Pin Name
1
OUT
Output
2
-VS
Negative supply
3
+IN
Positive input
4
-IN
Negative input
5
DIS
Disable pin. Enabled if pin is left floating or tied
to +VS, disabled if pin is tied to -VS (which is GND
in a single supply application).
6
+VS
Positive supply
inary
Description
CLC2008 Pin Configuration
Pin No.
Pin Name
Description
1
OUT1
Output, channel 1
2
-IN1
Negative input, channel 1
3
+IN1
Positive input, channel 1
4
-VS
5
+IN2
Positive input, channel 2
6
-IN2
Negative input, channel 2
7
OUT2
Output, channel 2
8
+VS
Negative supply
Positive supply
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
OUT
Pin No.
Rev 2A
©2009-2011 CADEKA Microcircuits LLC www.cadeka.com
2
Data Sheet
Absolute Maximum Ratings
The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device
should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the
operating conditions noted on the tables and plots.
Supply Voltage
Input Voltage Range
Continuous Output Current
Min
Max
Unit
0
-Vs -0.5V
-30
6
+Vs +0.5V
30
V
V
mA
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
Parameter
Reliability Information
Parameter
Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering, 10s)
Package Thermal Resistance
5-Lead SOT23
6-Lead SOT23
8-Lead SOIC
8-Lead MSOP
Min
Typ
-65
Max
Unit
175
150
260
°C
°C
°C
221
177
100
139
°C/W
°C/W
°C/W
°C/W
Notes:
Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air.
Recommended Operating Conditions
Parameter
Min
Operating Temperature Range
Supply Voltage Range
-40
2.5
Typ
Max
Unit
+85
5.5
°C
V
Rev 2A
©2009-2011 CADEKA Microcircuits LLC www.cadeka.com
3
Data Sheet
Electrical Characteristics at +2.7V
TA = 25°C, Vs = +2.7V, Rf = Rg =1kΩ, RL = 1kΩ to VS/2, G = 2; unless otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Domain Response
Unity Gain -3dB Bandwidth
G = +1, VOUT = 0.05Vpp , Rf = 0
65
MHz
BWSS
-3dB Bandwidth
G = +2, VOUT < 0.2Vpp
30
MHz
BWLS
Large Signal Bandwidth
G = +2, VOUT = 2Vpp
12
MHz
GBWP
Gain Bandwidth Product
G = +11, VOUT = 0.2Vpp
28
MHz
Time Domain Response
tR, tF
Rise and Fall Time
VOUT = 0.2V step; (10% to 90%)
7.5
ns
tS
Settling Time to 0.1%
VOUT = 1V step
60
ns
OS
Overshoot
VOUT = 1V step
10
%
SR
Slew Rate
2V step, G = -1
40
V/µs
Distortion/Noise Response
HD2
2nd Harmonic Distortion
VOUT = 1Vpp, 1MHz
-67
dBc
HD3
3rd Harmonic Distortion
VOUT = 1Vpp, 1MHz
-72
dBc
THD
Total Harmonic Distortion
VOUT = 1Vpp, 1MHz
65
dB
en
Input Voltage Noise
> 10kHz
12
nV/√Hz
DC Performance
VIO
Input Offset Voltage
0
mV
dVIO
Average Drift
10
µV/°C
Ib
Input Bias Current
1.2
μA
dIb
Average Drift
3.5
nA/°C
IOS
Input Offset Current
30
nA
PSRR
Power Supply Rejection Ratio
66
dB
AOL
Open-Loop Gain
VOUT = VS / 2
98
dB
IS
Supply Current
per channel
470
μA
(1)
DC
60
Disable Characteristics
TON
Turn On Time
0.54
μs
TOFF
Turn Off Time
4.3
μs
OFFISO
Off Isolation
5MHz, RL = 100Ω
58
dB
ISD
Disable Supply Current
per channel, DIS tied to GND
15
μA
Input Characteristics
RIN
Input Resistance
CIN
Input Capacitance
CMIR
Common Mode Input Range
CMRR
Common Mode Rejection Ratio
Non-inverting
9
MΩ
1.5
pF
-0.3 to
1.5
V
74
dB
RL = 1kΩ to VS / 2
0.09 to
2.53
V
RL = 10kΩ to VS / 2
0.05 to
2.6
V
DC, VCM = 0V to VS - 1.5
Output Characteristics
VOUT
Output Voltage Swing
IOUT
Output Current
±15
mA
ISC
Short Circuit Output Current
±30
mA
Notes:
©2009-2011 CADEKA Microcircuits LLC Rev 2A
1. 100% tested at 25°C
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
UGBWSS
www.cadeka.com
4
Data Sheet
Electrical Characteristics at +5V
TA = 25°C, Vs = +5V, Rf = Rg =1kΩ, RL = 1kΩ to VS/2, G = 2; unless otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Domain Response
Unity Gain -3dB Bandwidth
G = +1, VOUT = 0.05Vpp , Rf = 0
75
MHz
BWSS
-3dB Bandwidth
G = +2, VOUT < 0.2Vpp
35
MHz
BWLS
Large Signal Bandwidth
G = +2, VOUT = 2Vpp
15
MHz
GBWP
Gain Bandwidth Product
G = +11, VOUT = 0.2Vpp
33
MHz
Time Domain Response
tR, tF
Rise and Fall Time
VOUT = 0.2V step; (10% to 90%)
6
ns
tS
Settling Time to 0.1%
VOUT = 1V step
60
ns
OS
Overshoot
VOUT = 1V step
12
%
SR
Slew Rate
2V step, G = -1
50
V/µs
Distortion/Noise Response
HD2
2nd Harmonic Distortion
VOUT = 2Vpp, 1MHz
-64
dBc
HD3
3rd Harmonic Distortion
VOUT = 2Vpp, 1MHz
-62
dBc
THD
Total Harmonic Distortion
VOUT = 2Vpp, 1MHz
60
dB
en
Input Voltage Noise
> 10kHz
12
nV/√Hz
DC Performance
VIO
dVIO
Ib
dIb
Input Offset Voltage (1)
-5
Average Drift
-1
5
10
Input Bias Current (1)
-3.5
Average Drift
1.2
µV/°C
3.5
3.5
IOS
Input Offset Current (1)
30
PSRR
Power Supply Rejection Ratio
DC
60
66
AOL
Open-Loop Gain
VOUT = VS / 2
65
80
IS
Supply Current (1)
per channel
(1)
505
mV
μA
nA/°C
350
nA
dB
dB
620
μA
Disable Characteristics
TON
Turn On Time
0.33
μs
TOFF
Turn Off Time
5.5
μs
OFFISO
Off Isolation
5MHz, RL = 100Ω
58
dB
ISD
Disable Supply Current (1)
per channel, DIS tied to GND
33
μA
Input Characteristics
RIN
Input Resistance
CIN
Input Capacitance
CMIR
Common Mode Input Range
CMRR
Common Mode Rejection Ratio
Non-inverting
(1)
DC, VCM = 0V to VS - 1.5
9
MΩ
1.5
pF
-0.3 to
3.8
V
65
74
dB
0.2 to
4.65
0.13 to
4.73
V
0.08 to
4.84
V
Output Characteristics
RL = 1kΩ to VS / 2 (1)
VOUT
Output Voltage Swing
RL = 10kΩ to VS / 2
IOUT
Output Current
±15
mA
ISC
Short Circuit Output Current
±30
mA
Notes:
©2009-2011 CADEKA Microcircuits LLC Rev 2A
1. 100% tested at 25°C
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
UGBWSS
www.cadeka.com
5
Data Sheet
Typical Performance Characteristics
TA = 25°C, Vs = +5V, Rf = Rg =1kΩ, RL = 1kΩ to VS/2, G = 2; unless otherwise noted.
Non-Inverting Frequency Response at VS = 5V
Inverting Frequency Response at VS = 5V
Normalized Magnitude (1dB/div)
Normalized Magnitude (1dB/div)
G=2
Rf = 1kΩ
G = 10
Rf = 1kΩ
G=5
Rf = 1kΩ
0.1
1
10
0.1
100
Frequency (MHz)
G = -10
Rf = 1kΩ
G = -5
Rf = 1kΩ
G = -1
Rf = 1kΩ
1
10
G=1
Rf = 0
G=2
Rf = 1kΩ
G = 10
Rf = 2kΩ
G=5
Rf = 1kΩ
1
10
0.1
100
Frequency (MHz)
G = -1
Rf = 1kΩ
G = -2
Rf = 1kΩ
G = -10
Rf = 1kΩ
G = -5
Rf = 1kΩ
1
10
Frequency Response vs. RL
RL = 1kΩ
CL = 20pF
Rs = 100Ω
CL = 100pF
Rs = 100Ω
CL = 50pF
Rs = 100Ω
Rs
CL
1kΩ
RL
Magnitude (1dB/div)
Magnitude (1dB/div)
CL = 10pF
Rs = 0Ω
+
100
Frequency (MHz)
Frequency Response vs. CL
-
100
Inverting Frequency Response
Normalized Magnitude (1dB/div)
Normalized Magnitude (2dB/div)
G = -2
Rf = 1kΩ
Frequency (MHz)
Non-Inverting Frequency Response
0.1
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
G=1
Rf = 0
RL = 10kΩ
RL = 100Ω
1kΩ
0.1
1
10
©2009-2011 CADEKA Microcircuits LLC 0.1
1
10
100
Frequency (MHz)
Rev 2A
Frequency (MHz)
100
www.cadeka.com
6
Data Sheet
Typical Performance Characteristics
TA = 25°C, Vs = +5V, Rf = Rg =1kΩ, RL = 1kΩ to VS/2, G = 2; unless otherwise noted.
Frequency Response vs. VOUT
Open Loop Gain & Phase vs. Frequency
Open Loop Gain (dB)
Vo = 2Vpp
Vo = 4Vpp
Gain
70
60
50
40
Phase
30
0
20
-45
10
-90
0
-135
-10
0.1
1
10
100
100
1k
10k
Frequency (MHz)
1M
10M
-180
100M
3rd Harmonic Distortion vs. VOUT
-20
-20
-30
-30
-40
-40
Distortion (dB)
Distortion (dBc)
100k
Frequency (Hz)
2nd Harmonic Distortion vs. VOUT
-50
-60
1MHz
-70
500kHz
-80
-50
-60
500kHz
-70
1MHz
100kHz
-80
100kHz
-90
-90
0.5
1
1.5
2
0.5
2.5
Output Amplitude (Vpp)
Vo = 1Vpp
-30
3rd
RL = 150Ω
-40
2.0
2.5
Frequency Response vs. Temperature
3rd
RL = 1kΩ
-50
-60
2nd
RL = 1kΩ
-70
1.5
Magnitude (1dB/div)
-20
1.0
Output Amplitude (Vpp)
2nd & 3rd Harmonic Distortion
Distortion (dBc)
Open Loop Phase (deg)
Magnitude (1dB/div)
80
2nd
RL = 150Ω
-80
-90
0
1
2
3
©2009-2011 CADEKA Microcircuits LLC 5
0.01
0.1
1
10
100
Frequency (MHz)
Rev 2A
Frequency (MHz)
4
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
90
Vo = 1Vpp
www.cadeka.com
7
Data Sheet
Typical Performance Characteristics - Continued
TA = 25°C, Vs = +5V, Rf = Rg =1kΩ, RL = 1kΩ to VS/2, G = 2; unless otherwise noted.
CMRR
PSRR
0
-10
-20
-20
PSRR (dB)
-30
CMRR (dB)
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
0
-10
-40
-50
-60
-70
-30
-40
-50
-60
-80
-70
-90
-100
-80
100
1k
10k
100k
1M
10M
100
100M
Frequency (Hz)
Output Swing
1k
10k
100k
1M
10M
100M
Frequency (Hz)
Output Voltage vs. Output Current
3
Output Voltage (0.5V/div)
Output Voltage (0.6V/div)
2.7
0
-3
0
50
Time (1μs/div)
-50
Output Current (10mA/div)
Small Signal Pulse Response at VS = 5V
Output Voltage (20mV/div)
Output Voltage (20mV/div)
Small Signal Pulse Response
0
©2009-2011 CADEKA Microcircuits LLC Time (10ns/div)
www.cadeka.com
Rev 2A
Time (10ns/div)
8
Data Sheet
Typical Performance Characteristics - Continued
TA = 25°C, Vs = +5V, Rf = Rg =1kΩ, RL = 1kΩ to VS/2, G = 2; unless otherwise noted.
Large Signal Pulse Response at VS = 5V
Input Voltage Noise
Voltage Noise (nV/√Hz)
Output Voltage (0.5V/div)
60
50
40
30
20
10
0
0.0001
Time (10ns/div)
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
70
0.001
0.01
0.1
1
10
Frequency (MHz)
Output Voltage (0.02V/div)
Enable / Disable Response
Vin = 0.2Vpp sinusoid
5V
Disable
Pulse
0V
Output
Time (1μs/div)
Rev 2A
©2009-2011 CADEKA Microcircuits LLC www.cadeka.com
9
Data Sheet
Application Information
+Vs
General Description
Input
Output
-
RL
0.1uF
Figures 1, 2, and 3 illustrate typical circuit configurations for
non-inverting, inverting, and unity gain topologies for dual
supply applications. They show the recommended bypass
capacitor values and overall closed loop gain equations.
Figure 4 shows the typical non-inverting gain circuit for
single supply applicaitons.
6.8uF
G=1
-Vs
Figure 3. Unity Gain Circuit
+Vs
The common mode input range extends to 300mV below
ground in single supply operation. Exceeding these values
will not cause phase reversal. However, if the input voltage
exceeds the rails by more than 0.5V, the input ESD devices
will begin to conduct.
6.8μF
+
In
+
-
The design uses a Darlington output stage. The output
stage is short circuit protected and offers “soft” saturation
protection that improves recovery time.
+Vs
0.1uF
+
0.1μF
Out
Rf
Rg
6.8μF
Figure 4. Single Supply Non-Inverting Gain Circuit
Input
0.1μF
+
Output
-
RL
0.1μF
Rg
Rf
6.8μF
G = 1 + (Rf/Rg)
-Vs
For optimum response at a gain of +2, a feedback resistor
of 1kΩ is recommended. Figure 5 illustrates the CLC1008
frequency response with both 1kΩ and 2kΩ feedback
resistors.
G=2
RL = 1kΩ
+Vs
R1
Input
Rg
6.8μF
0.1μF
+
Output
0.1μF
Rf = 2kΩ
Magnitude (1dB/div)
Figure 1. Typical Non-Inverting Gain Circuit
Rf = 1kΩ
RL
Rf
-Vs
0.1
G = - (Rf/Rg)
For optimum input offset
voltage set R1 = Rf || Rg
Figure 2. Typical Inverting Gain Circuit
©2009-2011 CADEKA Microcircuits LLC 1
10
Rev 2A
6.8μF
100
Frequency (MHz)
Figure 5. Frequency Response vs. Rf
www.cadeka.com
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
The CLC1008 family are a single supply, general purpose,
voltage-feedback amplifiers fabricated on a complementary
bipolar process. The CLC1008 offers 75MHz unity gain
bandwidth, 50V/μs slew rate, and only 505μA supply current.
It features a rail-to-rail output stage and is unity gain stable.
6.8uF
10
Data Sheet
Enable/Disable Function (CLC1018)
PD = PQuiescent + PDynamic - PLoad
Quiescent power can be derived from the specified IS
values along with known supply voltage, VSupply. Load
power can be calculated as above with the desired signal
amplitudes using:
(VLOAD)RMS = VPEAK / √2
Power Dissipation
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction
temperature, the package thermal resistance value
ThetaJA (ӨJA) is used along with the total die power
dissipation.
TJunction = TAmbient + (ӨJA × PD)
Where TAmbient is the temperature of the working environment.
In order to determine PD, the power dissipated in the load
needs to be subtracted from the total power delivered by
the supplies.
PD = Psupply - Pload
Supply power is calculated by the standard power
equation.
Psupply = Vsupply × IRMS supply
Vsupply = VS+ - VS-
( ILOAD)RMS = ( VLOAD)RMS / Rloadeff
The dynamic power is focused primarily within the output
stage driving the load. This value can be calculated as:
PDYNAMIC = (VS+ - VLOAD)RMS × ( ILOAD)RMS
Assuming the load is referenced in the middle of the
power rails or Vsupply/2.
The CLC1008 is short circuit protected. However, this may
not guarantee that the maximum junction temperature
(+150°C) is not exceeded under all conditions. Figure 6
shows the maximum safe power dissipation in the package
vs. the ambient temperature for the packages available.
2
SOIC-8
Maximum Power Dissipation (W)
Power dissipation should not be a factor when operating
under the stated 1k ohm load condition. However,
applications with low impedance, DC coupled loads
should be analyzed to ensure that maximum allowed
junction temperature is not exceeded. Guidelines listed
below can be used to verify that the particular application
will not cause the device to operate beyond it’s intended
operating range.
MSOP-8
1.5
1
0.5
SOT23-6
SOT23-5
0
-40
-20
0
20
40
60
80
Ambient Temperature (°C)
Figure 6. Maximum Power Derating
Power delivered to a purely resistive load is:
Pload = ((VLOAD)RMS2)/Rloadeff
The effective load resistor (Rloadeff) will need to include
the effect of the feedback network. For instance,
RL || (Rf + Rg)
These measurements are basic and are relatively easy to
perform with standard lab equipment. For design purposes
©2009-2011 CADEKA Microcircuits LLC Increased phase delay at the output due to capacitive
loading can cause ringing, peaking in the frequency
response, and possible unstable behavior. Use a series
resistance, RS, between the amplifier and the load to
help improve stability and settling performance. Refer to
Figure 7.
www.cadeka.com
11
Rev 2A
Rloadeff in Figure 3 would be calculated as:
Driving Capacitive Loads
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
The CLC1018 offers an active-low disable pin that can be
used to lower its supply current. Leave the pin floating to
enable the part. Pull the disable pin to the negative supply
(which is ground in a single supply application) to disable
the output. During the disable condition, the nominal
supply current will drop to below 30μA and the output will
be at high impedance with about 2pF capacitance.
however, prior knowledge of actual signal levels and load
impedance is needed to determine the dissipated power.
Here, PD can be found from
Data Sheet
+
Rs
CL
Rf
RL
Figure 7. Addition of RS for Driving Capacitive Loads
Table 1 provides the recommended RS for various capacitive
loads. The recommended RS values result in approximately
<1dB peaking in the frequency response. The Frequency
Response vs. CL plot, on page 4, illustrates the response
of the CLCx008.
Output
Input
Time (200ns/div)
Figure 8. Overdrive Recovery
CL (pF)
RS (Ω)
-3dB BW (kHz)
10pF
0
22
Layout Considerations
20pF
100
19
50pF
100
12
100pF
100
10.2
General layout and supply bypassing play major roles in
high frequency performance. CADEKA has evaluation
boards to use as a guide for high frequency layout and as
an aid in device testing and characterization. Follow the
steps below as a basis for high frequency layout:
Table 1: Recommended RS vs. CL
For a given load capacitance, adjust RS to optimize the
tradeoff between settling time and bandwidth. In general,
reducing RS will increase bandwidth at the expense of
additional overshoot and ringing.
Overdrive Recovery
An overdrive condition is defined as the point when either
one of the inputs or the output exceed their specified
voltage range. Overdrive recovery is the time needed for
the amplifier to return to its normal or linear operating
point. The recovery time varies, based on whether the
input or output is overdriven and by how much the range
is exceeded. The CLC1008, CLC1018, and CLC2008 will
typically recover in less than 20ns from an overdrive
condition. Figure 8 shows the CLC1008 in an overdriven
condition.
▪▪Include 6.8µF and 0.1µF ceramic capacitors for power
supply decoupling
▪▪Place the 6.8µF capacitor within 0.75 inches of the power pin
▪▪Place the 0.1µF capacitor within 0.1 inches of the power pin
▪▪Remove the ground plane under and around the part,
especially near the input and output pins to reduce
parasitic capacitance
▪▪Minimize all trace lengths to reduce series inductances
Refer to the evaluation board layouts below for more
information.
Evaluation Board Information
The following evaluation boards are available to aid in the
testing and layout of these devices:
Evaluation Board #
©2009-2011 CADEKA Microcircuits LLC CLC1008, CLC1018 in SOT23
CLC1008 in SOIC
CLC2008 in SOIC
CLC2008 in MSOP
www.cadeka.com
Rev 2A
CEB002
CEB003
CEB006
CEB010
Products
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
Rg
G=5
Input Voltage (0.5V/div)
-
Output
Output Voltage (1V/div)
Input
12
Data Sheet
Evaluation Board Schematics
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
Evaluation board schematics and layouts are shown in
Figures 8-14. These evaluation boards are built for dualsupply operation. Follow these steps to use the board in a
single-supply application:
1. Short -Vs to ground.
2. Use C3 and C4, if the -VS pin of the amplifier is not
directly connected to the ground plane.
Figure 10. CEB002 Bottom View
Figure 8. CEB002 & CEB003 Schematic
Figure 11. CEB003 Top View
Rev 2A
Figure 9. CEB002 Top View
©2009-2011 CADEKA Microcircuits LLC Figure 12. CEB003 Bottom View
www.cadeka.com
13
Data Sheet
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
Figure 13. CEB006 Bottom View
Figure 11. CEB006 & CEB010 Schematic
Figure 15. CEB010 Top View
Figure 12. CEB006 Top View
Rev 2A
Figure 16. CEB010 Bottom View
©2009-2011 CADEKA Microcircuits LLC www.cadeka.com
14
Data Sheet
Mechanical Dimensions
SOT23-5 Package
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
SOT23-6
Rev 2A
©2009-2011 CADEKA Microcircuits LLC www.cadeka.com
15
Data Sheet
Mechanical Dimensions continued
SOIC-8 Package
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
MSOP-8 Package
e
02
S
Symbol
Min
ÐHÐ
E1 3 7
ÐBÐ
E3
E4
1
6
4
2
ÐCÐ
D2
A2
b
D
4
A1
01
L
03
L1
b
c
b1
Section A - A
A
±
±
Scale 40:1
c1
E2
A
ÐAÐ
bbb M A B C
0.25mm
5
A
aaa A
R
Plane
2
ccc A B C
2
±
±
±
±
±
±
±
±
±
R1
t2
E/2 2X
Max
Ð
t1
E1
E
Detail A
±
±
°
°
°
±3.0°
±3.0°
±3.0°
±
3
2
3
4
5
6
7
Dimension "E1" and "E2" does not include interlead flash or protrusion.
Rev 2A
©2009-2011 CADEKA Microcircuits LLC www.cadeka.com
16
Data Sheet
CADEKA, the CADEKA logo design, COMLINEAR, and the COMLINEAR logo design are trademarks or registered trademarks of CADEKA
Microcircuits LLC. All other brand and product names may be trademarks of their respective companies.
CADEKA reserves the right to make changes to any products and services herein at any time without notice. CADEKA does not assume any
responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in
writing by CADEKA; nor does the purchase, lease, or use of a product or service from CADEKA convey a license under any patent rights,
copyrights, trademark rights, or any other of the intellectual property rights of CADEKA or of third parties.
Copyright ©2009-2011 by CADEKA Microcircuits LLC. All rights reserved.
Rev 2A
CADEKA Headquarters Loveland, Colorado
T: 970.663.5452
T: 877.663.5452 (toll free)
Comlinear CLC1008, CLC1018, CLC2008 0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
For additional information regarding our products, please visit CADEKA at: cadeka.com
Similar pages