TI BQ51011YFFT Integrated wireless power supply receiver Datasheet

bq51010
bq51011
bq51013
SLVSAT9B – APRIL 2011 – REVISED AUGUST 2011
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INTEGRATED WIRELESS POWER SUPPLY RECEIVER,
Qi (WIRELESS POWER CONSORTIUM) COMPLIANT
Check for Samples: bq51010, bq51011, bq51013
FEATURES
1
•
•
•
•
•
•
•
•
Integrated Wireless Power Receiver Solution
with a 5V Regulated Supply
– 93% Overall Peak AC-DC Efficiency
– Full Synchronous Rectifier
– WPC v1.0 Compliant Communication
Control
– Output Voltage Conditioning
– Only IC Required Between RX coil and 5V
DC Output Voltage
Dynamic Rectifier Control for Improved Load
Transient Response
Supports 20-V Maximum Input
Low-power Dissipative Rectifier Overvoltage
Clamp (VOVP = 15V)
Thermal Shutdown
Single NTC/Control Pin for Optimal Safety and
I/O Between Host
Stand-alone Digital Controller
1.9 x 3mm DSBG or 4.5 x 3.5mm QFN Package
APPLICATIONS
•
•
•
•
•
•
Digital Cameras
Portable Media Players
Hand-held Devices
DESCRIPTION
The bq5101x is an advanced, integrated, receiver IC
for wireless power transfer in portable applications.
The device provides the AC/DC power conversion
while integrating the digital control required to comply
with the Qi v1.0 communication protocol. Together
with the bq500210 transmitter controller, the bq5101x
enables a complete contact-less power transfer
system for a wireless power supply solution. By
utilizing near-field inductive power transfer, the
receiver coil embedded in the portable device
receives the power transmitted by the transmitter coil
via mutually coupled inductors. The AC signal from
the receiver coil is then rectified and regulated to be
used as a power supply for down-system electronics.
Global feedback is established from the secondary to
the transmitter in order to stabilize the power transfer
process via back-scatter modulation. This feedback is
established by using the Qi v1.0 communication
protocol supporting up to 5W applications.
The device integrates a low-impedance full
synchronous rectifier, low-dropout regulator, digital
control, and accurate voltage and current loops. The
entire power stage (rectifier and LDO) utilize low
resistive NMOS FET’s to ensures high efficiency and
low power dissipation.
WPC Compliant Receivers
Cell Phones, Smart Phones
Headsets
th
bqTESLA150LP: Receiver Integration 1/5 of the Area Savings
Power
AC to DC
Drivers
bq5101x
Rectification
Voltage
Conditioning
Load
Communication
Controller
V/I
Sense
Controller
bq500210
Transmitter
Receiver
Figure 1. Wireless Power Consortium (WPC or Qi) Inductive Power System
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
bq51010
bq51011
bq51013
SLVSAT9B – APRIL 2011 – REVISED AUGUST 2011
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
Part NO
Marking
Function
Package
bq51013
bq51013
bq51010 (1)
(1)
Quantity
bq51013YFFR
3000
bq51013YFFT
250
bq51013RHLR
3000
DSBGA-YFF
5V Regulated Power Supply
QFN-RHL (1)
WAES
bq51011
Ordering Number
(Tape and Reel)
bq51011
Current Limited Power Supply
bq51010
7V Regulated Power Supply for
Switch-Mode Charger Systems
DSBGA-YFF
DSBGA-YFF
bq51013RHLT
250
bq51011YFFR
3000
bq51011YFFT
250
bq51010YFFR
3000
bq51010YFFT
250
Product Preview
AVAILABLE OPTIONS
Device
Function
VAD_OVP
bq51013
5V Power Supply
bq51011
5V Current Limited
Power Supply
bq51010
7V Power Supply
none
Communication
Current Limit
VRECT-OVP
VRECT(REG)
VOUT(REG)
15V
Dynamic
5V
None
15V
Tracks VOUT
5V
400mA + Dynamic
ILim
15V
Dynamic
7V
None
ABSOLUTE MAXIMUM RATINGS (1) (2)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
Input Voltage
PIN
VALUES
UNITS
MIN
MAX
AC1, AC2, RECT, COMM1, COMM2, OUT,
CHG
-0.3
20
AD, AD-EN
-0.3
30
BOOT1, BOOT2
-0.3
26
V
1
A(RMS)
V
V
Input Current
AC1, AC2
Output Current
OUT
1.5
A
CHG
15
mA
COMM1, COMM2
1
A
Output Sink Current
Junction temperature, TJ
-40
150
°C
Storage temperature, TSTG
-65
150
°C
ESD Rating (HBM) (100pF, 1.5KΩ)
(1)
(2)
2
All
2KV
All voltages are with respect to the VSS terminal, unless otherwise noted.
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
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THERMAL INFORMATION
THERMAL METRIC (1)
RHL
YFF
20 PiNS
28 PINS
θJA
Junction-to-ambient thermal resistance
37.7
58.9
θJCtop
Junction-to-case (top) thermal resistance
35.5
0.2
θJB
Junction-to-board thermal resistance
13.6
9.1
ψJT
Junction-to-top characterization parameter
0.5
1.4
ψJB
Junction-to-board characterization parameter
13.5
8.9
θJCbot
Junction-to-case (bottom) thermal resistance
2.7
n/a
(1)
UNITS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
PINS
MIN
MAX
UNITS
Input voltage range, VIN
PARAMETER
RECT
4
10
V
Input current, IIN
RECT
1.5
A
Output current, IOUT
OUT
1.5
A
Sink current, IAD-EN
AD-EN
1
mA
COMM sink current, ICOMM
COMM
500
mA
125
ºC
Junction Temperature, TJ
0
TYPICAL APPLICATION SCHEMATICS
bq5101x
System
Load
AD-EN
AD
OUT
CCOMM1
C4
COMM1
CBOOT1
D1
BOOT1
RECT
C1
AC1
VTSB
R4
R2
C2
COIL
C3
TS/CTRL
AC2
CBOOT2
NTC
BOOT2
HOST
COMM2
CHG
CLAMP2
EN1
Bi-State
CLAMP1
EN2
Bi-State
CCOMM2
CCLAMP2
C CLAMP1
R3
ILIM
3-State
PGND
R1
Figure 2. bq5101x Used as a Wireless Power Receiver and Power Supply for System Loads
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System
Load
Q1
USB or
AC Adapter
Input
bq5101x
AD-EN
AD
OUT
C COMM1
C4
COMM1
C5
C BOOT1
D1
BOOT1
RECT
C1
AC1
COIL
VTSB
C3
R4
R2
C2
TS/CTRL
AC2
C BOOT2
NTC
HOST
COMM2
CHG
CLAMP2
EN1
Bi-State
CLAMP1
EN2
Bi-State
CCOMM2
C CLAMP2
CCLAMP1
R3
BOOT2
ILIM
3-State
PGND
R1
Figure 3. bq5101x Used as a Wireless Power Receiver and Power Supply for System Loads With Adapter
Power-Path Multiplexing
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range, 0°C to 125°C (unless otherwise noted)
PARAMETER
UVLO
VHYS
VRECT
TEST CONDITIONS
Undervoltage lock-out
VRECT: 0V → 3V
Hysteresis on UVLO
VRECT: 3V → 2V
Hysteresis on OVP
VRECT: 16V → 5V
Input overvoltage threshold
VRECT: 5V → 16V
Dynamic VRECT Threshold 1
bq51011,
bq51013 ILOAD < 100 mA (ILOAD rising)
bq51010
Dynamic VRECT Threshold 2
bq51011,
bq51013 100 mA < ILOAD < 200 mA
(ILOAD rising)
bq51010
Dynamic VRECT Threshold 3
bq51011,
bq51013 200 mA < ILOAD < 400 mA
(ILOAD rising)
bq51010
Dynamic VRECT Threshold 4
bq51011,
bq51013 ILOAD > 400 mA (ILOAD rising)
bq51010
VRECT-REG (1)
ILOAD
ILOAD Hysteresis for dynamic VRECT
thresholds
ILOAD falling
VRECT-TRACK
Tracking VRECT regulation
above VOUT
VOUT = 3.5 V, IOUT = KILIM /
RILIM > 250mA
(1)
4
bq51011
MIN
2.6
TYP
MAX
2.7
2.8
250
15
V
mV
150
14.5
UNIT
mV
15.5
V
7.08
9.05
6.28
8.25
V
5.53
7.50
5.11
7.08
40
mA
250
mV
For the bq51011, VRECT-REG only applies when VRECT-TRACK is not active.
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ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range, 0°C to 125°C (unless otherwise noted)
PARAMETER
IRECT-REG
TEST CONDITIONS
MIN
TYP
Percentage of ILIM at which
bq51011
VRECT(REG) begins to track VOUT
ILOAD rising
60%
Hysteresis percentage of ILOAD
at which VRECT(REG) halts
tracking VOUT
ILOAD falling
20%
bq51011
VRECT-DPM
Rectifier undervoltage protection, restricts
IOUT at VRECT-DPM
VRECT-REV
Rectifier reverse voltage protection when a
supply is present at VOUT
3
MAX
UNIT
3.1
3.2
V
VRECT-REV = VOUT - VRECT,
VOUT = 10V
9
8
V
ILOAD = 0mA, 0°C ≤ TJ ≤ 85°C
8
10
mA
ILOAD = 300mA, 0°C ≤ TJ ≤
85°C
2
2.5
mA
VOUT = 5V, 0°C ≤ TJ ≤ 85°C
20
35
µA
120
Ω
Quiescent Current
IRECT
Active chip quiescent current consumption
from RECT
IOUT
Quiescent current at the output when
wireless power is disabled (Standby)
ILIM Short Circuit
RILIM: 200Ω → 50Ω. IOUT
latches off, cycle power to reset
RILIM
Highest value of ILIM resistor considered a
fault (short). Monitored for IOUT > 100 mA
tDGL
Deglitch time transition from ILIM short to
IOUT disable
ILIM_SC
ILIM-SHORT,OK enables the ILIM short
comparator when IOUT is greater than this
value
ILOAD: 0 → 200mA
IOUT
Maximum output current limit, CL
Maximum ILOAD that will be
delivered for 1 ms when ILIM is
shorted
1
90
105
ms
125
mA
2.4
A
OUTPUT
bq51011, ILOAD = 1000 mA
bq51013 ILOAD = 1 mA
VOUT-REG
Regulated output voltage
VDO
Drop-out voltage, RECT to OUT
ILOAD = 1A
KILIM
Current programming factor
RLIM = KILIM / IILIM, ILOAD = 1 A
IILIM
Current limit programming range
VOUT_SC
OUT pin short-circuit
detection/pre-charge threshold
bq51011
VOUT: 3 V → 0.5 V, no deglitch
VOUT_SC hysteresis
bq51011
VOUT: 0.5 V → 3 V
ICOMM (2)
Current limit during WPC
communication
bq51011
ILOAD = IILIM
IOUT_SC
Source current to OUT pin
during short-circuit detection
bq51011
VOUT = 0V, 0°C ≤ TJ ≤ 85°C
bq51010
ILOAD = 1 mA
4.85
4.95
5
4.95
5
5.05
6.9
280
0.7
V
7
7.1
110
190
300
320
AΩ
1500
mA
0.8
mV
0.9
V
100
365
mV
390
420
mA
15
25
mA
2.2
2.3
V
54
56
58
17
18
TS / CTRL
VTS
TS Bias Voltage
ITS-Bias < 100µA (periodically
driven see tTS/CTRL-Meas)
ITS
TS-Bias Short circuit protection
VTS-Bias = 0V
Rising threshold
VTS: 50% → 60%
Falling hysteresis
VTS: 60% → 50%
Falling threshold
VTS: 20% → 15%
Rising hysteresis
VTS: 15% → 20%
CTRL pin threshold for a high
VTS/CTRL: 50 → 150mV
80
100
130
mV
CTRL pin threshold for a low
VTS/CTRL: 150 → 50mV
50
80
100
mV
VCOLD
VHOT
VCTRL
(2)
2.1
1
3
1
19
mA
%VTS-Bias
1
Dynamic communication current limit enables the 400mA current limit only when the output current is equal to the programmed current
limit (IILIM) for the bq51011.
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ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range, 0°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
tTS/CTRL
Time VTS-Bias is active when TS
measurements occur
tTS
Deglitch time for all TS comparators
MIN
Synchronous to the
communication period
TYP
MAX
UNIT
24
ms
10
ms
155
°C
20
°C
THERMAL PROTECTION
Thermal shutdown temperature
TJ
Thermal shutdown hysteresis
OUTPUT LOGIC LEVELS ON /CH
VOL
Open drain CHG pin
ISINK = 5mA
IOFF
CHG leakage current when disabled
VCHG = 20 V, 0°C ≤ TJ ≤ 85°C
RDS(ON)
Comm1 and Comm2
VRECT = 4V
fCOMM
Signaling frequency on COMM pin
IOFF
Comm pin leakage current
500
mV
1
µA
COMM PIN
Ω
1.5
2.00
VCOMM1 = 20V, VCOMM2 = 20V
Kb/s
1
µA
CLAMP PIN
RDS(ON)
Clamp1 and Clamp2
Ω
0.5
Adapter Enable
VAD Rising threshold voltage. EN-UVLO
VAD 0 → 5 V
VAD-EN hysteresis, EN-HYS
VAD 5 → 0 V
IAD
Input leakage current
VRECT = 0V, VAD = 5V, 0°C ≤ TJ
≤ 85°C
RAD
Pull-up resistance from AD-EN to OUT
when adapter mode is disabled and VOUT > VAD = 0, VOUT = 5
VAD, EN-OUT
VAD
Voltage difference between VAD and
VAD-EN when adapter mode is enabled,
EN-ON
VAD-EN
3.5
3.6
3.8
400
V
mV
55
μA
200
350
Ω
VAD = 5V, 0°C ≤ TJ ≤ 85°C
3
4.5
5
VAD = 9V, 0°C ≤ TJ ≤ 85°C
3
6
7
200
225
250
V
Synchronous Rectifier
IOUT
VHS-DIODE
IOUT at which the synchronous rectifier
enters half synchronous mode, SYNC_EN
ILOAD 300 → 200mA
Hysteresis for IOUT,RECT-EN
(full-synchronous mode enabled)
ILOAD 200 → 300mA
High-side diode drop when the rectifier is in
IAC-VRECT = 250mA
half synchronous mode
mA
40
mA
0.7
V
EN1 and EN2
VIL
Input low threshold for EN1 and EN2
VIH
Input high threshold for EN1 and EN2
RPD
EN1 and EN2 pull down resistance
0.4
1.3
V
V
200
kΩ
ADC
VRECT
6
Rectified power measurement
0W – 5W of rectified power
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DEVICE INFORMATION
SIMPLIFIED BLOCK DIAGRAM
I
OUT
VOUT,FB
VREF,ILIM
VILIM
+
_
VREF,IABS
VIABS,FB
+
_
VIN,FB
VIN,DPM
+
_
+
_
RECT
VOUT,REG
ILIM
AD
+
_
VREFAD,OVP
BOOT2
+
_
BOOT1
VREFAD,UVLO
AD-EN
AC1
AC2
Sync
Rectifier
Control
VREF,TS-BIAS
+
_
COMM1
COMM2
DATA _
OUT
ADC
CLAMP1
CLAMP2
VBG,REF
VIN,FB
VOUT,FB
VILIM
VIABS,FB
VIABS,REF
VIC,TEMP
TS_COLD
TS_HOT
VTSB
+
_
+
_
TS/CTRL
TS_DETECT
+
_
VREF_100MV
Digital Control
OVP
CHG
+
_
VRECT
VOVP,REF
EN1
200kW
EN2
200kW
PGND
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YFF Package
(TOP VIEW)
RHL Package
(TOP VIEW)
PGND
1
A1
PGND
A2
PGND
A3
PGND
A4
PGND
B1
AC2
B2
AC2
B3
AC1
B4
AC1
C1
C2
RECT
C3
RECT
C4
BOOT2
D1
OUT
E1
COM2
D2
OUT
AC1
2
AC2
19
BOOT1
3
RECT
18
OUT
4
BOOT2
17
CLMP1
5
CLMP2
16
COM1
6
COM2
15
/CHG
7
VTSB
14
/AD-EN
8
TS/
CTRL
13
AD
9
ILIM
12
BOOT1
D3
OUT
D4
OUT
E2
E3
CLMP2
CLMP1
E4
COM1
TS/CTRL
F2
VTSB
F3
AD-EN
F4
CHG
G1
ILIM
G2
EN2
G3
EN1
G4
AD
F1
PGND
20
EN1
10
EN2
11
PIN FUNCTIONS
NAME
YFF
RHL
I/O
AC1
B3, B4
2
I
AC2
B1, B2
19
I
BOOT1
C4
3
O
BOOT2
C1
17
O
RECT
C2, C3
18
O
Filter capacitor for the internal synchronous rectifier. Connect a ceramic
capacitor to PGND. Depending on the power levels, the value may be
4.7μF to 22μF.
OUT
D1, D2, D3, D4
4
O
Output pin, delivers power to the load.
O
Open-drain output used to communicate with primary by varying reflected
impedance. Connect through a capacitor to either AC1 or AC2 for
capacitive load modulation (COM2 must be connected to the alternate
AC1 or AC2 pin). For resistive modulation connect COM1 and COM2 to
RECT via a single resistor; connect through separate capacitors for
capacitive load modulation.
O
Open-drain output used to communicate with primary by varying reflected
impedance. Connect through a capacitor to either AC1 or AC2 for
capacitive load modulation (COM1 must be connected to the alternate
AC1 or AC2 pin). For resistive modulation connect COM1 and COM2 to
RECT via a single resistor; connect through separate capacitors for
capacitive load modulation.
COM1
E4
COM2
E1
6
15
O
CLMP1,
CLMP2
E2,
E3
PGND
A1, A2, A3, A4
8
5
16
1, 20
DESCRIPTION
AC input power from receiver coil antenna.
Bootstrap capacitors for driving the high-side FETs of the synchronous
rectifier. Connect a 10nF ceramic capacitor from BOOT1 to AC1 and from
BOOT2 to AC2.
Open drain FETs which are utilized for a non-power dissipative
over-voltage AC clamp protection. When the RECT voltage goes above
15 V, both switches will be turned on and the capacitors will act as a low
impedance to protect the IC from damage. If used, CLMP1 is required to
be connected to AC1, and CLMP2 is required to be connected to AC2 via
0.47µF capacitors.
Power ground
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PIN FUNCTIONS (continued)
NAME
YFF
ILIM
RHL
G1
AD
G4
AD-EN
F3
I/O
DESCRIPTION
I/O
12
Programming pin for the over current limit. Connect external resistor to
VSS. Size RILIM with the following equation: RILIM = 300 / I( max) where
I(max) is the desired current limit for the power supply.
9
I
Connect this pin to the wired adapter input. When a voltage is applied to
this pin wireless charging is disabled and AD-EN is driven low. Connect to
GND through a 1µF capacitor. If unused, capacitor is not required and
should be grounded directly.
O
Push-pull driver for external PFET connecting AD and OUT. This node is
pulled to the higher of OUT and AD when turning off the external FET.
This voltage tracks approximately 4V below AD when voltage is present
at AD and provides a regulated VSG bias for the external FET. Float this
pin if unused.
Must be connected to ground and pulled up to VTSB via two series
resistors. If an NTC function is not desired, size R2 to be twice that of R3.
As a CTRL pin pull to ground to send End Power/Temperature Fault
message to the transmitter, pull-up to send End Power/Termination
message to the transmitter.
8
TS/CTRL
F1
13
I
EN1
G3
10
I
EN2
G2
11
I
VTSB
F2
14
O
2.2V LDO that periodically biases the TS/CTRL resistor network. Connect
to TS/CTRL via a resistor
CHG
F4
7
O
Open-drain output – active when output current is being delivered to the
load (i.e. when the output of the supply is enabled).
Inputs that allow user to enable/disable wireless and wired charging <EN1
EN2>
<00> wireless charging is enabled unless the AD voltage is > 3.6 V.
<01> AD mode is disabled, wireless charging enabled.
<10> AD-EN pulled low, wireless charging disabled.
<11> wired and wireless charging disabled.
Spacer
TYPICAL CHARACTERISTICS
100.0
100.0
90.0
90.0
Efficiency (%)
Efficiency (%)
Full Sync Mode Enabled
80.0
80.0
70.0
60.0
0.0
1.0
2.0
3.0
4.0
Output Power (W)
Figure 4. Rectifier Efficiency
5.0
6.0
70.0
1.0
2.0
3.0
Output Power (W)
4.0
5.0
Figure 5. IC Efficiency from AC Input to DC Output
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TYPICAL CHARACTERISTICS (continued)
1.2
7.5
Falling
Rising
RILIM=250
RILIM=400
RILIM=700
RILIM=300
1.1
1.0
7.0
Current Limit (A)
Rectifier Voltage (V)
0.9
6.5
6.0
0.8
0.7
0.6
0.5
0.4
5.5
0.3
0.2
5.0
0.2
0.4
0.6
Load Current (A)
0.8
0.1
1.0
1.0
Figure 6. VRECT vs. ILOAD
2.0
3.0
Output Voltage (V)
4.0
5.0
Figure 7. VOUT Sweep (I-V Curve)(1)
100.0
5.01
90.0
5.00
Output Ripple (mV)
Output Voltage (V)
80.0
4.99
4.98
4.97
70.0
60.0
50.0
4.96
40.0
4.95
0.2
0.4
0.6
0.8
Load Current (A)
1.0
Figure 8. ILOAD Sweep (I-V Curve)
10
1.2
30.0
0.0
0.2
0.4
0.6
Load Current (A)
0.8
1.0
Figure 9. Output Ripple vs. ILOAD (COUT = 1µF)
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TYPICAL CHARACTERISTICS (continued)
5.004
Vout (V)
5.002
5.000
4.998
0
20
40
60
80
Temperature (°C)
100
120
Figure 10. VOUT vs Temperature
Figure 11. 1A Instantaneous Load Step(2)
VRECT
VOUT
Figure 12. 1A Instantaneous Load Dump(2)
Figure 13. 1A Load Step Full System Response
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TYPICAL CHARACTERISTICS (continued)
VRECT
VRECT
VOUT
VOUT
Figure 14. 1A Load Dump Full System Response
Figure 15. Rectifier Overvoltage Clamp (fop = 110kHz)
VTS/CTRL
VRECT
VRECT
VOUT
Figure 16. TS Fault
Figure 17. Adapter Insertion (VAD = 10V)
VAD
VRECT
VRECT
VOUT
Figure 18. Adapter Insertion (VAD = 10V) Illustrating
Break-Before-Make Operation
12
Figure 19. On the Go Enabled (VOTG = 3.5V)(3)
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TYPICAL CHARACTERISTICS (continued)
IOUT
IOUT
VRECT
VRECT
VOUT
VOUT
Figure 20. bq51013 and bq51010 Typical Startup with a 1A
System Load
Figure 21. bq51011 Step Response with VOUT = 4.8V and
ILOAD = IILIM
IOUT
VRECT
VRECT
VOUT
VOUT
Figure 22. bq51011 Output Voltage Transition
(VOUT = 4.8V -> 3.5V) Illustrating VRECT-TRACK
Figure 23. bq51011 Output Current Transition (ILOAD < IILIM
≥ ILOAD = IILIM) lIlustrating Dynamic Communication
Current Limit
(1) Curves illustrates the resulting ILIM current by sweeping the output voltage at different RILIM settings. ILIM current collapses due to the
increasing power dissipation as the voltage at the output is decreased—thermal shutdown is occurring.
(2) Total droop experienced at the output is dependent on receiver coil design. The output impedance must be low enough at that particular
operating frequency in order to not collapse the rectifier below 5V.
(3) On the go mode is enabled by driving EN1 high. In this test the external PMOS is connected between the output of the bq5101x IC and
the AD pin, therefore any voltage source on the output is supplied to the AD pin.
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PRINCIPLE OF OPERATION
th
bqTESLA150LP: Receiver Integration 1/5 of the Area Savings
Power
AC to DC
bq5101x
Drivers
Rectification
Voltage
Conditioning
Load
Communication
V/I
Sense
Controller
Controller
bq500210
Transmitter
Receiver
Figure 24. WPC Wireless Power System Indicating the Functional Integration of the bq5101x
A Brief Description of the Wireless System:
A wireless system consists of a charging pad (transmitter or primary) and the secondary-side equipment
(receiver or secondary). There are coils in the charging pad and in the secondary equipment which are
magnetically coupled to each other when the equipment is placed on the portable device. Power is then
transferred from the transmitter to the receiver via coupled inductors (e.g. an air-core transformer). Controlling
the amount of power transferred is achieved by sending feedback (error signal) communication to the primary
(e.g. to increase or decrease power).
The receiver communicates with the transmitter by changing the load seen by the transmitter. This load variation
results in a change in the transmitter coil current, which is measured and interpreted by a processor in the
charging pad. The communication is digital - packets are transferred from the receiver to the transmitter.
Differential Bi-phase encoding is used for the packets. The bit rate is 2-kbps.
Various types of communication packets have been defined. These include identification and authentication
packets, error packets, control packets, end power packets, and power usage packets.
The transmitter coil stays powered off most of the time. It occasionally wakes up to see if a receiver is present.
When a receiver authenticates itself to the transmitter, the transmiter will remain powered on. The receiver
maintains full control over the power transfer using communication packets.
14
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Using the bq5101x as a Wireless Power Supply: (See Figure 3)
Figure 3 is the schematic of a system which uses the bq5101x as power supply while power multiplexing the
wired (adapter) port.
When the system shown in Figure 3 is placed on the charging pad, the receiver coil is inductively coupled to the
magnetic flux generated by the coil in the charging pad which consequently induces a voltage in the receiver coil.
The internal synchronous rectifier feeds this voltage to the RECT pin which has the filter capacitor C3.
The bq5101x identifies and authenticates itself to the primary using the COM pins by switching on and off the
COM FETs and hence switching in and out CCOMM. If the authentication is successful, the transmitter will remain
powered on. The bq5101x measures the voltage at the RECT pin, calculates the difference between the actual
voltage and the desired voltage VRECT-REG, (~7V for the bq51013 at no load) and sends back error packets to the
primary. This process goes on until the input voltage settles at VIN-REG. During a load transient, the dynamic
rectifier algorithm will set the targets specified by VRECT-REG thresholds 1, 2, 3, and 4. This algorithm enhances
the transient response of the power supply.
During power-up, the LDO is held off until the VRECT-REG threshold 1 converges. The voltage control loop ensures
that the output voltage is maintained at VOUT-REG (~5V for the bq51013) to power the system. The bq5101x
meanwhile continues to monitor the input voltage, and maintains sending error packets to the primary every
250ms. If a large transient occurs, the feedback to the primary speeds up to every 32ms in order to converge on
an operating point in less time.
Input Overvoltage
If the input voltage suddenly increases in potential (e.g. a change in position of the equipment on the charging
pad), the voltage-control loop inside the bq5101x becomes active, and prevents the output from going beyond
VOUT-REG. The receiver then starts sending back error packets to the transmitter every 30ms until the input
voltage comes back to the VRECT-REG target, and then maintains the error communication every 250ms.
If the input voltage increases in potential beyond VOVP, the IC switches off the LDO and communicates to the
primary to bring the voltage back to VRECT -REG. In addition, a proprietary voltage protection circuit is activated by
means of CCLAMP1 and CCLAMP2 that protects the IC from voltages beyond the maximum rating of the IC (e.g.
20V).
Adapter Enable Functionality and Enable1/Enable2 Control
Figure 3 is an example application that shows the bq5101x used as a wireless power receiver that can power
mutliplex between wired or wireless power for the down-system electronics. In the default operating mode pins
EN1 and EN2 are low, which activates the adapter enable functionality. In this mode, if an adapter is not present
the AD pin will be low, and AD-EN pin will be pulled to the higher of the OUT and AD pins so that the PMOS
between OUT and AD will be turned off. If an adapter is plugged in and the voltage at the AD pin goes above 3.6
V then wireless charging is disabled and the AD-EN pin will be pulled approximately 4 V below the AD pin to
connect AD to the secondary charger. The difference between AD and AD-EN is regulated to a maximum of 7V
to ensure the VGS of the external PMOS is protected.
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The EN1 and EN2 pins include internal 200kΩ pull-down resistors, so that if these pins are not connected
bq5101x defaults to AD-EN control mode. However, these pins can be pulled high to enable other operating
modes as described in Table 1:
Table 1.
EN1
EN2
0
0
Adapter control enabled. If adapter is present then secondary charger will
be powered by adapter, otherwise wireless charging will be enabled when
wireless power is available.
Result
0
1
Adapter is disabled. Wireless charging will be enabled when wireless
power is present.
1
0
AD-EN is pulled low, whether or not adapter voltage is present. This feature
can be used, e.g., for USB OTG applications.
1
1
Adapter and wireless charging are disabled, i.e., power will never be
delivered by the OUT pin in this mode.
As described in Table 1, pulling EN2 high disables the adapter mode and only allows wireless charging. In this
mode the adapter voltage will always be blocked from the OUT pin. An application example where this mode is
useful is when USB power is present at AD, but the USB is in suspend mode so that no power can be taken from
the USB supply. Pulling EN1 high enables the off-chip PMOS regardless of the presence of a voltage. This
function can be used in USB OTG mode to allow a charger connected to the OUT pin to power the AD pin.
Finally, pulling both EN1 and EN2 high disables both wired and wireless charging.
NOTE
It is required to connect a back-to-back PMOS between AD and OUT so that voltage is
blocked in both directions. Also, when AD mode is enabled no load can be pulled from the
RECT pin as this could cause an internal device overvoltage in bq5101x.
End Power Transfer Packet (WPC Header 0x02)
The WPC allows for a special command for the receiver to terminate power transfer from the trasmitter termed
End Power Transfer (EPT) packet. Table 2 specifies the v1.0 Reasons columb and their responding data field
value. The Condition column corresponds to the values sent by the bq5101x for a given reason.
Table 2.
Reason
Value
Condition
Unknown
0x00
AD > 3.6V
Charge Complete
0x01
TS/CTRL = 1, or EN1 = 1, or <EN1 EN2> = <11>
Internal Fault
0x02
TJ > 150°C or RILIM < 100Ω
Over Temperature
0x03
TS < VHOT, TS > VCOLD, or TS/CTRL < 100mV
Over Voltage
0x04
Not Sent
Over Current
0x05
Not Sent
Battery Failure
0x06
Not Sent
Reconfigure
0x07
Not Sent
No Response
0x08
VRECT target doesn't converge
Status Outputs
bq5101x has one status output, CHG. This output is an open-drain NMOS device that is rated to 20V. The
open-drain FET connected to the CHG pin will be turned on whenever the output of the power supply is enabled.
Please note, the output of the power supply will not be enabled if the VRECT-REG does not converge at the no-load
target voltage.
16
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Communication
bq5101x provides two identical, integrated communication FETs which are connected to the pins COMM1 and
COMM2. These FETs are used for modulating the secondary load current which allows bq5101x to communicate
error control and configuration information to the transmitter. Figure 25 below shows how the COMM pins can be
used for resistive load modulation. Each COMM pin can handle at most a 24Ω communication resistor.
Therefore, if a COMM resistor between 12Ω and 24Ω is required COM1 and COM2 pins must be connected in
parallel. bq5101x does not support a COMM resistor less than 12Ω.
RECTIFIER
24W
COMM1
24W
COMM2
COMM_DRIVE
Figure 25. Resistive Load Modulation
In addition to resistive load modulation, the bq5101x is also capable of capacitive load modulation as shown in
Figure 26 below. In this case, a capacitor is connected from COMM1 to AC1 and from COMM2 to AC2. When
the COMM switches are closed there is effectively a 22nF capacitor connected between AC1 and AC2.
Connecting a capacitor in between AC1 and AC2 modulates the impedance seen by the coil, which will be
reflected in the primary as a change in current.
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AC1
AC2
22nF
22nF
COMM1
COMM2
COMM_DRIVE
Figure 26. Capacitive Load Modulation
Synchronous Rectification
The bq5101x provides an integrated, self-driven synchronous rectifier that enables high-efficiency AC to DC
power conversion. The rectifier consists of an all NMOS H-Bridge driver where the backgates of the diodes are
configured to be the rectifier when the synchronous rectifier is disabled. During the initial startup of the WPC
system the synchronous rectifier is not enabled. At this operating point, the DC rectifier voltage is provided by the
diode rectifier. Once VRECT is greater than UVLO, half synchronous mode will be enabled until the load current
surpasses 250mA. Above 250mA the synchronous rectifier will stay enabled until the load current drops back
below 250mA where half synchronous mode will be enabled instead.
Rectifier Tracking Mode (Fold-Back)
The bq51011 is a 5V power supply intended to run efficiently in current limit. In order to optimize the efficiency
and power dissipation, the rectifier must track the output voltage within 250mV. This feature is termed
VRECT-TRACK where the bq51011 monitors the status of the programmed current limit and the output voltage value.
When the output current breaches the current limit of the power supply the controller sets the rectifier target
voltage to the output voltage plus 250mV. This feature is illustrated in Figure 22. When the output current is
equal to the current limit and the output voltage is transitioned from 4.8V to 3.5V the rectifier voltage will follow
the transition. This is possible via the WPC system control loop where the bq51011 communicates to the Tx to
adjust the operating point. This feature ensures that the internal LDO is always running near dropout for
optimized efficiency when the output current is equal to the current limit of the power supply
Communication Current Limit (Comm. ILIM)
The bq51011 employs a 400mA current limit during the time it takes to send a communication packet to the Tx.
This feature adds robustness to communication link between the Tx and Rx when the rectifier is in fold-back
mode. Communication can be compromised while in fold-back mode because of less headroom (gain) across the
internal LDO. When the current limit is reduced at a fixed operating frequency, the rectifier voltage increases (see
Figure 22 where the output current reduces from the power supply current limit). This will increase the headroom
across the LDO adding more gain between the output and the rectifier; therefore, increasing immunity to
communication failure.
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Dynamic Communication Current Limit (Dynamic ILIM)
The bq51011 employs the dynamic communication current limit feature in order to enable the communication
current limit only when the power supply is operating in current limit mode (IOUT = IILIM). This is illustrated in
Figure 23 where the output current is transitioned from IOUT < IILIM to IOUT = IILIM. This allows for systems to
startup without the current limit enabled in order to provide better system performance (e.g. during a dead battery
condition). The current limit is used during rectifier tracking mode to ensure stability of the communication back to
the WPC transmitter. This adds robustness to the communication link.
Temperature Sense Resistor Network (TS)
bq5101x includes a ratiometric external temperature sense function. The temperature sense function has two
ratiometric thresholds which represent a hot and cold condition. An external temperature sensor is recommended
in order to provide safe operating conditions for the receiver product. This pin is best utilized for monitoring the
surface that can be exposed to the end user (e.g. place the NTC resistor closest to the user).
Figure 27 allows for any NTC resistor to be used with the given VHOT and VCOLD thresholds.
VTSB
R2
TS / CTRL
NTC
R3
Figure 27. NTC Circuit Used for Safe Operation of the Wireless Receiver Power Supply
The resistors R2 and R3 can be solved by resolving the system of equations at the desired temperature
thresholds. The two equations are:
%VCOLD
%VHOT
æ R3 R
ö
NTC TCOLD ÷
çç
÷÷
çç R3 + R
÷ø
è
NTC TCOLD ÷
=
× 100
æ R3 R
ö
÷
NTC TCOLD
çç
÷÷ + R2
çç R3 + R
÷ø
è
NTC TCOLD ÷
(1)
æ R3 R
ö
NTC THOT ÷
çç
÷÷
çç R3 + R
÷ø
è
NTC THOT ÷
=
× 100
æ R3 R
ö
NTC THOT ÷
çç
÷÷ + R2
çç R3 + R
÷ø
è
NTC THOT ÷
(2)
Where:
RNTC TCOLD = RO e
RNTC THOT = RO e
(
)
β 1
-1
TCOLD To
(
)
β 1
-1
THOT To
(3)
where, TCOLD and THOT are the desired temperature thresholds in degrees Kelvin. Ro is the nominal resistance
and β is the temperature coefficient of the NTC resistor. An example solution for an NTC resistor with RO = 10KΩ
and β = 4500 is:
• R2 = 7.81kΩ
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R3 = 13.98kΩ
where:
• TCOLD = 0°C
• THOT = 60°C
• β = 4500
• RO = 10kΩ
The plot of the percent VTSB vs. temperature is shown in Figure 28:
55
50
Vtsb Ratio (%)
45
40
35
30
25
20
0
10
20
30
40
Temperature (°C)
50
60
Figure 28. Example Solution for an NTC resistor with RO = 10KΩ and β = 4500
Figure 29 illustrates the periodic biasing scheme used for measuring the TS state. The TS_READ signal enables
the TS bias voltage for 24ms. During this period the TS comparators are read (each comparator has a 10 ms
deglitch) and appropriate action is taken based on the temperature measurement. After this 24ms period has
elapsed, the TS_READ signal goes low, which causes the TS-Bias pin to become high impedance. During the
next 35ms (priority packet period) or 235ms (standard packet period), the TS voltage is monitored and compared
to 100mV. If the TS voltage is greater than 100mV then a secondary device is driving the TS/CTRL pin and a
CTRL = ‘1’ is detected.
24ms
35 or 235ms
TS_READ
10ms deglitch on all TS
comps – read for TS
fault. Hold TS_OPEN
comp in reset.
Hold TS comps in reset.
Read TS_DRIVEN with
10-ms deglitch.
Figure 29. Timing Diagram for TS Detection Circuit
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Thermal Protection
The bq5101x includes a thermal shutdown protection. If the die temperature reaches TJ(OFF), the LDO is shut
off to prevent any further power dissipation.
Series and Parallel Resonant Capacitor Selection
Shown in Figure 2, the capacitors C1 (series) and C2 (parallel) make up the dual resonant circuit with the
receiver coil. These two capacitors must be sized correctly per the WPC v1.0 specification. Figure 30 illustrates
the equivalent circuit of the dual resonant circuit:
C1
Ls’
C2
Figure 30. Dual Resonant Circuit with the Receiver Coil
Section 4.2 (Power Receiver Design Requirements) in volume 1 of the WPC v1.0 specification highlights in detail
the sizing requirements. To summarize, the receiver designer will be required take inductance measurements
with a fixed test fixture. The test fixture is shown in Figure 31:
Figure 31. WPC v1.0 Receiver Coil Test Fixture for the Inductance Measurement Ls’
(copied from System Description Wireless Power Transfer, volume 1: Low Power, Part 1 Interface
Definition, Version 1.0.1, Figure 4-4)
The primary shield is to be 50mm x 50mm x 1mm of Ferrite material PC44 from TDK Corp. The gap dZ is to be
3.4mm. The receiver coil, as it will be placed in the final system (e.g. the back cover and battery must be
included if the system calls for this), is to be placed on top of this surface and the inductance is to be measured
at 1-V RMS and a frequency of 100 kHz. This measurement is termed Ls’. The same measurement is to be
repeated without the test fixture shown in Figure 9. This measurement is termed Ls or the free-space inductance.
Each capacitor can then be calculated using Equation 4:
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2
C1 = éê(fS × 2p) × L'S ùú
ë
û
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-1
é
1ù
2
ú
C2 = ê(fD × 2p) × LS êë
C1úû
-1
(4)
Where fS is 100 kHz +5/-10% and fD is 1 MHz ±10%. C1 must be chosen first prior to calculating C2.
The quality factor must be greater than 77 and can be determined by Equation 5:
Q=
2p × fD × LS
R
(5)
where R is the DC resistance of the receiver coil. All other constants are defined above.
Receiver Coil Load-Line Analysis
When choosing a receiver coil, it is recommend to analyze the transformer characteristics between the primary
coil and receiver coil via load-line analysis. This will capture two important conditions in the WPC system:
1. Operating point characteristics in the closed loop of the WPC system.
2. Instantaneous transient response prior to the convergence of the new operating point.
A
An example test configuration for conducting this analysis is shown in Figure 32:
CP
VIN
CS
LP
L S CD
CB
V
RL
Figure 32. Load-Line Analysis Test Bench
Where:
• VIN is a square-wave power source that should have a peak-to-peak operation of 19V.
• CP is the primary series resonant capacitor (i.e. 100nF for Type A1 coil).
• LP is the primary coil of interest (i.e. Type A1).
• LS is the secondary coil of interest.
• CS is the series resonant capacitor chosen for the receiver coil under test.
• CD is the parallel resonant capacitor chosen for the receiver coil under test.
• CB is the bulk capacitor of the diode bridge (voltage rating should be at least 25V and capacitance value of at
least 10µF)
• V is a Kelvin connected voltage meter
• A is a series ammeter
• RL is the load of interest
It is recommended that the diode bridge be constructed of Schottky diodes.
The test procedure is as follows
• Supply a 19V AC signal to LP starting at a frequency of 210kHz
• Measure the resulting rectified voltage from no load to the expected full load
• Repeat the above steps for lower frequencies (stopping at 110kHz)
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An example load-line analysis for the Vishay IWAS-4832FF-50 receiver coil is shown in Figure 33:
Fs=175
Fs=160
Fs=150
Fs=140
Fs=135
Fs=130
Fs=125
Rectified Voltage (V)
10
8
6
4
0.2
Ping Voltage
0.4
0.6
Load Current (A)
1A Load Step Droop
0.8
1.0
1A Load Operating Point
Figure 33. Vishay IWAS-4832FF-50 Load-Line Results
What this plot conveys about the operating point is that a specific load and rectifier target condition consequently
results in a specific operating frequency (for the type A1 TX). For example, at 1A the dynamic rectifier target is
5.15V. Therefore, the operating frequency will be between 150kHz and 160kHz in the above example. This is an
acceptable operating point. If the operating point ever falls outside the WPC frequency range (110kHz –
205kHz), the system will never converge and will become unstable.
In regards to transient analysis, there are two major points of interest:
1. Rectifier voltage at the ping frequency (175kHz).
2. Rectifier voltage droop from no load to full load at the constant operating point.
In this example, the ping voltage will be ~5V. This is above the UVLO of the bq5101x and; therefore, startup in
the WPC system can be ensured. If the voltage is near or below the UVLO at this frequency, then startup in the
WPC system may not occur.
If the max load step is 1A, the droop in this example will be ~1V with a voltage at 1A of ~5.5V (140kHz load-line).
To analyze the droop locate the load-line that starts at 7V at no-load. Follow this load-line to the max load
expected and take the difference between the 7V no-load voltage and the full-load voltage at that constant
frequency. Ensure that the full-load voltage at this constant frequency is above 5V. If it descends below 5V, the
output of the power supply will also droop to this level. This type of transient response analysis is necessary due
to the slow feedback response of the WPC system. This simulates the step response prior to the WPC system
adjusting the operating point.
NOTE
Coupling between the primary and secondary coils will worsen with misalignment of the
secondary coil. Therefore, it is recommended to re-analyze the load-lines at multiple
misalignments to determine where, in planar space, the receiver will discontinue operation.
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REVISION HISTORY
Changes from Original (April 2011) to Revision A
Page
•
Added device numbers bq51010 and bq51011 .................................................................................................................... 1
•
Added Figure 20 through Figure 23 ...................................................................................................................................... 9
•
Added section - Rectifier Tracking Mode (Fold-Back) ........................................................................................................ 18
•
Added section - Communication Current Limit (Comm. ILIM ............................................................................................... 18
•
Added section - Dynamic Communication Current Limit (Dynamic ILIM) ............................................................................ 19
Changes from Revision A (May 2011) to Revision B
Page
•
Changed text in the DESCRIPTION From: Together with the bq500110 To: Together with the bq500210 ........................ 1
•
Changed Figure 1 ................................................................................................................................................................. 1
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Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq51010 bq51011 bq51013
PACKAGE OPTION ADDENDUM
www.ti.com
11-Aug-2011
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
BQ51010YFFR
PREVIEW
DSBGA
YFF
28
3000
TBD
Call TI
Call TI
BQ51010YFFT
PREVIEW
DSBGA
YFF
28
250
TBD
Call TI
Call TI
BQ51011YFFR
ACTIVE
DSBGA
YFF
28
3000
Green (RoHS
& no Sb/Br)
Call TI
Level-1-260C-UNLIM
BQ51011YFFT
ACTIVE
DSBGA
YFF
28
250
Green (RoHS
& no Sb/Br)
Call TI
Level-1-260C-UNLIM
BQ51013YFFR
ACTIVE
DSBGA
YFF
28
3000
Green (RoHS
& no Sb/Br)
Call TI
Level-1-260C-UNLIM
BQ51013YFFT
ACTIVE
DSBGA
YFF
28
250
Green (RoHS
& no Sb/Br)
Call TI
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Aug-2011
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Aug-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
BQ51011YFFR
DSBGA
YFF
28
3000
180.0
8.4
BQ51013YFFR
DSBGA
YFF
28
3000
180.0
BQ51013YFFT
DSBGA
YFF
28
250
180.0
2.01
3.14
0.81
4.0
8.0
Q1
8.4
2.01
3.14
0.81
4.0
8.0
Q1
8.4
2.01
3.14
0.81
4.0
8.0
Q1
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Aug-2011
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ51011YFFR
DSBGA
YFF
28
3000
210.0
185.0
35.0
BQ51013YFFR
DSBGA
YFF
28
3000
210.0
185.0
35.0
BQ51013YFFT
DSBGA
YFF
28
250
210.0
185.0
35.0
Pack Materials-Page 2
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