BCD AZ7500E Pulse-width-modulation control circuit Datasheet

Data Sheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
General Description
Features
The AZ7500E is a voltage mode pulse width modulation switching regulator control circuit designed primarily for power supply control.
·
The AZ7500E consists of a reference voltage circuit,
two error amplifiers, an on-chip adjustable oscillator, a
dead-time control (DTC) comparator, a pulse-steering
control flip-flop, and an output control circuit. The precision of voltage reference (VREF) is improved up to ±
1% through trimming and this provides a better output
voltage regulation. The AZ7500E provides for pushpull or single-ended output operation, which can be
selected through the output control.
AZ7500E is the enhanced version of AZ7500B for it
improves REF Pin's reliability comparing with
AZ7500B.
The AZ7500E is available in standard packages of
DIP-16 and SOIC-16.
·
·
·
·
·
AZ7500E
Stable 4.95V Reference Voltage Trimmed to
±1.0% Accuracy
Uncommitted Output TR for 200mA Sink or
Source Current
Single-End or Push-Pull Operation Selected by
Output Control
Internal Circuitry Prohibits Double Pulse at Either
Output
Complete PWM Control Circuit with Variable
Duty Cycle
On-Chip Oscillator With Master or Slave Operation
Applications
·
·
·
SMPS
Back Light Inverter
Charger
DIP-16
SOIC-16
Figure 1. Package Types of AZ7500E
Sep. 2009 Rev. 1. 3
BCD Semiconductor Manufacturing Limited
1
Data Sheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
AZ7500E
Pin Configuration
M Package
(SOIC-16)
P Package
(DIP-16)
1IN +
1
16
2IN +
1IN +
1
16
2IN +
1IN -
2
15
2IN -
1IN -
2
15
2IN -
FEEDBACK
3
14
REF
FEEDBACK
3
14
REF
DTC
4
13
OUTPUT CTRL
DTC
4
13
OUTPUT CTRL
CT
5
12
VCC
CT
5
12
VCC
RT
6
11
C2
RT
6
11
C2
GND
7
10
E2
GND
7
10
E2
C1
8
9
E1
C1
8
9
E1
Figure 2. Pin Configuration of AZ7500E (Top View)
Output Function Control Table
Signal for Output Control
Output Function
VI = GND
Single-ended or parallel output
VI = VREF
Normal push-pull operation
Functional Block Diagram
OUTPUT CTRL
RT
CT
6
5
Pulse-Steering
Flip-Flop
Dead-Time Control
Comparator
DTC
9
+
Error Amplifier 1
1IN -
1
+
11
CK
2IN -
FEEDBACK
E1
C2
Q2
+
10
PWM
Comparator
E2
2
12
2IN +
C1
Q1
D
4
0.12V
1IN +
8
13
Oscillator
16
Error Amplifier 2
+
14
Reference
Regulator
15
0.7mA
7
VCC
REF
GND
3
Figure 3. Functional Block Diagram of AZ7500E
Sep. 2009 Rev. 1. 3
BCD Semiconductor Manufacturing Limited
2
Data Sheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
AZ7500E
Ordering Information
AZ7500
E1: Lead Free
G1: Green
Circuit Type
TR: Tape and Reel
Blank: Tube
Package
M: SOIC-16
P: DIP-16
Reference Voltage
E: 4.95V
Package
Temperature Range
SOIC-16
o
-40 to 85 C
DIP-16
Part Number
Lead Free
Marking ID
Green
Lead Free
Green
Packing Type
AZ7500EM-E1
AZ7500EM-G1
AZ7500EM-E1
AZ7500EM-G1
Tube
AZ7500EMTR-E1
AZ7500EMTR-G1 AZ7500EM-E1
AZ7500EM-G1
Tape & Reel
AZ7500EP-E1
AZ7500EP-G1
AZ7500EP-G1
Tube
AZ7500EP-E1
BCD Semiconductor's Pb-free products, as designated with "E1" suffix in the part number, are RoHS compliant. Products with
"G1" suffix are available in green packages.
Sep. 2009 Rev. 1. 3
BCD Semiconductor Manufacturing Limited
3
Data Sheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
AZ7500E
Absolute Maximum Ratings (Note 1)
Parameter
Symbol
Value
Unit
Supply Voltage (Note 2)
VCC
40
V
Amplifier Input Voltage
VI
-0.3 to VCC + 0.3
V
Collector Output Voltage
VO
40
V
Collector Output Current
IO
250
mA
RθJA
Package Thermal Impedance (Note 3)
M Package
73
P Package
67
Lead Temperature 1.6mm from case for 10 seconds
o
-65 to 150
ESD rating (Machine Model)
C/W
oC
260
TSTG
Storage Temperature Range
o
200
C
V
Note 1: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the
device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those indicated under "Recommended Operating Conditions" is not implied. Exposure to "Absolute Maximum
Ratings" for extended periods may affect device reliability.
Note 2: All voltage values are with respect to the network ground terminal.
Note 3: Maximum power dissipation is a function of TJ(max), RθJA and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = ( TJ(max) - TA )/RθJA. Operating at the absolute maximum TJ
of 150oC can affect reliability.
Recommended Operating Conditions
Parameter
Supply Voltage
Symbol
Min
Typ
Max
Unit
VCC
7
15
36
V
30
36
V
200
mA
VCC - 2
V
Collector Output Voltage
VC1, VC2
Collector Output Current
(Each Transistor)
IC1, IC2
Amplifier Input Voltage
VI
Current Into Feedback Terminal
IFB
0.3
mA
Reference Output Current
IREF
10
mA
0.3
Timing Capacitor
CT
0.00047
0.001
10
µF
Timing Resistor
RT
1.8
30
500
KΩ
Oscillator Frequency
fosc
1.0
40
200
KHz
0.3
5.3
V
TA
-40
85
oC
PWM Input Voltage (Pin 3, 4, 14)
Operating Free-Air Temperature
Sep. 2009 Rev. 1. 3
BCD Semiconductor Manufacturing Limited
4
Data Sheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
AZ7500E
Electrical Characteristics
TA = 25oC, VCC=20V, f=10KHz unless otherwise noted.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
4.90
4.95
5.0
V
4.85
4.95
5.05
V
Reference Section
IREF=1mA
Output Reference Voltage
VREF
Line Regulation
RLINE
VCC = 7V to 36V
2
25
mV
Load Regulation
RLOAD
IREF=1mA to 10mA
1
15
mV
35
50
mA
Short-Circuit Output Current
ISC
o
IREF=1mA, TA= -40 to 85 C
VREF = 0V
10
Oscillator Section
CT=0.001µF, RT=30KΩ,
Oscillator Frequency
fOSC
CT=0.01µF, RT=12KΩ
9.2
CT=0.01µF, RT=12KΩ,
TA= -40 to 85oC
Frequency Change with Temperature
∆f /∆T
40
10
9.0
10.8
KHz
12
CT=0.01µF, RT=12KΩ,
TA= -40 to 85oC
1
%
-10
µA
Dead-Time Control Section
Input Bias Current
Maximum Duty Cycle
Input Threshold Voltage
IBIAS
D(MAX)
VITH
VCC=15V, V4= 0 to 5.25V
VCC=15V, V4= 0V,
Pin 13= VREF
-2
45
Zero Duty Cycle
Maximum Duty Cycle
%
3
3.3
0
V
Error-Amplifier Section
Input Offset Voltage
VIO
V3 = 2.5V
2
10
mV
Input Offset Current
IIO
V3 = 2.5V
25
250
nA
Input Bias Current
IBIAS
V3 = 2.5V
0.2
1
µA
Common-Mode Input Voltage Range
VCM
VCC=7V to 36V
VCC-2
V
Open-Loop Voltage Gain
GVO
VO =0.5V to 3.5V
Unity-Gain Bandwidth
70
BW
Common-Mode Rejection Ratio
CMRR
Output Sink Current (Feedback)
ISINK
Output Source Current (Feedback)
-0.3
ISOURCE
VID = -15mV to -5V,
V3 = 0.7V
VID=15mV to 5V
V3 = 3.5V
Sep. 2009 Rev. 1. 3
95
dB
650
KHz
65
80
dB
-0.3
-0.7
mA
2
mA
BCD Semiconductor Manufacturing Limited
5
Data Sheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
AZ7500E
Electrical Characteristics (Continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
4
4.5
V
PWM Comparator Section
Input Threshold Voltage
VITH
Zero duty cycle
Input Sink Current
ISINK
V3 = 0.7V
-0.3
-0.7
mA
Output Section
Common
Emitter
VCE
(SAT)
VE = 0V, IC =200mA
1.1
1.3
Emitter
Follower
VCC
(SAT)
VCC = 15V, IE = -200mA
1.5
2.5
Collector Off-State Current
IC (OFF)
VCE = 36V, VCC=36V
2
100
µA
Emitter Off-State Current
IE(OFF)
VCC = VC = 36V, VE = 0
-100
µA
ICC
Pin 6 = VREF, VCC=15V
6
10
mA
Output Saturation Voltage
V
Total Device
Supply Current
Output Switching Characteristics
Rise Time
tR
Common Emitter
Common Collector
100
200
ns
Fall Time
tF
Common Emitter
Common Collector
25
100
ns
Sep. 2009 Rev. 1. 3
BCD Semiconductor Manufacturing Limited
6
Data Sheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
AZ7500E
Parameter Measurement information
VCC = 20V
12
VCC
4
Test
Inputs
3
12KΩ 6
5
DTC
C1
FEEDBACK
E1
RT
C2
E2
CT
0.01uF 1
8
150Ω
4W
150Ω
4W
Output 1
9
11
Output 2
10
1IN+
2
1IN-
16
2IN+
15
2IN-
13
OUTPUT
CTRL
GND
50KΩ
REF
14
7
Test Circuit
Voltage
at C1
VCC
Voltage
at C2
VCC
0V
0V
Voltage
at CT
Threshold Voltage
DTC
0V
Threshold Voltage
FEEDBACK
0.7V
Duty Cycle
0%
MAX
0%
Voltage Waveforms
Figure 4. Operational Test Circuit and Waveforms
Sep. 2009 Rev. 1. 3
BCD Semiconductor Manufacturing Limited
7
Data Sheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
AZ7500E
Parameter Measurement information (Continued)
Amplifier Under Test
+
VI
FEEDBACK
+
Vref
Other Amplifier
Figure 5. Error Amplifier Characteristics
20V
68Ω
4W
Each Output
Circuit
tf
Output
tr
90%
90%
CL = 15pF
(See Note A)
10%
10%
Note A: CL includes probe and jig capacitance.
Figure 6. Common-Emitter Configuration
20V
Each Output
Circuit
90%
90%
Output
CL = 15pF
(See Note A)
10%
10%
68Ω
4W
tr
tf
Note A: CL includes probe and jig capacitance.
Figure 7. Emitter-Follower Configuration
Sep. 2009 Rev. 1. 3
BCD Semiconductor Manufacturing Limited
8
Data Sheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
AZ7500E
Typical Performance Characteristics
VCC=20V
f - Oscillator Frequency (Hz)
100k
O
TA=25 C
0.001µF
10k
0.01µF
0.1µF
1k
1k
10k
100k
1M
RT - Timing Resistance (Ω)
Figure 8. Oscillator Frequency vs. RT and CT
100
VCC=20V
∆VO=3V
90
Voltage Gain (dB)
80
o
TA=25 C
70
60
50
40
30
20
10
0
1
10
100
1k
10k
100k
1M
Frequency (Hz)
Figure 9. Error Amplifier Small-Signal Voltage Gain vs. Frequency
Sep. 2009 Rev. 1. 3
BCD Semiconductor Manufacturing Limited
9
Data Sheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
AZ7500E
Typical Applications
(VI=10V to 40V)
1mH
2A
KSA1010
VI(+)
(VO=5V, IO=1A)
VO
47
12
11
VCC
8
C2
1M
0.1µ
150
C1
2
FEED
BACK
1IN-
2IN1IN+
2IN+
DTC GND
4
7
E1
9
OUTPUT
CTRL
13
E2
10
14
REF
AZ7500E
+ 50µ
50V
5.1k
3
RT
6
47k
15
+
5.1k
5.1k
1
16
CT
150
5
+
50µ
10V
50µ +
10V
0.001µ
GND
0.1
VI(-)
Figure 10. Pulse Width Modulated Step-Down Converter
Sep. 2009 Rev. 1. 3
BCD Semiconductor Manufacturing Limited
10
Data Sheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
AZ7500E
Mechanical Dimensions
SOIC-16
1.350(0.053)
1.750(0.069)
7°
0.330(0.013)
0.510(0.020)
Unit: mm(inch)
1.250(0.049)
1.650(0.065)
7°
B
A
20:1
0.250(0.010)
0.400(0.016)
9.800(0.386)
10.200(0.402)
0°
8°
R0.200(0.008)
R0.200(0.008)
0.050(0.002)
0.250(0.010)
0.170(0.007)
0.250(0.010)
5.800(0.228)
6.240(0.246)
3.800(0.150)
4.040(0.159)
9 .5
°
8°
0.200(0.008)
Sφ1.000(0.039)
Depth 0.200(0.008)
8°
8°
C-C
50:1
B
20:1
C
3°
7°
0.200(0.008)
0.250(0.010)
A
0.400(0.016)×45°
1.000(0.039)
1.270(0.050)
BSC
1.270(0.050)
C
Note: Eject hole, oriented hole and mold mark is optional.
Sep. 2009 Rev. 1. 3
BCD Semiconductor Manufacturing Limited
11
Data Sheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
AZ7500E
Mechanical Dimensions (Continued)
DIP-16
Unit: mm(inch)
Note: Eject hole, oriented hole and m old mark is optional.
Sep. 2009 Rev. 1. 3
BCD Semiconductor Manufacturing Limited
12
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