ON NL17SZ04 Single inverter Datasheet

NL17SZ04
Single Inverter
The NL17SZ04 is an inverter in three tiny footprint packages. The
device performs much as LCX multi−gate products in speed and drive.
Features
•
•
•
•
•
•
•
Tiny SOT−353, SOT−553 and SOT−953 Packages
24 mA Sink and Source Output Capability
Over−Voltage Tolerant Inputs and Outputs
Pin For Pin with NC7SZ04P5X, TC7SZ04FU and TC7SZ04AFE
Chip Complexity: FETs = 20
Designed for 1.65 V to 5.5 V VCC Operation
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
VCC
NC
5
1
VCC
IN A
1
5
L5
M
G
= Specific Device Marking
= Date Code*
= Pb−Free Package
5
5
1
SOT−953
L5
M
Figure 1. Pinout (Top View)
1
L5 M
SOT−553
XV5 SUFFIX
CASE 463B
SOT−353/SC70−5/
SC−88A/SOT−553
IN A
L5 MG
G
1
SOT−353/SC70−5/SC−88A
DF SUFFIX
CASE 419A
4
3
4
3
OUT Y
NC
OUT Y
GND
5
*Date Code orientation and/or position may
vary depending upon manufacturing location.
2
2
MARKING
DIAGRAMS
(Note: Microdot may be in either location)
GND
IN A
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OUT Y
= Specific Device Marking
= Date Code
SOT−953
CASE 527AE
Figure 2. Logic Symbol
V
M
1
VM
1
= Specific Device Code
= Month Code
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
November, 2015 − Rev. 14
1
Publication Order Number:
NL17SZ04/D
NL17SZ04
PIN ASSIGNMENT
PIN ASSIGNMENT (SOT−953)
(SOT−353/SC70−5/SC−88A/SOT−553)
FUNCTION TABLE
Pin
Function
Input
Output
Pin
Function
1
IN A
A
Y
1
NC
2
GND
L
H
2
IN A
3
NC
H
L
3
GND
4
OUT Y
4
OUT Y
5
VCC
5
VCC
MAXIMUM RATINGS
Symbol
VCC
Parameter
DC Supply Voltage
Value
Unit
−0.5 to )7.0
V
VI
DC Input Voltage
−0.5 v VI v +7.0
V
VO
DC Output Voltage
Output in Higher or Low State (Note 1)
(SOT−353/SC70−5/SC−88A/SOT−553 Packages)
−0.5 to VCC + 0.5
V
VO
DC Output Voltage
(SOT−953 Package)
−0.5 to VCC + 0.5
−0.5 to + 0.5
V
IIK
DC Input Diode Current
VI < GND
−50
mA
IOK
DC Output Diode Current
(SOT−353/SC70−5/SC−88A/SOT−553 Packages)
VO < GND, VO > VCC
±50
mA
IOK
DC Output Diode Current (SOT−953 Package)
VO < GND
−50
mA
IO
DC Output Sink Current
±50
mA
Output in Higher or Low State (Note 1)
Power−Down Mode (VCC = 0 V)
ICC
DC Supply Current per Supply Pin
±100
mA
IGND
DC Ground Current per Supply Pin
±100
mA
TSTG
Storage Temperature Range
−65 to )150
°C
260
°C
)150
°C
SOT−353 (Note 2)
SOT−553
350
496
°C/W
SOT−353
SOT−553
186
135
mW
TL
Lead Temperature, 1 mm from Case for 10 Seconds
TJ
Junction Temperature Under Bias
qJA
Thermal Resistance
PD
Power Dissipation in Still Air at 85°C
MSL
Moisture Sensitivity
FR
Flammability Rating
ESD
ESD Classification
ILATCHUP
Level 1
Oxygen Index: 28 to 34
Human Body Model (Note 3)
Machine Model (Note 4)
Charged Device Model (Note 5)
Latchup Performance Above VCC and Below GND at 125°C (Note 6)
UL 94 V−0 @ 0.125 in
2000
200
N/A
V
±100
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. IO absolute maximum rating must be observed.
2. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
3. Tested to EIA/JESD22−A114−A, rated to EIA/JESD22−A114−B.
4. Tested to EIA/JESD22−A115−A, rated to EIA/JESD22−A115−A.
5. Tested to JESD22−C101−A.
6. Tested to EIA/JESD78.
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2
NL17SZ04
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
DC Supply Voltage
VIN
DC Input Voltage
Operating
Data Retention
VOUT
DC Output Voltage
(SOT−353/SC70−5/SC−88A/SOT−553 Packages)
(High or Low State)
VOUT
DC Output Voltage (SOT−953 Package)
(High or Low State)
TA
Operating Temperature Range
tr, tf
Input Rise and Fall Time
VCC = 2.5 V $ 0.2 V
VCC = 3.0 V $ 0.3 V
VCC = 5.0 V $ 0.5 V
Min
Max
Unit
1.65
1.5
5.5
5.5
V
0
5.5
V
0
5.5
V
0
VCC
V
−55
+125
°C
0
0
0
20
10
5
ns/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Condition
Min
0.75 VCC
0.7 VCC
VIH
High−Level Input Voltage
1.65 to 1.95
2.3 to 5.5
VIL
Low−Level Input Voltage
1.65 to 1.95
2.3 to 5.5
VOH
High−Level Output Voltage
VIN = VIL
VOL
IIN
Low−Level Output Voltage
VIN = VIH
IOH = −100 mA
−555C ≤ TA ≤ 1255C
TA = 255C
VCC
(V)
Typ
Max
Min
Max
0.75 VCC
0.7 VCC
0.25 VCC
0.3 VCC
V
0.25 VCC
0.3 VCC
VCC − 0.1
VCC
VCC − 0.1
IOH = −3 mA
1.65
1.29
1.52
1.29
IOH = −8 mA
2.3
1.9
2.1
1.9
IOH = −12 mA
2.7
2.2
2.4
2.2
IOH = −16 mA
3.0
2.4
2.7
2.4
IOH = −24 mA
3.0
2.3
2.5
2.3
IOH = −32 mA
4.5
3.8
4.0
3.8
IOL = 100 mA
1.65 to 5.5
0.0
0.1
0.1
IOH = 3 mA
1.65
0.08
0.24
0.24
IOL = 8 mA
2.3
0.20
0.3
0.3
IOL = 12 mA
2.7
0.22
0.4
0.4
IOL = 16 mA
3.0
0.28
0.4
0.4
IOL = 24 mA
3.0
0.38
0.55
0.55
IOL = 32 mA
4.5
0.42
0.55
0.55
$0.1
VIN = 5.5 V or
GND
0 to 5.5
IOFF
Power Off Leakage
Current (SOT−353/
SC70−5/SC−88A/
SOT−553 Packages)
VIN = 5.5 V or
VOUT = 5.5 V
0
ICC
Quiescent Supply Current
VIN = 5.5 V or
GND
5.5
V
V
1.65 to 5.5
Input Leakage Current
Unit
V
$1.0
mA
1
10
mA
1
10
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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3
NL17SZ04
AC ELECTRICAL CHARACTERISTICS tR = tF = 2.5 ns; CL = 50 pF; RL = 500 W
−555C ≤ TA ≤ 1255C
TA = 255C
Symbol
tPLH
tPHL7
Condition
VCC (V)
Min
Typ
Max
Min
Max
Unit
RL = 1 MW, CL = 15 pF
1.65
1.8
2.0
2.0
5.3
4.4
11.4
9.5
2.0
2.0
12.0
10.0
ns
RL = 1 MW, CL = 15 pF
2.5 $ 0.2
0.2
3.5
6.5
0.8
7.0
RL = 1 MW, CL = 15 pF
3.3 $ 0.3
0.8
2.1
4.5
0.5
4.7
1.2
2.9
5.5
1.5
5.2
0.5
1.8
3.9
0.5
4.1
0.8
2.4
4.3
0.8
4.5
Parameter
Propagation Delay
(Figure 3 and 4)
RL = 500 W, CL = 50 pF
5.0 $ 0.5
RL = 1 MW, CL = 15 pF
RL = 500 W, CL = 50 pF
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
CIN
Input Capacitance
VCC = 5.5 V, VI = 0 V or VCC
CPD
Power Dissipation Capacitance (Note 7)
10 MHz, VCC = 3.3 V, VI = 0 V or VCC
10 MHz, VCC = 5.5 V, VI = 0 V or VCC
Typical
Unit
u2.5
pF
9
11
pF
7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
tf = 3 ns
tf = 3 ns
90%
INPUT
A and B
VCC
90%
50%
OUTPUT
50%
10%
10%
tPHL
GND
CL
tPLH
VOH
OUTPUT Y
RL
INPUT
50%
A 1−MHz square input wave is recommended for
propagation delay tests.
50%
VOL
Figure 3. Switching Waveform
Figure 4. Test Circuit
ORDERING INFORMATION
Package
Shipping†
NL17SZ04DFT2G
SC−88A/SOT−353/SC−70−5
(Pb−Free)
3000 / Tape & Reel
NL17SZ04XV5T2G
SOT−553
(Pb−Free)
4000 / Tape & Reel
NL17SZ04P5T5G
SOT−953
(Pb−Free)
8000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
NL17SZ04
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE L
A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
G
5
4
−B−
S
1
2
DIM
A
B
C
D
G
H
J
K
N
S
3
D 5 PL
0.2 (0.008)
M
B
M
N
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
--0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
J
C
K
H
SOLDER FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
SCALE 20:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
--0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
NL17SZ04
PACKAGE DIMENSIONS
SOT−553
XV5 SUFFIX
CASE 463B
ISSUE C
D
−X−
5
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
A
L
4
1
2
E
−Y−
3
b
e
HE
c
5 PL
0.08 (0.003)
DIM
A
b
c
D
E
e
L
HE
M
X Y
MILLIMETERS
NOM
MAX
0.55
0.60
0.22
0.27
0.13
0.18
1.60
1.65
1.20
1.25
0.50 BSC
0.10
0.20
0.30
1.55
1.60
1.65
MIN
0.50
0.17
0.08
1.55
1.15
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.35
0.0531
1.0
0.0394
0.5
0.5
0.0197 0.0197
SCALE 20:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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6
INCHES
NOM
0.022
0.009
0.005
0.063
0.047
0.020 BSC
0.004
0.008
0.061
0.063
MIN
0.020
0.007
0.003
0.061
0.045
MAX
0.024
0.011
0.007
0.065
0.049
0.012
0.065
NL17SZ04
PACKAGE DIMENSIONS
SOT−953
CASE 527AE
ISSUE E
X
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
A
Y
5
4
PIN ONE
INDICATOR
HE
E
1
2 3
DIM
A
b
C
D
E
e
HE
L
L2
L3
C
TOP VIEW
SIDE VIEW
e
L
5X
5X
L3
MILLIMETERS
MIN
NOM
MAX
0.34
0.37
0.40
0.10
0.15
0.20
0.07
0.12
0.17
0.95
1.00
1.05
0.75
0.80
0.85
0.35 BSC
0.95
1.00
1.05
0.175 REF
0.05
0.10
0.15
−−−
−−−
0.15
SOLDERING FOOTPRINT*
5X
0.35
5X
0.20
5X
L2
5X
BOTTOM VIEW
b
PACKAGE
OUTLINE
0.08 X Y
1.20
1
0.35
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
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PUBLICATION ORDERING INFORMATION
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7
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NL17SZ04/D
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