Maxim MAX17596 Peak-current-mode controllers for flyback and boost regulator Datasheet

19-6178; Rev 0; 1/12
EVALUATION KIT AVAILABLE
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
General Description
The MAX17595/MAX17596/MAX17597 is a family of peakcurrent-mode controllers which contain all the circuitry
required for the design of wide input-voltage flyback
and boost regulators. The MAX17595 offers optimized
input rising and falling thresholds for universal input
AC-DC converters and telecom DC-DC (36V–72V input
range) power supplies. The MAX17596 offers input rising
and falling thresholds suitable for low-voltage DC-DC
applications (4.5V–36V input range). The MAX17597
offers all circuitry needed to implement a boost converter
controller. All three controllers contain a built-in gate
driver for external n-channel MOSFETs.
The MAX17595/MAX17596/MAX17597 house an internal error amplifier with 1% accurate reference, useful
in implementations without the need for an external
reference. The switching frequency is programmable
from 100kHz to 1MHz with an accuracy of 8% using an
external resistor, allowing optimization of magnetic and
filter components, resulting in compact and cost-effective
power conversion solutions. For EMI sensitive applications, the MAX17595/MAX17596/MAX17597 family incorporates a programmable-frequency dithering scheme,
enabling low-EMI spread-spectrum operation.
An EN/UVLO input allows the user to start the
power supply precisely at the desired input voltage,
while also functioning as an on/off pin. The OVI pin
enables implementation of an input overvoltage protection
scheme, ensuring that the converter shuts down when
the DC input voltage exceeds a set maximum value. The
SS pin allows programmable soft-start time for the power
converter, and helps limit inrush current during startup.
The MAX17595/MAX17596/MAX17597 family also allows
the designer to choose between voltage soft-start and
current soft-start modes, useful in optoisolated designs.
A programmable slope compensation scheme is provided to enhance the stability of the peak-current-mode
control scheme.
Hiccup-mode overcurrent protection and thermal
shutdown are provided to minimize dissipation in
overcurrent and overtemperature fault conditions. The IC
is available in a space-saving 16-pin, 3mm x 3mm TQFN
package with 0.5mm lead spacing.
Benefits and Features
S Peak Current Mode Offline (Universal Input AC)
and Telecom (36V–72V) Flyback Controller
(MAX17595)
S Peak-Current-Mode DC-DC Flyback Controller
(4.5V–36V Input Range) (MAX17596)
S Peak-Current-Mode Nonsynchronous Boost PWM
Controller (4.5V–36V Input Range) (MAX17597)
S Current Mode Control Provides Excellent
Transient Response
S Low 20µA Startup Supply Current
S 100kHz to 1MHz Programmable Switching
Frequency
S Programmable Frequency Dithering for Low-EMI
Spread-Spectrum Operation
S Switching Frequency Synchronization
S Adjustable Current Limit with External CurrentSense Resistor
S Fast Cycle-By-Cycle Peak Current Limiting
S Hiccup-Mode Short-Circuit Protection
S Overtemperature Protection
S Programmable Soft-Start and Slope Compensation
S Programmable Voltage or Current Soft-Start
Schemes
S Input Overvoltage Protection
S Space-Saving, 3mm x 3mm TQFN Package
Applications
Universal Input Offline AC-DC Power Supplies
Wide-Range DC-Input Flyback/Boost Battery
Chargers
Battery-Powered Applications
Industrial, Telecom, and Automotive Applications
Ordering Information/Selector Guide appears at end of
data sheet.
For related parts and recommended products to use with this part,
refer to www.maxim-ic.com/MAX17595.related.
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For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
ABSOLUTE MAXIMUM RATINGS
VIN to SGND...........................................................-0.3V to +40V
VDRV to SGND...................................-0.3V to +16V (MAX17595)
VDRV to SGND...........-0.3V to +6V (MAX17596 and MAX17597)
NDRV to SGND..................................... -0.3V to +(VDRV + 0.3)V
EN/UVLO to SGND................................... -0.3V to +(VIN + 0.3)V
OVI, RT, DITHER, COMP, SS, FB,
SLOPE to SGND..................................................... -0.3V to +6V
CS to SGND.............................................................-0.8V to +6V
PGND to SGND.....................................................-0.3V to +0.3V
Maximum Input/Output Current (Continuous)
VIN, NDRV.........................................................................100mA
NDRV (pulsed, for less than 100ns)..................................... Q1A
Continuous Power Dissipation TQFN (single-layer board)
(derate 20.8mW/NC above +70NC).............................1666mW
Operating Temperature Range......................... -40NC to +125NC
Storage Temperature Range............................. -65NC to +150NC
Junction Temperature......................................................+150NC
Lead Temperature (soldering, 10s).................................+300NC
Soldering Temperature (reflow).......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
Junction-to-Ambient Thermal Resistance (qJA)...............48°C/W
Junction-to-Case Thermal Resistance (qJC)......................7°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(VIN = 12V (for the MAX17595, bring VIN up to 21V for startup), VCS = VSLOPE = VDITHER = VFB = VOVI = VSGND = 0V,
VEN/UVLO = +2V; NDRV, SS, COMP are unconnected, RRT = 25kI, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless
otherwise noted. Typical values are at TA = TJ = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
INPUT SUPPLY (VIN)
VIN Voltage Range
VIN
MAX17595
MAX17596/MAX17597
8
29
4.5
36
V
MAX17595
18.5
20
21.5
MAX17596/MAX17597
3.5
4
4.4
MAX17595
6.5
7
7.7
MAX17596/MAX17597
3.3
3.9
4.25
VIN < UVLO
20
32
FA
32
FA
VIN Bootstrap UVLO Wakeup
VIN-UVR
VIN rising #
VIN Bootstrap UVLO Shutdown
Level
VIN-UVF
VIN falling $
VIN Supply Start-Up Current
(Under UVLO)
IVINSTARTUP
VIN Supply Shutdown Current
IIN-SH
VEN = 0V
20
VIN Supply Current
IIN-SW
Switching, fSW = 400kHz
2
V
V
mA
VIN CLAMP (INC) (MAX17595 ONLY)
VIN Clamp Voltage
VINC
MAX17595, IVIN = 2mA sinking, VEN = 0V
(Note 3)
VENR
VENF
30
33
36
VEN rising #
1.16
1.21
1.26
VEN falling $
1.1
1.15
1.2
V
ENABLE (EN)
EN Undervoltage Threshold
EN Input Leakage Current
IEN
VEN = 1.5V, TA = +25NC
-100
+100
V
nA
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MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 12V (for the MAX17595, bring VIN up to 21V for startup), VCS = VSLOPE = VDITHER = VFB = VOVI = VSGND = 0V,
VEN/UVLO = +2V; NDRV, SS, COMP are unconnected, RRT = 25kI, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless
otherwise noted. Typical values are at TA = TJ = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
8V < VIN < 15V and 0mA < IVDRV < 50mA
(MAX17595)
7.1
7.4
7.7
6V < VIN < 12V and 0mA < IVDRV < 50mA
(MAX17596/MAX17597)
4.7
4.9
70
100
UNITS
INTERNAL LDO (VDRV)
VDRV Output Voltage Range
VDRV Current Limit
VDRV Dropout
VDRV
IVDRV-MAX
V
5.1
mA
VIN = 4.5V, IVDRV = 20mA (MAX17596/
MAX17597)
4.2
VOVIR
VOVI rising #
1.16
1.21
1.26
VOVIF
VOVI falling $
1.1
1.15
1.2
VVDRV-DO
V
OVERVOLTAGE PROTECTION (OVI)
OVI Overvoltage Threshold
OVI Masking Delay
OVI Input Leakage Current
tOVI-MD
IOVI
2
VOVI = 1V, TA = +25NC
V
Fs
-100
+100
nA
100
1000
kHz
-8
+8
%
OSCILLATOR (RT)
NDRV Switching Frequency
Range
fSW
NDRV Switching Frequency
Accuracy
Maximum Duty Cycle
DMAX
(MAX17595/MAX17596)
46
48
50
(MAX17597)
90
92.5
95
%
SYNCHRONIZATION (DITHER)
Synchronization Logic-High
Input
VHI-SYNC
3
Synchronization Pulse Width
Synchronization Frequency
Range
V
50
fSYNCIN
(MAX17595/MAX17596)
1.1 x fSW
ns
1.8 x fSW
Hz
DITHERING RAMP GENERATOR (DITHER)
Charging Current
VDITHER = 0V
45
50
55
FA
Discharging Current
VDITHER = 2.2V
43
50
57
FA
Ramp-High Trip Point
2
V
Ramp-Low Trip Point
0.4
V
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MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 12V (for the MAX17595, bring VIN up to 21V for startup), VCS = VSLOPE = VDITHER = VFB = VOVI = VSGND = 0V,
VEN/UVLO = +2V; NDRV, SS, COMP are unconnected, RRT = 25kI, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless
otherwise noted. Typical values are at TA = TJ = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
9
4.4
10
11
FA
5
5.6
FA
1.21
1.23
V
SOFT-START/SOFT-STOP (SS)
Soft-Start Charging Current
Soft-Stop Discharging Current
ISSCH
ISSDISCH
SS Bias Voltage
For soft-stop enabled parts
VSS
SS Discharge Threshold
1.19
VSSDISCH
Soft-stop completion
0.15
V
Pulldown Impedance
RNDRV-N
INDRV (sinking) = 100mA
1.37
3
I
Pullup Impedance
RNDRV-P
INDRV (sourcing) = 5mA
4.26
8.5
I
Peak Sink Current
CNDRV = 10nF
1.5
A
Peak Source Current
CNDRV = 10nF
0.9
A
NDRV DRIVER (NDRV)
Fall Time
tNDRV-F
CNDRV = 1nF
10
ns
Rise Time
tNDRV-R
CNDRV = 1nF
20
ns
CURRENT-LIMIT COMPARATOR (CS)
Cycle-by-Cycle Peak -CurrentLimit Threshold
VCS-PEAK
290
305
320
mV
Cycle-by-Cycle Runaway
Current-Limit Threshold
VCS-RUN
340
360
380
mV
Cycle-by-Cycle ReverseCurrent Limit Threshold
VCS-REV
-122
-102
-82
mV
Current-Sense Leading-Edge
Blanking Time
tCS-BLANK
Propagation Delay from
Comparator Input to NDRV
tPDCS
From NDRV rising # edge
70
ns
From CS rising (10mV overdrive) to
NDRV falling (excluding leading
edge blanking)
40
ns
Number of Consecutive PeakCurrent-Limit Events to Hiccup
NHICCUP-P
8
event
Number of Runaway-CurrentLimit Events to Hiccup
NHICCUP-R
1
event
Overcurrent Hiccup Timeout
Minimum On-Time
32768
tON-MIN
cycle
90
130
170
ns
9
10
11
FA
SLOPE COMPENSATION (SLOPE)
Slope Bias Current
ISLOPE
Slope Resistor Range
25
200
kI
Slope Voltage Range to
Enable Current Soft-Start and
Minimum Slope Compensation
0
200
mV
����������������������������������������������������������������� Maxim Integrated Products 4
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 12V (for the MAX17595, bring VIN up to 21V for startup), VCS = VSLOPE = VDITHER = VFB = VOVI = VSGND = 0V,
VEN/UVLO = +2V; NDRV, SS, COMP are unconnected, RRT = 25kI, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless
otherwise noted. Typical values are at TA = TJ = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
Slope Voltage Range to
Enable Voltage Soft-Start and
Minimum Slope Compensation
MIN
TYP
MAX
4
Slope Voltage Range to
Enable Voltage Soft-Start
and Programmable Slope
Compensation
V
0.2
Slope Compensation Ramp
RSLOPE = 100kW
Default Slope Compensation
Ramp
VSLOPE < 0.2V or 4V < VSLOPE
140
UNITS
165
4
V
190
mV/Fs
50
mV/Fs
PWM COMPARATOR
Comparator Offset Voltage
VPWM-OS
Current-Sense Gain
ACS-PWM
VCOMP - VCS
DCOMP/DCS (TA = +25NC)
CS Peak Slope Ramp Current
ICSSLOPE
Comparator Propagation
Delay
1.65
1.81
2
V
1.75
1.97
2.15
V/V
Ramp current peak (TA = +25NC)
13
20
FA
tPWM
Change in VCS = 10mV (including internal
lead-edge blanking)
110
VREF
VFB, when ICOMP = 0 and VCOMP = 1.8V
1.19
VFB = 1.5V, TA = +25NC
-100
ns
ERROR AMPLIFIER
FB Reference Voltage
FB Input Bias Current
Voltage Gain
IFB
AEAMP
Transconductance
Gm
Transconductance Bandwidth
BW
1.21
1.23
+100
80
1.5
Open-loop (gain = 1), -3dB frequency
1.8
V
nA
dB
2.1
10
mS
MHz
Source Current
VCOMP = 1.8V, VFB = 1V
80
120
210
FA
Sink Current
VCOMP = 1.8V, VFB = 1.75V
80
120
210
FA
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
Temperature rising
+160
NC
20
NC
Note 2: All devices 100% production tested at TA = +25°C. Limits over temperature are guaranteed by design.
Note 3: The MAX17595 is intended for use in universal input power supplies. The internal clamp circuit at VIN is used to prevent
the bootstrap capacitor from changing to a voltage beyond the absolute maximum rating of the device when EN is low
(shutdown mode). Externally limit the maximum current to VIN (hence to clamp) to 2mA (max) when EN is low.
����������������������������������������������������������������� Maxim Integrated Products 5
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Typical Operating Characteristics
(VIN = 15V, VEN/UVLO = +2V, COMP = open, CVIN = 1FF, CVCC = 1FF, TA = TJ = -40NC to +125NC, unless otherwise noted.)
BOOTSTRAP UVLO WAKE-UP LEVEL
vs. TEMPERATURE (MAX17595)
MAX17595/6/7 toc01
MAX17595/6/7 toc02
4.15
20.03
VIN WAKE-UP LEVEL (V)
4.10
20.02
20.01
20.00
4.05
4.00
3.95
19.99
19.98
VIN FALLING THRESHOLD
vs. TEMPERATURE (MAX17595)
VIN BOOTSTRAP UVLO SHUTDOWN LEVEL (V)
20.04
3.90
-40 -20
0
20
40
60
80
100 120
0
20
40
60
80
7.020
7.015
7.010
7.005
7.000
100 120
-40 -20
0
3.90
3.85
3.80
60
80
100 120
MAX17595/6/7 toc05
1.209
EN/UVLO RISING THRESHOLD (V)
3.95
40
EN/ UVLO RISING THRESHOLD
vs. TEMPERATURE
MAX17595/6/7 toc04
4.00
20
TEMPERATURE (°C)
TEMPERATURE (°C)
VIN FALLING THRESHOLD vs. TEMPERATURE
(MAX17596/MAX17597)
VIN UVLO SHUTDOWN THRESHOLD (V)
MAX17595/6/7 toc03
7.025
6.995
-40 -20
TEMPERATURE (°C)
1.208
1.207
1.206
1.205
1.204
1.203
1.202
3.75
-40 -20
0
20
40
60
80
-40 -20
100 120
0
EN/UVLO FALLING THRESHOLD
vs. TEMPERATURE
40
60
80
100 120
OVI RISING THRESHOLD
vs. TEMPERATURE
MAX17595/6/7 toc06
1.148
1.147
1.146
1.145
MAX17595/6/7 toc07
1.211
OVI RISING THRESHOLD (V)
1.149
20
TEMPERATURE (°C)
TEMPERATURE (°C)
EN / UVLO FALLING THRESHOLD (V)
BOOTSTRAP UVLO WAKE-UP LEVEL (V)
VIN WAKE-UP LEVEL vs. TEMPERATURE
(MAX17596/MAX17597)
1.210
1.209
1.208
1.207
-40 -20
0
20
40
60
TEMPERATURE (°C)
80
100 120
-40 -20
0
20
40
60
80
100 120
TEMPERATURE (°C)
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MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Typical Operating Characteristics (continued)
(VIN = 15V, VEN/UVLO = +2V, COMP = open, CVIN = 1FF, CVCC = 1FF, TA = TJ = -40NC to +125NC, unless otherwise noted.)
OVI FALLING THRESHOLD
vs. TEMPERATURE
MAX17595/6/7 toc08
1.1495
1.1490
1.1485
1.1480
1.1475
2.4
24.5
23.5
22.5
21.5
0
20
40
60
80
0
20
40
60
80
2.0
1.9
1.8
100 120
-40 -20
0
TEMPERATURE (°C)
NDRV SWITCHING FREQUENCY (kHz)
700
600
500
400
300
200
80
100 120
RRT = 10kI
850
750
650
550
450
350
250
RRT = 100kI
150
100
60
MAX17595/6/7 toc12
950
800
40
NDRV SWITCHING FREQUENCY
vs. TEMPERATURE
MAX17595/6/7 toc11
900
20
TEMPERATURE (°C)
NDRV SWITCHING FREQUENCY
vs. RESISTOR
NDRV SWITCHING FREQUENCY (kHz)
2.1
1.5
-40 -20
TEMPERATURE (°C)
50
0
5
15
25 35 45 55
65 75 85 95
FREQUENCY SELECTION RESISTOR (kI)
FREQUENCY DITHERING vs. RDITHER
-40 -20
0
20
40
60
80
100 120
TEMPERATURE (°C)
SWITCHING WAVEFORMS (MAX17595)
MAX17595/6/7 toc13
14
FREQUENCY DITHERING (%)
2.2
1.6
100 120
1000
2.3
1.7
20.5
19.5
-40 -20
MAX17595/6/7 toc10
2.5
SWITCHING CURRENT (mA)
1.1500
SWITCHING CURRENT
vs. TEMPERATURE
MAX17595/6/7 toc09
25.5
VIN SUPPLY CURRENT UNDER UVLO (µA)
1.1505
OVI FALLING THRESHOLD (V)
VIN SUPPLY CURRENT UNDER UVLO
vs. TEMPERATURE
MAX17595/6/7 toc14
12
10
VDRAIN
100V/div
8
6
IPRI
1A /div
4
2
200 300 400 500 600 700 800 900 1000
4µs/div
RDITHER (kI)
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MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Typical Operating Characteristics (continued)
(VIN = 15V, VEN/UVLO = +2V, COMP = open, CVIN = 1FF, CVCC = 1FF, TA = TJ = -40NC to +125NC, unless otherwise noted.)
ENABLE STARTUP
ENABLE SHUTDOWN
MAX17595/6/7 toc15
HICCUP OPERATION
MAX17595/6/7 toc16
EN/UVLO
5V/div
MAX17595/6/7 toc17
EN/UVLO
5V/div
VOUT
10V/div
VOUT
10V/div
VOUT
10V/div
COMP
1V/div
VDRAIN
100V/div
COMP
1V/div
2ms /div
IPRI
2A/div
1ms/div
400µs/div
LOAD TRANSIENT RESPONSE
(15V OUTPUT)
SWITCHING CURRENT
vs. SWITCHING FREQUENCY
MAX17595/6/7 toc18
MAX17595/6/7 toc19
VOUT (AC)
0.5V/div
2.3
2.1
ILOAD
0.5A/div
1.9
1.7
1.5
100 200 300 400 500 600 700 800 900 1000
20ms/div
SWITCHING FREQUENCY (Hz)
EFFICIENCY GRAPH (15V OUTPUT)
BODE PLOT (15V OUTPUT)
MAX17595/6/7 toc20
MAX17595/6/7 toc21
100
90
80
PHASE
36°/div
EFFICIENCY (%)
SWITCHING CURRENT (mA)
2.5
VDC = 120V
70
60
50
40
30
BANDWIDTH = 8.8kHz
PHASE MARGIN = 64°
6 81
2
4 6 81
GAIN
10dB/div
2
4 6 8
20
10
0
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
LOAD CURRENT (A)
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MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
NDRV
PGND
CS
TOP VIEW
N.C.
Pin Configuration
12
11
10
9
VDRV 13
MAX17595
MAX17596
MAX17597
VIN 14
EN / UVLO 15
EP
1
2
3
4
SLOPE
RT
DITHER /
SYNC
+
N.C.
OVI 16
TQFN
8
SGND
7
SS
6
FB
5
COMP
Pin Description
PIN
NAME
1, 12
N.C.
FUNCTION
No Connection
2
SLOPE
Slope Compensation Input. A resistor, RSLOPE, connected from SLOPE to SGND programs the
amount of slope compensation with reference-voltage soft-start mode. Connecting this pin to
SGND enables duty-cycle soft-start with minimum slope compensation of 50mV/Fs. Setting VSLOPE
> 4V enables reference voltage soft-start with minimum slope compensation of 50mV/Fs.
3
RT
Switching Frequency Programming Resistor Connection. Connect resistor RRT from RT to SGND to
set the PWM switching frequency.
4
DITHER/SYNC
Frequency Dithering Programming or Synchronization Connection. For spread-spectrum frequency
operation, connect a capacitor from DITHER to SGND, and a resistor from DITHER to RT. To
synchronize the internal oscillator to the externally applied frequency, connect DITHER/SYNC to
the synchronization pulse.
5
COMP
6
FB
Transconductance Amplifier Inverting Input
7
SS
Soft-Start Capacitor Pin for Flyback Regulator. Connect a capacitor CSS from SS to SGND to set
the soft-start time interval.
8
SGND
9
CS
10
PGND
Power Ground. Connect PGND to the power ground plane.
11
NDRV
External Switching nMOS Gate-Driver Output
Transconductance Amplifier Output. Connect the frequency compensation network between
COMP and SGND.
Signal Ground. Connect SGND to the signal ground plane.
Current-Sense Input. Peak-current-limit trip voltage is 300mV.
����������������������������������������������������������������� Maxim Integrated Products 9
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Pin Description (continued)
PIN
NAME
FUNCTION
13
VDRV
Linear Regulator Output and Driver Input. Connect input bypass capacitor from VDRV to SGND as
close as possible to the IC.
14
VIN
Internal VDRV Regulator Input. Connect VIN to the input voltage source. Bypass VIN to PGND with
a 1FF minimum ceramic capacitor.
15
EN/UVLO
16
OVI
Overvoltage Comparator Input. Connect a resistive divider between the input supply, OVI, and
SGND to set the input overvoltage threshold.
—
EP
Exposed Pad
Enable/Undervoltage Lockout. To externally program the UVLO threshold of the input supply,
connect a resistive divider between input supply, EN, and SGND.
Detailed Description
The MAX17595 offers a bootstrap UVLO wakeup level
of 20V with a wide hysteresis of 15V minimum, and is
optimized for implementing isolated and non-isolated
universal (85V to 265V AC) offline single-switch flyback
converter or telecom (36V to 72V) power supplies. The
MAX17596/MAX17597 offer a UVLO wakeup level of
4.4V and are well-suited for low-voltage DC-DC flyback/
boost power supplies. An internal 1% reference (1.21V)
can be used to regulate the output down to 1.21V in
nonisolated flyback and boost applications. Additional
semi-regulated outputs, if needed, can be generated
by using additional secondary windings on the flyback
converter transformer.
The MAX17595/MAX17596/MAX17597 family utilizes
peak-current-mode control and external compensation
for optimizing closed-loop performance. The devices
include cycle-by-cycle peak current limit, and eight
consecutive occurrences of current-limit-event trigger hiccup mode, which protects external components by halting switching for a period of 32,768
cycles. The devices also include voltage soft-start
for nonisolated designs, and current soft-start for
isolated designs to allow monotonic and smooth rise of the
outpu voltage during startup. The voltage and current
soft-start modes can be selected using the SLOPE pin.
See Figure 1 for more information.
Input Voltage Range (VIN)
The MAX17595 has different rising and falling undervoltage lockout (UVLO) thresholds on the VIN pin than
the thresholds of the MAX17596/MAX17597. The thresholds for the MAX17595 are optimized for implementing
power supply startup schemes, typically used for offline
AC-DC power supplies. The MAX17595 is well-suited for
operation from rectified DC bus in AC-DC power-supply
applications, which are typical of front-end industrial
power-supply applications. As such, the MAX17595 has no
limitation on maximum input voltage, as long as the external
components are rated suitably and the maximum
operating voltages of the MAX17595 are respected.
The MAX17595 can be successfully used in universal
input (85V to 265V AC) rectified bus applications, in rectified 3-phase DC bus applications, and in telecom (36V to
72V DC) applications.
The MAX17596/MAX17597 are intended to implement
flyback (isolated and nonisolated) and boost converters. The VIN pin of the MAX17596/MAX17597 has a
maximum operating voltage of 36V. The MAX17596/
MAX17597 implement rising and falling thresholds on
the VIN pin that assume power-supply startup schemes
typical of low-voltage DC-DC applications, down to
an input voltage of 4.5V DC. Therefore, flyback /boost
converters with a 4.5V to 36V supply voltage range can
be implemented with the MAX17596/MAX17597.
���������������������������������������������������������������� Maxim Integrated Products 10
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
THERMAL SENSOR
VDRV
7.5V (MAX17595)
OR
5V (MAX17596/
MAX17597)
LDO
±50µA
MAX17595
MAX17596
MAX17597
5V
LDO
DITHER
CONTROL
AND
DRIVER LOGIC
AV
POK
2V/0.4V
HICCUP
VDRV
VIN
NDRV
DRIVER
UVLO
8 PEAK EVENTS
OR 1 RUNAWAY
CHIPEN
OSC
EN /
UVLO
SSDONE
PGND
OSC
PEAKLIM
COMP
PGND
305mV
DITHER
(SYNC)
1.21V
RUNAWAY
COMP
OVI
360mV
1.21V
BLANKING
CS
70ns
PWM COMP
RT
FIXED
OR VAR
10µA
10µA
SS
CHIPPEN
SLOPE
SLOPE
DECODE
SS
SSDONE
5µA
SS MODE
1.23V
OSC
R
COMP
1X
SGND
CHIPPEN/
HICCUP
(FACTORY OPTION)
VOLTAGE
SOFT-START
1.21V
R
SS MODE
SS
FB
SS
SS MODE
CURRENT
SOFT-START
Figure 1. MAX17595/MAX17596/MAX17597 Block Diagram
���������������������������������������������������������������� Maxim Integrated Products 11
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Internal Linear Regulator (VDRV)
The internal functions and driver circuits are designed
to operate from 7.5V (MAX17595) or 5V (MAX17596/
MAX17597) power supply voltages. The MAX17595/
MAX17596/MAX17597 family has an internal linear regulator that is powered from the VIN pin. The output of the
linear regulator is connected to the VDRV pin, and should
be decoupled with a 1FF capacitor to ground for stable
operation. The VDRV regulator output supplies all the operating current of the MAX17595/MAX17596/MAX17597.
The maximum operating voltage on the VIN pin is 29V for
the MAX17595, and 36V for the MAX17596/MAX17597.
n-Channel MOSFET Gate Driver (NDRV)
The MAX17595/MAX17596/MAX17597 family offers a
built-in gate driver for driving an external n-channel
MOSFET. The NDRV pin can source/sink currents in
excess of 650mA/1000mA.
Maximum Duty Cycle
The MAX17595/MAX17596 operate at a maximum duty
cycle of 49%. The MAX17597 offers a maximum duty
cycle of 94% to implement flyback and boost converters
involving large input-to-output voltage ratios in DC-DC
applications. Slope compensation is necessary for stable
operation of peak-current-mode controlled converters
such as the MAX17595/MAX17596/MAX17597 at duty
cycles greater than 50%, in addition to the loop compensation required for small signal stability. The MAX17595/
MAX17596/MAX17597 implement a SLOPE pin for this
purpose. See the Slope Compensation section for more
details.
Soft-Start (SS)
The MAX17595/MAX17596/MAX17597 devices implement soft-start operation for the flyback/boost regulator.
A capacitor connected to the SS pin programs the softstart period. The soft-start feature reduces input inrush
current during startup. The devices allow the end user
to select between voltage soft-start, usually preferred in
nonisolated applications, and current soft-start, which is
useful in isolated applications to get a monotonic and
smooth rise in output voltage. See the Input Voltage
Range (VIN) section.
Soft-Stop
A soft-stop feature can be requested from the factory.
This feature ramps down the duty cycle of operation of
the converter to zero in a controlled fashion, and enables
controlled ramp down of output voltage. The soft-stop
duration is twice that of the programmed soft-start period.
This is particularly useful in implementing controlled
shutdown of output voltage in isolated power converters.
Switching Frequency Selection (RT)
The ICs’ switching frequency is programmable between
100kHz and 1MHz with a resistor RRT connected between
RT and SGND. Use the following formula to determine the
appropriate value of RRT needed to generate the desired
output-switching frequency (fSW):
R RT =
10 10
fSW
where fSW is the desired switching frequency.
Frequency Dithering for
Spread-Spectrum Applications (Low EMI)
The switching frequency of the converter can be
dithered in a range of Q10% by connecting a capacitor from DITHER/SYNC to SGND, and a resistor from
DITHER to RT, as shown in the Typical Operating Circuits.
Spread-spectrum modulation technique spreads the
energy of switching frequency and its harmonics over a
wider band while reducing their peaks, helping to meet
stringent EMI goals.
Applications Information
Startup Voltage and Input Overvoltage
Protection Setting (EN/UVLO, OVI)
The devices’ EN/UVLO pin serves as an enable/disable
input, as well as an accurate programmable input UVLO
pin. The devices do not commence startup operation
unless the EN/UVLO pin voltage exceeds 1.21V (typ).
The devices turn off if the EN/UVLO pin voltage falls
below 1.15V (typ). A resistor-divider from the input DC
bus to ground can be used to divide down and apply a
fraction of the input DC voltage (VDC) to the EN/UVLO
pin. The values of the resistor-divider can be selected
so that the EN/UVLO pin voltage exceeds the 1.23V (typ)
turn-on threshold at the desired input DC bus voltage. The
same resistor-divider can be modified with an additional
resistor (ROVI) to implement input overvoltage protection in addition to the EN/UVLO functionality as shown
in Figure 2. When voltage at the OVI pin exceeds
1.21V (typ), the devices stop switching and resume
switching opera­tions only if voltage at the OVI pin falls
below 1.15V (typ). For given values of startup DC input
���������������������������������������������������������������� Maxim Integrated Products 12
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
voltage (VSTART) and input overvoltage-protection
voltage (VOVI), the resistor values for the divider can
be calculated as fol­
lows, assuming a 24.9kI resistor
for ROVI:
 VOVI

R EN =
R OVI × 
− 1 k I
 VSTART

where ROVI is in kI, while VSTART and VOVI are in volts.
 VSTART 
R SUM = R OVI + R EN × 
− 1 k I
 1.21

where REN
RDC1
RSUM
RDC2
RDC3
EN/UVLO
REN
, ROVI is in kI, while VSTART is in volts.
In universal AC input applications, RSUM might need
to be implemented as equal resistors in series (RDC1,
RDC2, and RDC) so that voltage across each resistor is
limited to its maximum operation voltage.
R
=
DC1 R=
DC2 R=
DC3
R SUM
3
kI
For low-voltage DC-DC applications based on the
MAX17596/MAX17597, a single resistor can be used in
the place of RSUM, as the voltage across it is approximately 40V.
Startup Operation
The MAX17595 is optimized for implementing an offline
single-switch flyback converter and has a 20V VIN UVLO
wake-up level with hysteresis of 15V (min). In offline
applications, a simple cost-effective RC startup circuit is
used. When the input DC voltage is applied, the startup
resistor (RSTART) charges the startup capacitor (CSTART),
causing the voltage at the VIN pin to increase towards
the wake-up VIN UVLO threshold (20V typ). During this
time, the MAX17595 draws a low startup current of 20FA
(typ) through RSTART. When the voltage at VIN reaches
the wake-up VIN UVLO threshold, the MAX17595 commences switching and control operations. In this condition, the MAX17595 draws 2mA (typ) current from
CSTART, when operated at 1MHz switching frequency,
for its internal operation. In addition, the average value
of gate drive current is also drawn from CSTART, which
is a function of the gate charge of the external MOSFET
used. Since this total current cannot be supported by
the current through RSTART, the voltage on CSTART starts
to drop. When suitably configured, as shown in Figure
9, the external MOSFET is switched by the NDRV pin
and the flyback converter generates an output voltage
OVI
MAX17595
MAX17596
MAX17597
ROVI
Figure 2. Programming EN /UVLO and OVI
(VOUT), and a bias voltage (VBIAS) that is bootstrapped
to the VIN pin through the diode (D2). If VBIAS exceeds
the sum of 7V, and the drop across D2 before the voltage on CSTART falls below 7V, then the VIN voltage is
sustained by VBIAS, allowing the MAX17595 to continue
operating with energy from VBIAS. The large hysteresis
(13V typ) of the MAX17595 allows for a small startup
capacitor (CSTART). The low startup current (20FA typ)
allows the use of a large startup resistor (RSTART),
thus reducing power dissipation at higher DC bus voltages. Figure 3 shows the typical RC startup scheme
for the MAX17595, when the output voltage VOUT is
used as the bias voltage to sustain switching operation.
RSTART might need to be implemented as equal, multiple
resistors in series (RIN1, RIN2, and RIN3) to share the
applied high DC voltage in offline applications so
that the voltage across each resistor is limited to its
maximum continuous operating voltage rating. RSTART
and CSTART can be calculated as:

 Q GATE × fSW  t SS
C START =
FF
IIN + 
 ×

10 6

 10
where IIN is the supply current drawn at the VIN pin in
mA, QGATE is the gate charge of the external MOSFET
used in nC, fSW is the switching frequency of the converter in Hz, and tSS is the soft-start time programmed for the
flyback converter in ms. See the Programming Soft-Start
of Flyback/Boost Converter (SS) section.
���������������������������������������������������������������� Maxim Integrated Products 13
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
R START =
(VSTART − 10) × 50
The startup capacitor (CSTART) can be calculated as:
kI
1 + C START 

 Q GATE × fSW  t SS
C START =
FF
IIN + 
 ×
10 6

 10

where CSTART is the startup capacitor in FF.
For designs that cannot accept power dissipation in the
startup resistors at high DC input voltages in offline appli­
cations, the startup circuit can be set up with a current
source instead of a startup resistor as shown in Figure 4.
where IIN is the supply current drawn at the VIN pin in
mA, QGATE is the gate charge of the external MOSFET
used in nC, fSW is the switching frequency of the converter in kHz, and tSS is the soft-start time programmed
for the flyback converter in ms.
VDC
VOUT
RIN1
RSTART
RIN2
VDC
VOUT
CF
MAX17595
RIN3
NDRV
VIN
CSTART
LDO
DRV
CS
VDRV
CVDRV
Figure 3. MAX17595 RC-Based Startup Circuit
VDC
RIN1
RSUM
RIN2
VDC
VOUT
D1
RIN3
COUT
VOUT
MAX17595
RISRC
NDRV
VIN
CSTART
LDO
DRV
CS
VDRV
CVDRV
RS
Figure 4. MAX17595 Current-Source-Based Startup Circuit
���������������������������������������������������������������� Maxim Integrated Products 14
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Resistors RSUM and RISRC can be calculated as:
=
R SUM
=
RISRC
VSTART
10
VBEQ1
70
incurred to supply the operating current of the MAX17596/
MAX17597 can be tolerated, the VIN pin is directly
connected to the DC input, as shown in Figure 5. In the
case of higher DC input voltages (e.g., 16V to 32V DC),
a startup circuit, such as that shown in Figure 6, can be
used to minimize power dissipation in the startup circuit.
In this startup scheme, the transistor (Q1) supplies the
switching current until a bias winding NB comes up. The
resistor (RZ) can be calculated as:
MW
MW
The VIN UVLO wakeup threshold of the MAX17596/
MAX17597 is set to 4.1V (typ) with a 200mV hyster­esis,
optimized for low-voltage DC-DC applications down to
4.5V. For applications where the input DC voltage is low
enough (e.g., 4.5V to 5.5V DC) that the power loss
RZ =
9 × (VINMIN − 6.3) kW
VDC
VOUT
D1
VIN
VIN
VDRV
LDO
COUT
CDRV
Np
Ns
NDRV
CS
MAX17596
MAX17597
RS
Figure 5. MAX17596/MAX17597 Typical Startup Circuit with VIN Connected Directly to DC Input
VDC
D1
RZ
Q1
VIN
LDO
VDRV
ZD1
6.3V
NB
COUT
CDRV
Np
Ns
VIN
CIN
NDRV
CS
MAX17596
MAX17597
RS
Figure 6. MAX17596/MAX17597 Typical Startup Circuit with Bias Winding to Turn Off Q1 and Reduce Power Dissipation
���������������������������������������������������������������� Maxim Integrated Products 15
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Programming Soft-Start of
Flyback /Boost Converter (SS)
The soft-start period in the voltage soft-start scheme of
the devices can be programmed by selecting the value
of the capacitor connected from the SS pin to SGND. The
capacitor CSS can be calculated as:
=
C SS 8.2645 × t SS nF
where tSS is expressed in ms. The soft-start period in
the current soft-start scheme depends on the load at the
output and the soft-start capacitor.
Programming Output Voltage
The devices incorporate an error amplifier with a 1% precision voltage reference that enables negative feedback
control of the output voltage. The output voltage of the
switching converter can be programmed by selecting the
values for the resistor-divider connected from VOUT, and
the flyback /boost output to ground, with the midpoint of
the divider connected to the FB pin (Figure 7). With RB
selected in the 20kI to 50kI range, RU can be calculated as:
 VOUT 
R U =×
RB 
− 1 kI, where R B is in kI.
 1.21

Peak-Current-Limit Setting (CS)
The devices include a robust overcurrent protection
scheme that protects the device under overload and
short-circuit conditions. A current-sense resistor (RCS
in the Typical Operating Circuits), connected between
the source of the MOSFET and PGND, sets the peak
current limit. The current-limit comparator has a voltage
trip level (VCS-PEAK) of 300mV. Use the following equation to calculate the value of RCS:
R CS =
300mV
IMOSFET
I
where IMOSFET is the peak current flowing through the
MOSFET. When the voltage produced by this current
(through the current-sense resistor) exceeds the currentlimit comparator threshold, the MOSFET driver (NDRV)
terminates the current on-cycle within 30ns (typ).
The devices implement 65ns of leading-edge blanking
to ignore leading-edge current spikes. These spikes are
caused by reflected secondary currents, capacitance
discharging current at the MOSFET’s drain, and gate
charging current. Use a small RC network for additional
filtering of the leading edge spike on the sense waveform
VOUT
RU
FB
RB
MAX17595
MAX17596
MAX17597
Figure 7. Programming Output Voltage
when needed. Set the corner frequency between 10MHz
and 20MHz. After the leading-edge blanking time,
the device monitors VCS. The duty cycle is terminated
immediately when VCS exceeds 300mV.
The devices offer a runaway current limit scheme that
protects the devices under high-input-voltage shortcircuit conditions when there is insufficient output voltage available to restore inductor current built up during
the on period of the flyback/boost converter. Either eight
consecutive occurrences of the peak-current-limit event
or one occurrence of the runaway current limit trigger a
hiccup mode that protects the converter by immediately
suspending switching for a period of time (tRSTART).
This allows the overload current to decay due to power
loss in the converter resistances, load, and the output
diode of the flyback/boost converter before soft-start
is attempted again. The runaway current limit is set
at a VCS-PEAK of 360mV (typ). The peak-current-limittriggered hiccup operation is disabled until the end of
the soft-start period, while the runaway current-limittriggered hiccup operation is always enabled.
Programming Slope
Compensation (SLOPE)
The MAX17595/MAX17596 operate at a maximum duty
cycle of 49%. In theory, they do not require slope
compensation to prevent subharmonic instability that
occurs naturally in continuous-conduction mode (CCM)
peak-current-mode-controlled converters operating at
duty cycles greater than 50%. In practice, the MAX17595/
MAX17596 require a minimum amount of slope compensation to provide stable operation. The devices allow the
user to program this default value of slope compensation
simply by leaving the SLOPE pin unconnected. It is recommended that discontinuous-mode designs also use
this minimum amount of slope compensation to provide
better noise immunity and jitter-free operation.
���������������������������������������������������������������� Maxim Integrated Products 16
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
The MAX17597 flyback/boost converter can be designed
to operate in either discontinuous-conduction mode
(DCM) or to enter into the continuous-conduction mode
at a specific load condition for a given DC input
voltage. In continuous-conduction mode, the flyback/
boost converter needs slope compensation to avoid
subharmonic instability that occurs naturally over all
specified load and line conditions in peak-current-mode
controlled converters operating at duty cycles greater
than 50%. A minimum amount of slope signal is added to
the sensed current signal even for converters operating
below 50% duty to provide stable, jitter-free operation.
The SLOPE pin allows the user to program the necessary
slope compensation by setting the value of the resistor
(RSLOPE) connected from the SLOPE pin to ground.
R SLOPE =
SE − 8
1.55
kI
where the slope (SE) is expressed in mV/Fs.
Frequency Dithering for
Spread-Spectrum Applications (Low EMI)
The switching frequency of the converter can be dithered
in a range of Q10% by connecting a capacitor from
DITHER/SYNC to SGND, and a resistor from DITHER
to RT as shown in the Typical Operating Circuits. This
results in lower EMI.
A current source at DITHER/SYNC charges the capacitor
CDITHER to 2V at 50FA. Upon reaching this trip point, it
discharges CDITHER to 0.4V at 50FA. The charging and
discharging of the capacitor generates a triangular waveform on DITHER/SYNC with peak levels at 0.4V and 2V
and a frequency that is equal to:
fTRI =
Error Amplifier, Loop Compensation,
and Power Stage Design of
Flyback/Boost Converter
The flyback /boost converter requires proper loop
compen­sation to be applied to the error-amplifier output
to achieve stable operation. The goal of the compensator
design is to achieve desired closed-loop bandwidth,
and sufficient phase margin at the crossover frequency
of the open-loop gain-transfer function of the converter.
The error amplifier provided in the devices is a transconductance amplifier. The compensation network used
to apply the necessary loop compensation is shown in
Figure 8.
The flyback/boost converter can be used to implement
the following converters and operating modes:
•
Nonisolated flyback converter in discontinuous-conduction mode (DCM flyback)
•
Nonisolated flyback converter in continuous-conduction mode (CCM flyback)
•
Boost converter in discontinuous-conduction mode
(DCM boost)
•
Boost converter in continuous-conduction mode
(CCM boost)
Calculations for loop-compensation values (RZ, CZ, and
CP) for these converter types and design procedures for
power-stage components are detailed in the following
sections.
COMP
50 FA
C DITHER × 3.2V
typically, fTRI should be set close to 1kHz. The resistor
RDITHER connected from DITHER/SYNC to RT determines the amount of dither as follows:
%DITHER =
RZ
CZ
CP
MAX17595
MAX17596
MAX17597
R RT
R DITHER
Figure 8. Error-Amplifier Compensation Network
where %DITHER is the amount of dither expressed as a
percentage of the switching frequency. Setting RDITHER
to 10 x RRT generates Q10% dither.
���������������������������������������������������������������� Maxim Integrated Products 17
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
DCM Flyback
Primary Inductance Selection
In a DCM flyback converter, the energy stored in the
primary inductance of the flyback transformer is
delivered entirely to the output. The maximum primary
inductance value for which the converter remains in DCM
at all operating conditions can be calculated as:
L PRIMAX ≤
(VINMIN × D MAX )
2
× 0.4
(VOUT + VD ) × IOUT × fSW
where DMAX is chosen as 0.35 for the MAX17595/
MAX17596 and 0.7 for the MAX17597; VD is the
voltage drop of the out­put rectifier diode on the secondary
winding, and fSW is the switching frequency of the power
converter. Choose the primary inductance value to be
less than LPRIMAX.
Duty Cycle Calculation
The accurate value of the duty cycle (DNEW) for the
selected primary inductance (LPRI) can be calculated
using the following equation:
D NEW =
2.5 × L PRI × (VOUT + VD ) × IOUT × fSW
VINMIN
Turns Ratio Calculation (Ns/Np)
Transformer turns ratio (K = Ns/Np) can be calculated as:
K=
(VOUT + VD ) × (1 − D MAX )
VINMIN × D MAX
Peak/RMS Current Calculation
The transformer manufacturer needs RMS current
values in the primary and secondary to design the wire
diameter for the different windings. Peak current calculations are useful in setting the current limit. Use the following equations to calculate the primary and secondary
peak and RMS currents.
Maximum primary peak current:
IPRIPEAK =
VINMIN × D NEW
L PRI × fSW
I SECPEAK =
IPRIPEAK
K
Maximum primary peak current:
I SECRMS = IPRIPEAK
I SECPEAK x L PRI x fSW
3 x (VOUT + VD )
For the purpose of current-limit setting, ILIM can be calculated as follows:
=
ILIM IPRIPEAK × 1.2
Primary Snubber Selection
Ideally, the external MOSFET experiences a drain-source
voltage stress equal to the sum of the input voltage and
reflected voltage across the primary winding during the
off period of the MOSFET. In practice, parasitic inductors
and capacitors in the circuit, such as leakage inductance
of the flyback transformer, cause voltage overshoot and
ringing, in addition to the ideally expected voltage stress.
Snubber circuits are used to limit the voltage overshoots
to safe levels within the voltage rating of the external
MOSFET. The snubber capacitor can be calculated
using the following equation:
C SNUB =
2 × L LK × IPRIPEAK 2 × K 2
VOUT 2
where LLK is the leakage inductance that can be
obtained from the transformer specifications (usually
1.5%–2% of the primary inductance).
The power to be dissipated in the snubber resistor is
calculated using the following formula:
PSNUB = 0.833 × L LK × IPRIPEAK 2 × fSW
The snubber resistor is calculated based on the equation
below:
R SNUB =
6.25 × VOUT 2
PSNUB × K 2
The voltage rating of the snubber diode is:
Maximum primary RMS current:
I=
PRIRMS IPRIPEAK ×
Maximum secondary peak current:
D NEW
VOUT 

VDSNUB
= VINMAX +  2.5 ×

K 

3
���������������������������������������������������������������� Maxim Integrated Products 18
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Output Capacitor Selection
X7R ceramic output capacitors are preferred in industrial
applications due to their stability over temperature. The
output capacitor is usually sized to support a step load
of 50% of the maximum output current in the application,
so that the output-voltage deviation is contained to 3% of
the output-voltage change. The output capacitance can
be calculated as follows:
C OUT =
I STEP × t RESPONSE
∆VOUT
1 
0.33
t RESPONSE ≅ 
+

fSW 
 fC
where ISTEP is the load step, tRESPONSE is the response
time of the controller, DVOUT is the allowable output voltage deviation, and fC is the target closed-loop crossover
frequency. fC is chosen to be one-tenth of the switching
frequency, fSW. For the flyback converter, the output
capacitor supplies the load current when the main
switch is on; therefore, the output voltage ripple is a
function of load current and duty cycle. Use the following
equation to calculate the output capacitor ripple:
D NEW × IPRIPEAK − K × IOUT 
∆VCOUT = 
2 × IPRIPEAK × fSW × C OUT
2
where IOUT is load current and DNEW is the duty cycle at
minimum input voltage.
Input Capacitor Selection
The MAX17595 is optimized to implement offline AC-DC
converters. In such applications, the input capacitor
must be selected based on either the ripple due to
the rectified line voltage, or based on holdup-time
requirements. Holdup time can be defined as the time
period over which the power supply should regulate
its output voltage from the instant the AC power fails.
The MAX17596/MAX17597 are useful in implementing
low-voltage DC-DC applications where the switchingfrequency ripple must be used to calculate the input
capacitor. In both cases, the capacitor must be sized to
meet RMS current requirements for reliable operation.
A) Capacitor selection based on switching ripple
(MAX17596/MAX17597)
For DC-DC applications, X7R ceramic capacitors
are recommended due to their stability over the
operating temperature range. The ESR and ESL of a
ceramic capacitor are relatively low, so the ripple
voltage is dominated by the capacitive component.
For the flyback converter, the input capacitor supplies the current when the main switch is on. Use the
following equation to calculate the input capacitor
for a specified peak-to-peak input switching ripple
(VIN_RIP):
CIN =
D NEW × IPRIPEAK 1 − (0.5 × D NEW )
2
2 × fSW × VIN_RIP
B) Capacitor selection based on rectified line voltage
ripple (MAX17595)
For the flyback converter, the input capacitor
supplies the input current when the diode rectifier is
off. The voltage discharge (VIN_RIP), due to the input
average current, should be within the limits specified:
CIN =
0.5 × IPRIPEAK × D NEW
fRIPPLE × VIN_RIP
where fRIPPLE, the input AC ripple frequency equal
to the supply frequency for half-wave rectification,
is two times the AC supply frequency for full-wave
rectification.
C) Capacitor selection based on holdup time requirements (MAX17595)
For a given output power (PHOLDUP) that needs to
be delivered during holdup time (tHOLDUP), DC bus
voltage at which the AC supply fails (VINFAIL), and
the minimum DC bus voltage at which the converter
can regulate the output voltages (VINMIN), the input
capacitor (CIN) is estimated as:
CIN =
3 × PHOLDUP × t HOLDUP
(VINFAIL 2 − VINMIN 2 )
the input capacitor RMS current can be calculated as:
IINCRMS =
0.6 × VINMIN × (D MAX )
2
fSW × L PRI
���������������������������������������������������������������� Maxim Integrated Products 19
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
External MOSFET Selection
A MOSFET selection criterion includes maximum drain
voltage, peak/RMS current in the primary, and the
maximum allowable power dissipation of the package
without exceeding the junction temperature limits. The
voltage seen by the MOSFET drain is the sum of the input
voltage, the reflected secondary voltage on the transformer primary, and the leakage inductance spike. The
MOSFET’s absolute maximum VDS rating must be higher
than the worst-case drain voltage:
 VOUT + VDIODE 

VDSMAX =
VINMAX + 
 × 2.5
K



The drain current rating of the external MOSFET is
selected to be greater than the worst-case peak-currentlimit setting.
Secondary Diode Selection
Secondary-diode selection criteria includes the maxi­
mum reverse voltage, average current in the secondaryreverse recovery time, junction capacitance, and the
maximum allowable power dissipation of the package.
The voltage stress on the diode is the sum of the output
voltage and the reflected primary voltage. The maximum
operating reverse-voltage rating must be higher than the
worst-case reverse voltage:
VSECDIODE= 1.25 × (K × VINMAX + VOUT )
The current rating of the secondary diode should be
selected so that the power loss in the diode (given as
the product of forward-voltage drop and the average
diode current) should be low enough to ensure that the
junction temperature is within limits. This necessitates
that the diode current rating be in the order of 2 x IOUT
to 3 x IOUT. Select fast-recovery diodes with a recovery
time less than 50ns, or Schottky diodes with low junction
capacitance.
Error Amplifier Compensation Design
The loop compensation values are calculated as:
=
R
Z 450 ×
 0.1× f  2 
SW 
1 + 
  × VOUT × IOUT
 
fP
 

2 × L PRI × fSW
where:
fP =
IOUT
π × VOUT × C OUT
CZ =
CP =
1
π × R Z × fP
1
π × R Z × fSW
fSW is the switching frequency of the devices.
CCM Flyback
Transformer Turns Ratio Calculation
(K = Ns / Np)
The transformer turns ratio can be calculated using the
following formula:
K=
(VOUT + VD ) × (1 − D MAX )
VINMIN × D MAX
where DMAX is the duty cycle assumed at minimum
input (0.35 for the MAX17595/MAX17596 and 0.7 for the
MAX17597).
Primary Inductance Calculation
Calculate the primary inductance based on the ripple:
(VOUT + VD ) × (1 − D NOM) × K
L PRI =
2 × IOUT × β × fSW
where DNOM, the nominal duty cycle at nominal operating
DC input voltage VINNOM, is given as:
D NOM =
(VOUT + VD ) × K
VINNOM + (VOUT + VD ) × K
The output current, down to which the flyback converter
should operate in CCM, is determined by selection of
the fraction A in the above primary inductance formula.
For example, A should be selected as 0.15 so that the
converter operates in CCM down to 15% of the maximum
output load current. Since the ripple in the primary current
waveform is a function of duty cycle and is maximum at
maximum DC input voltage, the maximum (worst-case)
load current down to which the converter operates in
CCM occurs at maximum operating DC input voltage.
VD is the forward drop of the selected output diode at
maximum output current.
���������������������������������������������������������������� Maxim Integrated Products 20
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Peak and RMS Current Calculation
RMS current values in the primary and secondary are
needed by the transformer manufacturer to design the
wire diameter for the different windings. Peak current
calculations are useful in setting the current limit. Use the
following equations to calculate the primary and secondary
peak and RMS currents.
Maximum primary peak current:
 IOUT × K   VINMIN × D MAX 
IPRIPEAK 
=

+
 1 − D MAX   2 × L PRI × fSW 
Maximum primary RMS current:
IPRIRMS =
IPRIPEAK 2 + ∆IPRI 2 − (IPRIPEAK × ∆IPRI)
3
×
D MAX
where DIPRI is the ripple current in the primary current
waveform and is given by:
 VINMIN × D MAX 
∆IPRI =


 L PRI × fSW 
Maximum secondary peak current:
IPRIPEAK
I SECPEAK =
K
Maximum secondary RMS current:
I SECRMS =
of 50% of the maximum output current in the application
so that the output-voltage deviation is contained to 3% of
the output-voltage change. The output capacitance can
be calculated as:
C OUT =
× 1 − D MAX
where DISEC is the ripple current in the secondary current
waveform and is given by:
 VINMIN × D MAX 
∆I SEC =


 L PRI × fSW × K 
For the purpose of current-limit setting, the peak current
can be calculated as follows:
=
ILIM IPRIPEAK × 1.2
Primary RCD Snubber Selection
The design procedure for primary RCD snubber selection
is identical to that outlined in the DCM Flyback section.
Output Capacitor Selection
X7R ceramic output capacitors are preferred in industrial
applications due to their stability over temperature. The
output capacitor is usually sized to support a step load
∆VOUT
t RESPONSE ≅ (
0.33
fC
+
1
fSW
)
where ISTEP is the load step, tRESPONSE is the response
time of the controller, DVOUT is the allowable output
voltage deviation, and fC is the target closed-loop crossover frequency. fC is chosen to be less than one-fifth of
the worst-case (lowest) RHP zero frequency fRHP. The
right half-plane zero frequency is calculated as follows:
fZRHP =
(1 − D MAX ) 2 × VOUT
2 × π × D MAX × L PRI × IOUT × K 2
For the CCM flyback converter, the output capacitor
supplies the load current when the main switch is on;
therefore, the output voltage ripple is a function of load
current and duty cycle. Use the following equation to
estimate the output voltage ripple:
IOUT × D MAX
∆VCOUT =
fSW × C OUT
I SECPEAK 2 + ∆I SEC 2 + (I SECPEAK × ∆I SEC )
3
I STEP × t RESPONSE
Input Capacitor Selection
The design procedure for input capacitor selection is
identical to that outlined in the DCM Flyback section.
External MOSFET Selection
The design procedure for external MOSFET selection is
identical to that outlined in the DCM Flyback section.
Secondary-Diode Selection
The design procedure for secondary-diode selection is
identical to that outlined in the DCM Flyback section.
Error Amplifier Compensation Design
In the CCM flyback converter, the primary inductance
and the equivalent load resistance introduces a right
half-plane zero at the following frequency:
fZRHP =
(1 − D MAX ) 2 × VOUT
2 × π × D MAX × L PRI × IOUT × K 2
���������������������������������������������������������������� Maxim Integrated Products 21
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
The loop compensation values are calculated as:
=
RZ
225 × IOUT
 fRHP 
× 1+ 

(1 − D MAX )
 5 × fP 
2
where fP, the pole due to output capacitor and load is
given by:
fP =
(1 + D MAX ) × IOUT
2 × π × C OUT × VOUT
where is IPK given by:
2 × (VOUT − VIN_MIN) × IOUT 
IPK = 

L INMIN × fSW


LINMIN is the minimum value of the input inductor taking
into account tolerance and saturation effects.
Output Capacitor Selection
The output capacitance can be calculated as follows:
The above selection of RZ sets the loop-gain crossover
frequency (fC, where the loop gain equals 1) equal to
1/5th the right half-plane zero frequency.
fZRHP
fC ≤
5
With the control loop zero placed at the load pole
frequency:
1
CZ =
2π × R Z × fP
With the high-frequency pole placed at half the switching
frequency:
CP =
1
π × R Z × fSW
C OUT =
Inductance Selection
The design procedure starts with calculating the boost
converter’s input inductor, such that it operates in
DCM at all operating line and load conditions. The
critical inductance required to maintain DCM operation is
calculated as:
L IN ≤
where VINMIN is the minimum input voltage.
Peak/RMS Currents Calculation
For the purposes of setting the current limit, the peak current in the inductor can be calculated as:
ILIM
= IPK × 1.2
0.33
fC
+
1
fSW
)
where ISTEP is the load step, tRESPONSE is the response
time of the controller, DVOUT is the allowable output
voltage deviation, and fC is the target closed-loop
crossover frequency. fC is chosen to be one-tenth of
the switching frequency fSW. For the boost converter,
the output capacitor supplies the load current when the
main switch is on; therefore, the output voltage ripple is a
function of duty cycle and load current. Use the following
equation to calculate the output capacitor ripple:
IOUT × L IN × IPK
∆VCOUT =
VINMIN × C OUT
Input Capacitor Selection
The input ceramic capacitor value required can be
calculated based on the ripple allowed on the input DC
bus. The input capacitor should be sized based on the
RMS value of the AC current handled by it. The calculations are:
3.75 × IOUT


CIN = 

V
f
(1
D
)
×
×
−
MAX 
 INMIN SWMIN
The capacitor RMS can be calculated as:
(V
− VIN_MIN ) × VIN_MIN 2  × 0.4
 OUT

IOUT × VOUT 2 × fSW
∆VOUT
t RESPONSE ≅ (
DCM Boost
In a DCM boost converter, the inductor current returns to
zero in every switching cycle. Energy stored during the
on-time of the main switch Q1 is delivered entirely to the
load in each switching cycle.
I STEP × t RESPONSE
I CIN_RMS =
IPK
2× 3
Error Amplifier Compensation Design
The loop compensation values for the error amplifier can
now be calculated as:
=
CZ
G DC × G M × 10
=
2 × π × fSW
(GDC × 10) nF
where GDC, the DC gain of the power stage, is given as:
���������������������������������������������������������������� Maxim Integrated Products 22
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
G DC =
8 × (VOUT − VINMIN) × fSW × VOUT 2 × L IN
RZ =
(2VOUT − VINMIN) 2 × IOUT
VOUT × C OUT × (VOUT − VINMIN)
IOUT × C Z × (2VOUT − VINMIN)
where VINMIN is the minimum operating input voltage,
and IOUT is the maximum load current.
CP =
C OUT × ESR
RZ
Slope Compensation
In theory, the DCM boost converter does not require
slope compensation for stable operation. In practice, the
converter needs a minimum amount of slope for good
noise immunity at very light loads. The minimum slope is
set for the MAX17596/MAX17597 by leaving the SLOPE
pin unconnected.
Output Diode Selection
The voltage rating of the output diode for the boost
converter ideally equals the output voltage of the
boost converter. In practice, parasitic inductances and
capacitances in the circuit interact to produce voltage
overshoot during the turn-off transition of the diode that
occurs when the main switch Q1 turns on. The diode
rating should therefore be selected with the necessary
margin to accommodate this extra voltage stress. A voltage rating of 1.3 x VOUT provides the necessary design
margin in most cases.
The RMS current in the MOSFET is useful in estimating
the conduction loss, and is given as:
IMOSFETRMS =
IPK 3 × L INS × fSW
3 × VINMIN
where IPK is the peak current calculated at the lowest
operating input voltage, VINMIN.
CCM Boost
In a CCM boost converter, the inductor current does
not return to zero during a switching cycle. Since
the MAX17597 implements a nonsynchronous boost
converter, the inductor current will enter DCM operation
at load currents below a critical value equal to half of the
peak-peak ripple in the inductor current.
Inductor Selection
The design procedure starts with calculating the boost
converter’s input inductor at nominal input voltage for
a ripple in the inductor current equal to 30% of the
maximum input current.
L IN =
VIN × D × (1 − D)
0.3 × IOUT × fSW
where D is the duty cycle calculated as:
D=
VOUT + VD − VIN
VOUT + VD − (R DS × IOUT )
VD is the voltage drop across the output diode of the
boost converter at maximum output current, and RDS is
the resistance of the MOSFET in the on state.
The current rating of the output diode should be selected
so that the power loss in the diode (given as the product of forward-voltage drop and the average diode
Peak/RMS Current Calculation
current) should be low enough to ensure that the junction
For the purposes of setting the current limit, the peak
temperature is within limits. This necessitates the diode
current in the inductor and MOSFET can be calculated
current rating to be in the order of 2 x IOUT to 3 x IOUT.
as follows:
Select fast-recovery diodes with a recovery time less than
 VOUT × D MAX × (1 − D MAX ) IOUT 
50ns or Schottky diodes with low junction capacitance.
IPK 
=
+

L INMIN × fSW
(1 − D) 

MOSFET RMS Current Calculation
The voltage stress on the MOSFET ideally equals the
sum of the output voltage and the forward drop of the
output diode. In practice, voltage overshoot and ringing
occur due to action of circuit parasitic elements during
the turn-off transition. The MOSFET voltage rating should
be selected with the necessary margin to accommodate
this extra voltage stress. A voltage rating of 1.3 x VOUT
provides the necessary design margin in most cases.
×1.2 for D MAX < 0.5
IOUT 
 0.25 × VOUT
And, IPK 
=
+

L INMIN × fSW (1 − D) 
×1.2 for D MAX ≥ 0.5
���������������������������������������������������������������� Maxim Integrated Products 23
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
DMAX, the maximum duty cycle, is obtained by substituting
the minimum input operating voltage VINMIN in the
equation above for duty cycle. LINMIN is the minimum
value of the input inductor taking into account tolerance
and saturation effects.
Output Capacitor Selection
The output capacitance can be calculated as follows:
C OUT =
I STEP × t RESPONSE
∆VOUT
t RESPONSE ≅ (
0.33
fC
+
1
fSW
RZ =
250 × VOUT 2 × C OUT × (1 − D MIN)
IOUTMIN × L IN
where DMIN is the duty cycle at the highest operating
input voltage, and IOUTMIN is the minimum load current.
CZ =
VOUT × C OUT
)
where ISTEP is the load step, tRESPONSE is the response
time of the controller, DVOUT is the allowable output
voltage deviation, and fC is the target closed-loop
crossover frequency. fC is chosen to be one-tenth of
the switching frequency fSW. For the boost converter,
the output capacitor supplies the load current when the
main switch is on; therefore, the output voltage ripple is a
function of duty cycle and load current. Use the following
equation to calculate the output capacitor ripple:
IOUT × D MAX
∆VCOUT =
C OUT × fSW
Input Capacitor Selection
The input ceramic capacitor value required can be
calculated based on the ripple allowed on the input DC
bus. The input capacitor should be sized based on the RMS
value of the AC current handled by it. The calculations are:
3.75 × IOUT


CIN = 

V
f
(1
D
)
×
×
−
MAX 
 INMIN SW
The input capacitor RMS current can be calculated as:
I CIN_RMS =
Error Amplifier Compensation Design
The loop compensation values for the error amplifier can
now be calculated as:
∆ILIN
2× 3
where:
CP =
2 × IOUT × R Z
1
π × fSW × R Z
Slope Compensation Ramp
The slope required to stabilize the converter at duty
cycles greater than 50% can be calculated as follows:
SE =
0.5 × (0.82 × VOUT − VINMIN)
L IN
where LIN is in µH.
Output Diodes Selection
The design procedure for output-diode selection is
identical to that outlined in the DCM Boost section.
MOSFET RMS Current Calculation
The voltage stress on the MOSFET ideally equals the
sum of the output voltage and the forward drop of the
output diode. In practice, voltage overshoot and ringing
occur due to action of circuit parasitic elements during
the turn-off transition. The MOSFET voltage rating should
be selected with the necessary margin to accommodate
this extra voltage stress. A voltage rating of 1.3 x VOUT
provides the necessary design margin in most cases.
The RMS current in the MOSFET is useful in estimating
the conduction loss, and is given as:
IMOSFETRMS =
 VOUT × D MAX × (1 − D MAX ) 
∆ILIN =


L INMIN × fSW


for D MAX < 0.5,
V/Fs,
IOUT × D MAX
(1 − D MAX )
where DMAX is the duty cycle at the lowest operating
input voltage, and IOUT is the maximum load current.
 0.25 × VOUT 
∆ILIN =


L INMIN × fSW 
for D MAX ≥ 0.5
���������������������������������������������������������������� Maxim Integrated Products 24
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Typical Operating Circuits
R15
402kI
VIN
R16
402kI
VOUT
D2
D6
T1
8
C9
2.2µF
50V
R14
402kI
5
VOUT
D4
C12
1µF
7
C19
OPEN
R1
0I
6
VIN
PGND
C13
22µF
1
AC1
AC2
C15
22µF
C16
22µF
1
R1
10
C1
0.1µF/
275V AC
C14
22µF
4
D1
L1
6.6mH
R8
1.5MI
C5
100µF
450V
3
R17
100kI
R18
100kI
C10
3300pF
R7
1.5MI
11
D3
2
2
GND0
12
VIN
PGND
GND0
C6
0.47µF
C7
47nF
R10
0I
DITHER/
SYNC
PGND
SLOPE
VOUT
NDRV
R9
10kI
DITHER/
SYNC
DITHER /
SYNC
VIN
R2
2.67MI
R3
2.67MI
R4
2.67MI
RT
C2
SHORT
R13
10kI
C3
SHORT
DITHER /
SYNC
FB
C11
330pF
VFB
R21
R22
0.1I
1.2kI
N.C.
2
4
R27
20kI
VDRV
PGND
C18
15000pF
C17
47pF
SGND
C8
2.2µF
EN/UVLO
R28
562kI
R25
OPEN
VDRV
VDRV
1
R20
100I
CS
C4
OPEN
5
VDRV
PGND
COMP
R26
8.06kI
6
PGND
MAX17595
R23
OPEN
SGND
N1
SGND
R12
12.1kI
VFB
R19
0I
SGND
R11
OPEN
SGND
EN /UVLO
VIN
SS
2
R24
OPEN
3
1 U3
R29
49.9kI
N.C.
OVI
SGND
R5
75kI
OVI
R6
24.9kI
SGND
SGND
SGND
Figure 9. MAX17595 Typical Application Circuit (Universal Offline Isolated Power Supply)
���������������������������������������������������������������� Maxim Integrated Products 25
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Typical Operating Circuits (continued)
VOUT
VIN
T1
VIN
C1
18V TO 36V 47µF
INPUT 50V
C2
4.7µF
50V
R1
7.5kI
VOUT
C9
22µF
16V
C4
33nF, 50V
D1
C3
0.22µF
50V
PGND
D2
C10
22µF
16V
C11
22µF
16V
5V, 1.5A
OUTPUT
GND
VIN
SS
EP
C5
47nF
NDRV
SLOPE
R2
SHORT
R8
100I
CS
R3
10kI
C6
300pF
FB
VFB
R4
15kI
R5
348kI
EN /UVLO
VCC
COMP
VDRV
RT
C7
2.2µF
16V
R16
20kI
VFB
R13
511I
R15
30.3kI
C14
33pF
U2
U3
DITHER
C13
4.7nF
R10
17.4kI
R11
OPEN
OVI
R14
1kI
C12
OPEN
EN /UVLO
R6
20kI
OVI
R12
OPEN
VDRV
SGND
VIN
VOUT
R9
0.5I
MAX17596
PGND
PGND
N1
2
3
1
R17
10kI
C8
SHORT
R7
10kI
Figure 10. MAX17596 Typical Application Circuit (Power Supply for DC-DC Applications)
���������������������������������������������������������������� Maxim Integrated Products 26
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Typical Operating Circuits (continued)
VIN
VIN
VIN
C1
47µF
10.8V TO
13.2V DC
C2
0.1µF
EP
PGND
SS
C3
47µF
VDRV
C4
2.2µF
VDRV
R1
120kI
R2
9.92kI
VIN
SLOPE
L1
220µH
MAX17597
FB
D1
R3
184kI
SS26-TP
VOUT
NDRV
R4
5kI
C5
47nF
COMP
CS
C6
120pF
VIN
C7
4.7µF/35V
VOUT
24V, 0.3A
N1
R8
100I
C8
300pF
R9
0.5I
PGND
RT
R5
481kI
R10
17.4kI
EN /UVLO
R11
OPEN
R6
25kI
DITHER
OVI
R7
49.9kI
C9
SHORT
SGND
SGND
PGND
Figure 11. MAX17597 Typical Application Circuit (Nonsynchronous Boost Converter)
���������������������������������������������������������������� Maxim Integrated Products 27
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Layout, Grounding and Bypassing
All connections carrying pulsed currents must be very
short and as wide as possible. The inductance of these
connections must be kept to an absolute minimum due to
the high di/dt of the currents in high-frequency-switching
power converters. This implies that the loop areas for
forward and return pulsed currents in various parts of the
circuit should be minimized. Additionally, small current
loop areas reduce radiated EMI. Similarly, the heatsink
of the MOSFET presents a dV/dt source; therefore,
the surface area of the MOSFET heatsink should be
minimized as much as possible.
Ground planes must be kept as intact as possible. The
ground plane for the power section of the converter
should be kept separate from the analog ground plane,
except for a connection at the least noisy section of the
power ground plane, typically the return of the input filter
capacitor. The negative terminal of the filter capacitor, the
ground return of the power switch and current sensing
resistor, must be close together. PCB layout also affects
the thermal performance of the design. A number of
thermal vias that connect to a large ground plane should
be provided under the exposed pad of the part for
efficient heat dissipation. For a sample layout that
ensures first-pass success, refer to the MAX17595 evaluation kit layout available at www.maxim-ic.com. For
universal AC input designs, follow all applicable safety
regulations. Offline power supplies can require UL, VDE,
and other similar agency approvals.
Ordering Information/Selector Guide
PART
TEMP
RANGE
PIN
PACKAGE
MAX17595ATE+
-40NC to +125NC
16 TQFN-EP*
Offline Flyback Controller
MAX17596ATE+
-40NC to +125NC
16 TQFN-EP*
Low-Voltage DC-DC Flyback Controller
Boost Controller
MAX17597ATE+ -40NC to +125NC
16 TQFN-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package.
*Exposed pad.
FUNCTIONALITY
UVLO, VIN
CLAMP
DMAX
20V, Yes
46%
4V, No
46%
4V, No
93%
Package Information
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains
to the package regardless of RoHS status.
PACKAGE TYPE
PACKAGE CODE
OUTLINE NO.
LAND PATTERN NO.
16 TQFN
T1633+4
21-0136
90-0032
���������������������������������������������������������������� Maxim Integrated Products 28
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Revision History
REVISION
NUMBER
REVISION
DATE
0
1/12
DESCRIPTION
Initial release
PAGES
CHANGED
—
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
©
2012 Maxim Integrated Products
29
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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