Renesas HD74HC564FPEL Octal d-type flip-flops (with 3-state outputs) Datasheet

HD74HC564, HD74HC574
Octal D-type Flip-Flops (with 3-state outputs)
REJ03D0630-0200
(Previous ADE-205-510)
Rev.2.00
Mar 30, 2006
Description
These devices are positive edge triggered flip-flops. The difference between HD74HC564 and HD74HC574 is only
that the former has inverting outputs and the latter has noninvertering outputs.
Data at the D inputs, meeting the set-up and hold time requirements, are transferred to the Q or Q outputs on positive
going transitions of the clock (CK) input. When a high logic level is applied to the output control (OC) input, all
outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the
storage elements.
Features
• High Speed Operation: tpd (Clock to Output) = 13 ns typ (CL = 50 pF)
• High Output Current: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74HC564P
HD74HC574P
DILP-20 pin
PRDP0020AC-B
(DP-20NEV)
P
—
HD74HC564FPEL
HD74HC574FPEL
SOP-20 pin (JEITA)
PRSP0020DD-B
(FP-20DAV)
FP
EL (2,000 pcs/reel)
PRSP0020DC-A
RP
(FP-20DBV)
Note: Please consult the sales office for the above package availability.
HD74HC564RPEL
EL (1,000 pcs/reel)
SOP-20 pin (JEDEC)
Function Table
Output Control
Inputs
Clock
L
L
L
H
Q0 :
Q0 :
L
X
Outputs
Data
HD74HC564
HD74HC574
H
L
L
H
H
L
X
X
Q0
Z
Q0
Z
level of Q before the indicated Steady-sate input conditions were established.
complement of Q0 or level of Q before the indicated Steady-state input Conditions were established.
Rev.2.00 Mar 30, 2006 page 1 of 9
HD74HC564, HD74HC574
Pin Arrangement
HD74HC564
Output
1
Control
20 VCC
OE
D Q
1D 2
2D 3
OE
D Q
18 2Q
OE
D Q
3D 4
4D 5
OE
D Q
OE
D Q
OE
D Q
15 5Q
14 6Q
OE
D Q
7D 8
8D 9
17 3Q
16 4Q
5D 6
6D 7
19 1Q
OE
D Q
13 7Q
12 8Q
11 Clock
GND 10
(Top view)
HD74HC574
Output
1
Control
20 VCC
OE
D Q
1D 2
2D 3
OE
D Q
18 2Q
OE
D Q
3D 4
4D 5
OE
D Q
OE
D Q
OE
D Q
OE
D Q
OE
D Q
13 7Q
12 8Q
11 Clock
GND 10
(Top view)
Rev.2.00 Mar 30, 2006 page 2 of 9
15 5Q
14 6Q
7D 8
8D 9
17 3Q
16 4Q
5D 6
6D 7
19 1Q
HD74HC564, HD74HC574
Logic Diagram
HD74HC564
1D
2D
3D
4D
5D
6D
7D
8D
CLK
OC
Rev.2.00 Mar 30, 2006 page 3 of 9
D
C
C
Q
1Q
D
C
C
Q
2Q
D
C
C
Q
3Q
D
C
C
Q
4Q
D
C
C
Q
5Q
D
C
C
Q
6Q
D
C
C
Q
7Q
D
C
C
Q
8Q
HD74HC564, HD74HC574
HD74HC574
1D
2D
3D
4D
5D
6D
7D
8D
CLK
OC
Rev.2.00 Mar 30, 2006 page 4 of 9
D
C
C
Q
1Q
D
C
C
Q
2Q
D
C
C
Q
3Q
D
C
C
Q
4Q
D
C
C
Q
5Q
D
C
C
Q
6Q
D
C
C
Q
7Q
D
C
C
Q
8Q
HD74HC564, HD74HC574
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage range
Input / Output voltage
VCC
VIN, VOUT
–0.5 to 7.0
–0.5 to VCC +0.5
V
V
IIK, IOK
IO
±20
±35
mA
mA
ICC or IGND
PT
±75
500
mA
mW
Input / Output diode current
Output current
VCC, GND current
Power dissipation
Storage temperature
Tstg
–65 to +150
°C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Recommended Operating Conditions
Item
Supply voltage
Symbol
VCC
Ratings
2 to 6
Unit
V
Input / Output voltage
Operating temperature
VIN, VOUT
Ta
0 to VCC
–40 to 85
V
°C
tr , tf
0 to 1000
0 to 500
ns
Input rise / fall time
Note:
*1
0 to 400
1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
Conditions
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
Electrical Characteristics
Item
Input voltage
Symbol VCC (V)
VIH
VIL
Output voltage
VOH
VOL
Min
Ta = 25°C
Typ Max
Ta = –40 to+85°C
Unit
Min
Max
2.0
4.5
1.5
3.15
—
—
—
—
1.5
3.15
—
—
6.0
2.0
4.2
—
—
—
—
0.5
4.2
—
—
0.5
4.5
6.0
—
—
—
—
1.35
1.8
—
—
1.35
1.8
2.0
4.5
1.9
4.4
2.0
4.5
—
—
1.9
4.4
—
—
6.0
4.5
5.9
4.18
6.0
—
—
—
5.9
4.13
—
—
6.0
2.0
5.68
—
—
0.0
—
0.1
5.63
—
—
0.1
4.5
6.0
—
—
0.0
0.0
0.1
0.1
—
—
0.1
0.1
4.5
6.0
—
—
—
—
0.26
0.26
—
—
0.33
0.33
Off-state output
current
Input current
IOZ
6.0
—
—
±0.5
—
±5.0
Iin
6.0
—
—
±0.1
—
±1.0
Quiescent supply
current
ICC
6.0
—
—
4.0
—
40
Rev.2.00 Mar 30, 2006 page 5 of 9
Test Conditions
V
V
V
Vin = VIH or VIL IOH = –20 µA
IOH = –6 mA
V
IOH = –7.8 mA
Vin = VIH or VIL IOL = 20 µA
IOL = 6 mA
IOL = 7.8 mA
µA Vin = VIH or VIL,
Vout = VCC or GND
µA Vin = VCC or GND
µA Vin = VCC or GND, Iout = 0 µA
HD74HC564, HD74HC574
Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25°C
Item
Symbol VCC (V)
2.0
Min
—
Typ
—
Max
6
Min
—
Max
5
4.5
6.0
—
—
—
—
30
35
—
—
24
28
2.0
4.5
—
—
—
13
155
31
—
—
195
39
6.0
2.0
—
—
—
—
26
150
—
—
33
190
4.5
6.0
—
—
13
—
30
26
—
—
38
33
tHZ
tLZ
2.0
4.5
—
—
—
15
150
30
—
—
190
38
tsu
6.0
2.0
—
—
—
—
26
100
—
—
33
125
4.5
6.0
—
—
1
—
20
17
—
—
25
21
2.0
4.5
5
5
—
0
—
—
5
5
—
—
6.0
2.0
5
80
—
—
—
—
5
100
—
—
4.5
6.0
16
14
4
—
—
—
20
17
—
—
Maximum clock
frequency
fmax
Propagation delay
time
tPLH
tPHL
Output enable
time
tZH
tZL
Output disable
time
Setup time
Ta = –40 to +85°C
Hold time
th
Pulse width
tw
Output rise/fall
time
tTLH
tTHL
2.0
4.5
—
—
—
4
60
12
—
—
75
15
Input capacitance
Cin
6.0
—
—
—
—
5
10
10
—
—
13
10
Unit
Test Conditions
MHz
ns
Clock to output
ns
ns
ns
ns
ns
ns
pF
Test Circuit
VCC
VCC
Input
Pulse Generator
Zout = 50 Ω
Input
Pulse Generator
Zout = 50 Ω
See Function Table
Output
OC
1Q to 8Q
or
1Q to 8Q
S1
OPEN
GND
CL =
50 pF
VCC
1D to 8D
Clock
Note : 1. CL includes probe and jig capacitance.
Rev.2.00 Mar 30, 2006 page 6 of 9
1 kΩ
TEST
t PLH / t PHL
S1
OPEN
t ZH/ t HZ
t ZL / t LZ
GND
VCC
HD74HC564, HD74HC574
Waveforms
• Waveform – 1
tf
tr
VCC
90 % 90 %
50 %
Input Clock
10 %
tr
0V
VCC
90 %
90 %
Input Data
50 %
10 %
tf
10 %
10 %
0V
t PHL
t PLH
Output Q
VOH
50 %
50 %
VOL
Output Q
• Waveform – 2
Input OC
tf
tr
90 %
50 %
10 %
VCC
90 %
50 %
10 %
t LZ
t ZL
0V
VOH
50 %
Waveform - A
t ZH
Waveform - B
10 %
VOL
t HZ
50 %
90 %
VOH
VOL
Notes : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns
2. Waveform - A is for an output with internal conditions such that the
output is low except when disabled by the output control.
3. Waveform - B is for an output with internal conditions such that the
output is high except when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
Rev.2.00 Mar 30, 2006 page 7 of 9
HD74HC564, HD74HC574
Package Dimensions
JEITA Package Code
P-DIP20-6.3x24.5-2.54
RENESAS Code
PRDP0020AC-B
Previous Code
DP-20NEV
MASS[Typ.]
1.26g
D
11
E
20
1
10
b3
0.89
A1
A
Z
Reference
Symbol
L
e1
D
E
A
A1
bp
b3
c
θ
e
Z
L
θ
bp
e
c
e1
( Ni/Pd/Au plating )
JEITA Package Code
P-SOP20-5.5x12.6-1.27
RENESAS Code
PRSP0020DD-B
*1
Previous Code
FP-20DAV
Min
Nom Max
7.62
24.50 25.40
6.30 7.00
5.08
0.51
0.40 0.48 0.56
1.30
0.19 0.25 0.31
0°
15°
2.29 2.54 2.79
1.27
2.54
MASS[Typ.]
0.31g
D
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
F
20
Dimension in Millimeters
11
c
HE
*2
E
bp
Index mark
Terminal cross section
( Ni/Pd/Au plating )
1
Z
10
e
*3
bp
x
Reference
Symbol
M
A
L1
A1
θ
y
L
Detail F
Rev.2.00 Mar 30, 2006 page 8 of 9
D
E
A2
A1
A
bp
b1
c
c1
θ
HE
e
x
y
Z
L
L1
Dimension in Millimeters
Min Nom Max
12.60 13.0
5.50
0.00 0.10 0.20
2.20
0.34 0.40 0.46
0.15 0.20 0.25
0°
8°
7.50 7.80 8.00
1.27
0.12
0.15
0.80
0.50 0.70 0.90
1.15
HD74HC564, HD74HC574
JEITA Package Code
P-SOP20-7.5x12.8-1.27
RENESAS Code
PRSP0020DC-A
*1
Previous Code
FP-20DBV
MASS[Typ.]
0.52g
D
F
20
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
@ DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
@ INCLUDE TRIM OFFSET.
11
HE
c
*2
E
bp
Index mark
Terminal cross section
( Ni/Pd/Au plating )
1
e
*3
bp
x
M
L1
A
Z
Reference
Symbol
10
A1
θ
L
y
Detail F
Rev.2.00 Mar 30, 2006 page 9 of 9
D
E
A2
A1
A
bp
b1
c
c1
θ
HE
e
x
y
Z
L
L1
Dimension in Millimeters
Min Nom Max
12.80 13.2
7.50
0.10 0.20 0.30
2.65
0.34 0.40 0.46
0.20 0.25 0.30
0°
8°
10.00 10.40 10.65
1.27
0.12
0.15
0.935
0.40 0.70 1.27
1.45
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