Infineon IPG20N06S3L-35 Optimos-t power-transistor Datasheet

IPG20N06S3L-35
OptiMOS®-T Power-Transistor
Product Summary
V DS
55
V
R DS(on),max5)
35
mΩ
ID
20
A
Features
• Dual N-channel Logic Level - Enhancement mode
PG-TDSON-8-4
• AEC Q101 qualified
• MSL1 up to 260°C peak reflow
• 175°C operating temperature
• Green Product (RoHS compliant)
• 100% Avalanche tested
Type
Package
Marking
IPG20N06S3L-35
PG-TDSON-8-4
3N06L35
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol
Continuous drain current
one channel active
ID
Conditions
Value
T C=25 °C, V GS=10 V1)
20
T C=100 °C,
V GS=10 V2)
Unit
A
15.5
Pulsed drain current2)
one channel active
I D,pulse
-
80
Avalanche energy, single pulse2, 5)
E AS
I D=10A
55
mJ
Avalanche current, single pulse5)
I AS
-
20
A
Gate source voltage4)
V GS
-
±16
V
Power dissipation
one channel active
P tot
T C=25 °C
30
W
Operating and storage temperature
T j, T stg
-
-55 ... +175
°C
IEC climatic category; DIN IEC 68-1
-
-
55/175/56
Rev. 1.0
page 1
2008-09-23
IPG20N06S3L-35
Parameter
Symbol
Values
Conditions
Unit
min.
typ.
max.
Thermal characteristics2)
Thermal resistance, junction - case
R thJC
-
-
-
5
SMD version, device on PCB
R thJA
minimal footprint
-
100
-
6 cm2 cooling area3)
-
60
-
K/W
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0 V, I D= 1 mA
55
-
-
Gate threshold voltage
V GS(th)
V DS=V GS, I D=15 µA
1.2
1.7
2.2
Zero gate voltage drain current5)
I DSS
V DS=55 V, V GS=0 V,
T j=25 °C
-
0.01
1
-
1
100
V DS=55 V, V GS=0 V,
T j=125 °C2)
V
µA
Gate-source leakage current5)
I GSS
V GS=16 V, V DS=0 V
-
1
100
nA
Drain-source on-state resistance5)
R DS(on)
V GS=5 V, I D=7A
-
53
62
mΩ
V GS=10 V, I D=11A
-
30
35
Rev. 1.0
page 2
2008-09-23
IPG20N06S3L-35
Parameter
Symbol
Values
Conditions
Unit
min.
typ.
max.
-
1330
1730
-
170
220
Dynamic characteristics2)
Input capacitance5)
C iss
Output capacitance5)
C oss
Reverse transfer capacitance5)
Crss
-
160
240
Turn-on delay time
t d(on)
-
3
-
Rise time
tr
-
5
-
Turn-off delay time
t d(off)
-
8
-
Fall time
tf
-
9
-
Gate to source charge
Q gs
-
7
9
Gate to drain charge
Q gd
-
3
4.5
Gate charge total
Qg
-
18
23
Gate plateau voltage
V plateau
-
5.1
-
V
IS
-
-
20
A
-
-
80
V GS=0 V, V DS=25 V,
f =1 MHz
V DD=27.5 V,
V GS=10 V, I D=20 A,
R G=25 Ω
pF
ns
Gate Charge Characteristics2, 5)
V DD=11 V, I D=20 A,
V GS=0 to 10 V
nC
Reverse Diode
Diode continous forward current2)
one channel active
T C=25 °C
2)
Diode pulse current
one channel active
I S,pulse
Diode forward voltage
V SD
V GS=0 V, I F=20 A,
T j=25 °C
-
1.0
1.3
V
Reverse recovery time2)
t rr
V R=27.5 V, I F=I S,
di F/dt =100 A/µs
-
10
-
ns
Reverse recovery charge2, 5)
Q rr
-
10
-
nC
1)
Current is limited by bondwire; with an R thJC =5 K/W the chip is able to carry 22A at 25°C.
2)
Specified by design. Not subject to production test.
3)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
4)
Qualified at -5V and +16V.
5)
Per channel
Rev. 1.0
page 3
2008-09-23
IPG20N06S3L-35
1 Power dissipation
2 Drain current
P tot = f(T C); V GS ≥ 6 V; one channel active
I D = f(T C); V GS ≥ 6 V; one channel active
35
25
30
20
25
15
I D [A]
P tot [W]
20
15
10
10
5
5
0
0
0
50
100
150
200
0
50
100
T C [°C]
150
200
T C [°C]
3 Safe operating area
4 Max. transient thermal impedance
I D=f(V DS); T C=25°C; D =0; one channel active
Z thJC = f(t p)
parameter: t p
parameter: D =t p/T
100
101
1 µs
10 µs
0.5
100 µs
100
Z thJC [K/W]
I D [A]
1 ms
10
0.1
0.05
10-1
0.01
single pulse
10-2
1
0.1
1
10
100
10-5
10-4
10-3
10-2
10-1
100
t p [s]
V DS [V]
Rev. 1.0
10-6
page 4
2008-09-23
IPG20N06S3L-35
5 Typ. output characteristics5)
6 Typ. drain-source on-state resistance5)
I D = f(V DS); T j = 25 °C
R DS(on) = f(I D); T j = 25 °C
parameter: V GS
parameter: V GS
80
100
5V
3.5 V
10 V
4.5 V
80
R DS(on) [mΩ]
I D [A]
60
6V
40
6V
60
5.5 V
20
40
5V
4.5 V
10 V
4V
3.5 V
0
20
0
2
4
6
8
0
20
40
V DS [V]
60
80
I D [A]
7 Typ. transfer characteristics5)
8 Typ. drain-source on-state resistance5)
I D = f(V GS); V DS = 6V
R DS(on) = f(T j); I D = 11 A; V GS = 10 V
parameter: T j
80
60
-55 °C
50
R DS(on) [mΩ]
I D [A]
60
25 °C
40
40
175 °C
20
30
0
1
2
3
4
5
6
7
V GS [V]
Rev. 1.0
20
-60
-20
20
60
100
140
180
T j [°C]
page 5
2008-09-23
IPG20N06S3L-35
9 Typ. gate threshold voltage
10 Typ. Capacitances5)
V GS(th) = f(T j); V GS = V DS
C = f(V DS); V GS = 0 V; f = 1 MHz
parameter: I D
104
2.5
C [pF]
2
V GS(th) [V]
150µA
1.5
15µA
Ciss
3
10
1
Coss
Crss
0.5
102
0
-60
-20
20
60
100
140
0
180
5
10
15
20
25
30
V DS [V]
T j [°C]
11 Typical forward diode characteristicis5)
12 Avalanche characteristics5)
IF = f(VSD)
I A S= f(t AV)
parameter: T j
parameter: T j(start)
100
102
10
25 °C
101
175 °C
1
25 °C
100
0.1
0
0.2
0.4
0.6
0.8
1
1.2
1.4
V SD [V]
Rev. 1.0
150 °C
I AV [A]
I F [A]
100 °C
1
10
100
1000
t AV [µs]
page 6
2008-09-23
IPG20N06S3L-35
13 Avalanche energy5)
14 Drain-source breakdown voltage
E AS = f(T j)
V BR(DSS) = f(T j); I D = 1 mA
parameter: I D
65
125
5A
100
60
50
10A
25
20A
V BR(DSS) [V]
E AS [mJ]
75
55
50
45
0
25
50
75
100
125
150
-60
175
-20
T j [°C]
20
60
100
140
180
T j [°C]
15 Typ. gate charge5)
16 Gate charge waveforms
V GS = f(Q gate); I D = 20 A pulsed
parameter: V DD
12
V GS
11 V
Qg
44 V
10
V GS [V]
8
6
V g s(th)
4
2
Q g (th)
Q sw
Q gs
0
0
5
10
15
20
Q gate
Q gd
25
Q gate [nC]
Rev. 1.0
page 7
2008-09-23
IPG20N06S3L-35
Published by
Infineon Technologies AG
81726 Munich, Germany
© Infineon Technologies AG 2008
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions
or characteristics. With respect to any examples or hints given herein, any typical values stated
herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties
of non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact
the nearest Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the
express written approval of Infineon Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system or to affect the safety or
effectiveness of that device or system. Life support devices or systems are intended to be implanted
in the human body or to support and/or maintain and sustain and/or protect human life.
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.0
page 8
2008-09-23
IPG20N06S3L-35
Revision History
Version
Date
Changes
Revision 1.0
Rev. 1.0
22.09.2008 Initial Final Data Sheet
page 9
2008-09-23
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