Intersil HFA3667IA96 Cdma/amps, upconverter with gain control Datasheet

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1-88
PRELIMINARY
September 1998
CDMA/AMPS, UpConverter
with Gain Control
Features
Description
• RF Frequency Range . . . . . . . . . . . . 825MHz to 850MHz
Applications
The HFA3667 UpConverter is a
monolithic bipolar upconverter
with gain control for CDMA/AMPS
cellular applications. Manufactured in the Intersil UHF1X process, the device consists of
a double balanced mixer followed by a variable gain power
preamplifier. The device is designed for high output
compression of +13dBm and requires low drive levels from
the local oscillator. The HFA3667 is one of the four chips in
the PRISM™ chip set and is housed in a small outline
28 lead SSOP package ideally suited for cellular handset
applications.
• IS95A CDMA/AMPS Dual Mode Handsets
Ordering Information
• IF Operation . . . . . . . . . . . . . . . . . . . . 10MHz to 210MHz
• Gain Control Range . . . . . . . . . . . . . . . . . . . . . . . .>40dB
• Single Supply Battery Operation . . . . . . . . 2.7V to 3.3V
• High Output 1dB Compression . . . . . . . . . . . . +13dBm
• High Power Gain . . . . . . . . . . . . . . . . . . . . . . . . . . .30dB
• Power Enable/Disable Control
• Cellular Data
• CDMA/TDMA Packet Protocol Radios
PART NUMBER
TEMP.
RANGE (oC)
• Full Duplex Transceivers
HFA3667IA
-40 to 85
28 Ld SSOP
• Portable Battery Powered Equipment
HFA3667IA96
-40 to 85
Tape and Reel
Pinout
PKG.
NO.
PACKAGE
M28.15
Block Diagram
HFA3667
(SSOP)
TOP VIEW
TXM_RF
STG1_OUT
STG2_IN
PRE_IN
PRE_OUT
IF_IN+ 1
TXM_VCC1 2
GND 3
LO_IN 4
LO_BY 5
GND 6
28 IF_IN27 TXM_VCC2
26 GND
BIAS
NETWORK
23 TXM_VCC3
22 GND
21 GND
GND 9
20 PRE_IN
LO
TX_PE
19 GND
PRE_VCC2 11
18 STG1_OUT
STG2_IN 12
17 PRE_VCC1
AGC_CTRL 14
AGC_CTRL
24 GND
GND 8
GND 13
AGC
25 TXM_RF
TX_PE 7
PRE_OUT 10
IF INPUT
16 GND
15 PRE_VCC3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
1
PRISM™ and the PRISM™ logo are trademarks of Intersil Corporation
File Number
4299.4
HFA3667
Pin Descriptions
PIN NUMBER
NAME
DESCRIPTION
1
IF_IN+
2
TXM_V CC1
4
LO_IN
Local Oscillator Input. Requires DC blocking capacitor.
5
LO_BY
Local Oscillator Input Bypass. Requires high quality decoupling to ground.
3, 6, 8, 9, 13, 16, 19,
21, 22, 24, 26
GND
7
TX_PE
10
PRE_OUT
Second Stage Preamplifier Output. Requires DC blocking capacitor.
11
PRE_V CC2
Second Stage Preamplifier Power Supply Pin. Use high quality decoupling capacitors.
12
STG2_IN
14
AGC_CTRL
Preamplifiers Gain control DC Voltage input.
15
PRE_V CC3
Preamplifiers Bias Power Supply Pin. Use high quality decoupling capacitors.
17
PRE_V CC1
First Stage Preamplifier Power Supply Pin. Use high quality decoupling capacitors.
18
STG1_OUT
First Stage Preamplifier Output. Requires DC blocking capacitor.
20
PRE_IN
23
TXM_V CC2
25
TXM_RF
27
TXM_V CC3
28
IF_IN-
Transmit Mixer Positive IF Input. Requires DC blocking capacitor.
Mixer Power Supply Pin.
Internal Circuits Ground Returns.
Power Enable Control Input. HIGH for normal operation. LOW for power down.
Second Stage Preamplifier Input. Requires DC blocking capacitor.
First Stage Preamplifier Input. Requires DC blocking capacitor.
Transmit Mixer Bias Power Supply Pin. Use high quality decoupling capacitors.
Transmit Mixer RF Output. Requires DC blocking capacitor.
Transmit Mixer Output Buffer Power Supply Pin. Use high quality decoupling capacitors.
Transmit Mixer Negative IF Input. Requires DC blocking capacitor.
2
HFA3667
Absolute Maximum Ratings
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 3.6V
Voltage on Any Other Pin . . . . . . . . . . . . . . . . . . . -0.3 to VCC +0.3V
Thermal Resistance (Typical, Note 1)
θJA ( oC/W)
SSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
88
Maximum Junction Temperature (Plastic Package) . . . . . . . . . 150oC
Maximum Temperature Range . . . . . . . . . . . . . . -40oC ≤ TA ≤ 85oC
Maximum Storage Temperature Range . . . . . ..-65oC ≤ TA ≤ 150oC
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . 300oC
(Lead Tips Only)
Operating Conditions
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . .2.7V to 3.3V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
VCC = 2.7V, LO_IN = -3dBm, AGC_CTRL = 0.7VDC (Max Gain), TXM_IF = -30dBm
PARAMETER
TEST CONDITION
(NOTE 2)
TEST
LEVEL
TEMP
(oC)
MIN
TYP
MAX
UNITS
OVERALL CASCADED PERFORMANCE: LO_IN = -3dBm at 980MHz, TXM_IF = Differential -30dBm, at 130MHz, Interstage Filter
Insertion Loss of -3.7dB with an LO rejection of 35dB. Refer to applications diagram
Power Gain 250Ω In, 50Ω Out
Voltage Gain 250Ω In, 50Ω oUt
SSB NF
Refer to applications diagram and single to differential input network.
(0dB Attenuation)
AGC_CTRL = 0.7V
P1dBO
SSB NF
P1dBO
SSB NF
P1dBO
SSB NF
P1dBO
SSB NF
P1dBO
AGC_CTRL set for
10dB attenuation
AGC_CTRL set for
20dB attenuation
AGC_CTRL set for
30dB attenuation
AGC_CTRL set for
40dB attenuation
A
25
25
31.9
35
dB
B
25
18
23
28
dB
B
25
-
15
-
dB
A
25
11.4
13.8
-
dBm
B
25
-
15
-
dB
A
25
-
7.2
-
dBm
B
25
-
15.5
-
dB
A
25
-
-7.4
-
dBm
B
25
-
17.8
-
dB
A
25
-
-22
-
dBm
B
25
-
24
-
dB
A
25
-
-35.9
-
dBm
Gain Flatness Across 825 to 850MHz
(0dB Attenuation)
B
25
-1.7
-
+1.7
dB
LO Leakage
(0dB attenuation)
A
25
-
-43
-30
dB
B
25
825
-
850
MHz
B
25
-
22
-
dB
B
25
-
7.4
-
dB
B
25
-
14.5
-
dBm
B
25
-
8.2
-
dB
B
25
-
9.5
-
dBm
B
25
-
11.8
-
dB
B
25
-
-8.2
-
dBm
B
25
-
17.9
-
dB
B
25
-
-22
-
dBm
CASCADED AMPLIFIERS SPECIFICATIONS AT 850MHz
RF Frequency Range (typical)
Power/Voltage Gain
SSB NF
(0dB Attenuation)
AGC_CTRL = 0.7V
P1dBO
SSB NF
P1dBO
SSB NF
P1dBO
AGC_CTRL set for
10dB attenuation
AGC_CTRL set for
20dB attenuation
CASCADED AMPLIFIERS SPECIFICATIONS AT 850MHz
SSB NF
P1dBO
AGC_CTRL set for
30dB attenuation
3
HFA3667
Electrical Specifications
VCC = 2.7V, LO_IN = -3dBm, AGC_CTRL = 0.7VDC (Max Gain), TXM_IF = -30dBm (Continued)
(NOTE 2)
TEST
LEVEL
TEMP
(oC)
MIN
TYP
MAX
UNITS
B
25
-
27
-
dB
B
25
-
-36
-
dBm
A
25
-
-14
-7.4
dB
Input Return Loss
B
25
-
-14
-7.4
dB
Insertion Phase vs AGC
B
25
-
2
-
Deg/dB
Reverse Isolation
B
25
-
-50
-
dB
Gain Control Voltage
A
25
0.5
-
2.0
V
Gain Control Sensitivity
A
25
-
76
-
dB/V
Gain Control Slope Change
B
25
-
-
3:1
-
Gain Control Input Impedance
C
25
-
1
-
MΩ
B
25
-
0.5
10
µs
PARAMETER
SSB NF
P1dBO
Output Return Loss
Gain Switching Speed, Full Scale
TEST CONDITION
AGC_CTRL set for
40dB attenuation
Over AGC Range
To ±1dB Settling
MIXER SPECIFICATIONS AT TXM_IF = Differential -30dBm at 130MHz, LO_IN = -3dBm at 980MHz
RF Output Frequency Range (Typical)
B
25
825
-
850
MHz
IF Input Frequency Range (Typical)
B
25
10
130
200
MHz
LO Frequency Range
B
25
955
-
980
MHz
LO Input Drive Level
B
25
-10
-3
0
Power Gain 250Ω In 50Ω Out
B
25
-
11
-
dB
Voltage Gain 250Ω In 50Ω Out
B
25
-
4
-
dB
SSB NF
B
25
-
15.0
17
dB
P1dBO
B
25
-
-1
-
dBm
LO to RF Leakage
B
25
-
-26
-20
dBm
RF Input Return Loss
B
25
-
-9
-
dB
LO Input Return Loss
A
25
-
-14
-
dB
IF Differential Input Resistance
C
25
-
700
-
Ω
IF Differential Input Capacitance
C
25
-
1.8
-
pF
Total Supply Current at GMAX
A
25
-
85
-
mA
Total Supply Current at GMIN
A
25
-
35
-
mA
PE Logic Input Low Level
A
25
-0.2
-
0.8
V
PE Logic Input High Level
A
25
2.0
-
VCC
V
POWER SUPPLY AND LOGIC SPECIFICATIONS
POWER SUPPLY AND LOGIC SPECIFICATIONS
PE Logic High Input Bias Current
VPE = 3.0V
A
25
-200
-
200
µA
PE Logic Low Input Bias Current
VPE = 0.0V
A
25
-200
-
200
µA
Power Enable Time
50%(VPE) to 90%(Icc)
B
25
-
2.0
-
µS
Power Disable Time
50%(VPE) to 10%(Icc)
B
25
-
0.5
-
µS
NOTE:
2. A = Production Tested, B = Based on Characterization, C = By Design
4
HFA3667
Typical Application Circuit
MURATA
LFSH33
270
1
IF_IN-
IF_IN+
1000p
TXM_VCC1
TXM_VCC2
GND
GND
100p
1.8p
LO_BY
100p
TX_PE
TXM_VCC3
HFA3667
GND
TO POWER AMPLIFIER
INPUT FILTER
GND
GND
18n
GND
STG1_OUT
PRE_VCC2
17.4
PRE_VCC1
GND
GND
100p
17.4
3.0p
6.8n
STG2_IN
8.2p
AGC DC
294
PRE_IN
PRE_OUT
1000p
FUJITSU
F5CH-881M50-L2AM
1000p
GND
3.0p
100p
1.8p
GND
100p
GND
PE
12n
1000p
0.1
NOTE 4
TXM_RF
LO_IN
LO IN
1000p
PRE_VCC3
AGC_CTRL
1000p
BEAD
47p
0.1
VCC
TEST INPUT NETWORK
SINGLE TO DIFFERENTIAL CONVERTER
(0.9dB TRANSFORMER INSERTION LOSS + 0.97dB,
200Ω TO 250Ω POWER CONVERSION FACTOR)
IF INPUT, 50Ω
MINI CIRCUITS
TC 4-1W
270
IF_IN+
IF_IN-
NOTES:
3. Suggested filters have no DC coupling paths. DC blocking capacitors are not required at the respective ports.
4. Pi network for gain flatness across the band.
5
HFA3667
Shrink Small Outline Plastic Packages (SSOP)
M28.15
N
INDEX
AREA
H
0.25(0.010) M
28 LEAD SHRINK NARROW BODY SMALL OUTLINE
PLASTIC PACKAGE
B M
E
1
2
INCHES
GAUGE
PLANE
-B3
0.25
0.010
SEATING PLANE
-A-
h x 45o
A
D
L
-C-
α
e
B
0.17(0.007) M C A M
A2
A1
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.053
0.069
1.35
1.75
-
A1
0.004
0.010
0.10
0.25
-
A2
-
0.061
-
1.54
-
B
0.008
0.012
0.20
0.30
9
C
0.007
0.010
0.18
0.25
-
D
0.386
0.394
9.81
10.00
3
E
0.150
0.157
3.81
3.98
4
e
C
0.10(0.004)
B S
NOTES:
0.025 BSC
0.635 BSC
-
H
0.228
0.244
5.80
6.19
-
h
0.0099
0.0196
0.26
0.49
5
L
0.016
0.050
0.41
1.27
6
8o
0o
N
α
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
MILLIMETERS
28
0o
28
7
8o
Rev. 0 2/95
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.10mm (0.004 inch) total in excess
of “B” dimension at maximum material condition.
10. Controlling dimension: INCHES. Converted millimeter dimensions are not necessarily exact.
6
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