MOTOROLA MC74HC125A Quad 3-state noninverting buffer Datasheet

SEMICONDUCTOR TECHNICAL DATA
! " !
High–Performance Silicon–Gate CMOS
The MC74HC125A and MC74HC126A are identical in pinout to the LS125
and LS126. The device inputs are compatible with standard CMOS outputs;
with pullup resistors, they are compatible with LSTTL outputs.
The HC125A and HC126A noninverting buffers are designed to be used
with 3–state memory address drivers, clock drivers, and other bus–oriented
systems. The devices have four separate output enables that are active–low
(HC125A) or active–high (HC126A).
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 72 FETs or 18 Equivalent Gates
N SUFFIX
14–LEAD PLASTIC DIP PACKAGE
CASE 646–06
D SUFFIX
14–LEAD PLASTIC SOIC PACKAGE
CASE 751A–03
LOGIC DIAGRAM
HC125A
Active–Low Output Enables
A1
OE1
A2
OE2
A3
OE3
A4
OE4
2
3
HC126A
Active–High Output Enables
1
2
A1
Y1
6
4
8
Y3
10
A3
11
13
Y2
8
Y3
10
11
12
A4
Y4
Y4
13
OE4
PIN 14 = VCC
PIN 7 = GND
FUNCTION TABLE
HC125A
Inputs
Output
HC126A
Inputs
Output
A
OE
Y
A
OE
Y
H
L
X
L
L
H
H
L
Z
H
L
X
H
H
L
H
L
Z
4/97
 Motorola, Inc. 1997
1
Plastic
SOIC
TSSOP
PIN ASSIGNMENT
9
OE3
12
6
4
OE2
9
MC74HCXXXAN
MC74HCXXXAD
MC74HCXXXADT
5
A2
Y2
ORDERING INFORMATION
Y1
1
OE1
5
3
DT SUFFIX
14–LEAD PLASTIC TSSOP PACKAGE
CASE 948G–01
REV 8
OE1
1
14
VCC
A1
2
13
OE4
Y1
3
12
A4
OE2
4
11
Y4
A2
5
10
OE3
Y2
6
9
A3
GND
7
8
Y3
MC74HC125A MC74HC126A
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MAXIMUM RATINGS*
Symbol
VCC
Parameter
DC Supply Voltage (Referenced to GND)
Value
Unit
– 0.5 to + 7.0
V
Vin
DC Input Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
Vout
DC Output Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
DC Input Current, per Pin
± 20
mA
Iin
Iout
DC Output Current, per Pin
± 35
mA
ICC
DC Supply Current, VCC and GND Pins
± 75
mA
PD
Power Dissipation in Still Air
750
500
450
mW
Tstg
Storage Temperature
– 65 to + 150
_C
TL
Plastic DIP†
SOIC Package†
TSSOP Package†
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance circuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout) VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
v
v
_C
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP, SOIC or TSSOP Package)
260
* Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: – 6.1 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
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RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Vin, Vout
TA
tr, tf
Parameter
DC Supply Voltage (Referenced to GND)
Min
Max
Unit
2.0
6.0
V
0
VCC
V
– 55
+ 125
_C
0
0
0
1000
500
400
ns
DC Input Voltage, Output Voltage
(Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time
(Figure 1)
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol
Parameter
Test Conditions
VCC
V
– 55 to
25_C
85_C
125_C
Unit
VIH
Minimum High–Level Input
Voltage
Vout = VCC – 0.1 V
|Iout|
20 µA
2.0
3.0
4.5
6.0
1.5
2.1
3.15
4.2
1.5
2.1
3.15
4.2
1.5
2.1
3.15
4.2
V
VIL
Maximum Low–Level Input
Voltage
Vout = 0.1 V
|Iout|
20 µA
2.0
3.0
4.5
6.0
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
V
Minimum High–Level Output
Voltage
Vin = VIH
|Iout|
20 µA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.2
3.7
5.2
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
3.0
4.5
6.0
0.26
0.26
0.26
0.33
0.33
0.33
0.4
0.4
0.4
VOH
Vin = VIH
VOL
Maximum Low–Level Output
Voltage
3.6 mA
6.0 mA
7.8 mA
Vin = VIL
|Iout|
20 µA
Vin = VIL
MOTOROLA
|Iout|
|Iout|
|Iout|
|Iout|
|Iout|
|Iout|
2
3.6 mA
6.0 mA
7.8 mA
V
High–Speed CMOS Logic Data
DL129 — Rev 6
MC74HC125A MC74HC126A
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DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol
Parameter
Test Conditions
Iin
Maximum Input Leakage Current
IOZ
Maximum Three–State Leakage
Current
ICC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
Output in High–Impedance State
Vin = VIL or VIH
Vout = VCC or GND
Vin = VCC or GND
Iout = 0 µA
VCC
V
– 55 to
25_C
6.0
± 0.1
± 1.0
± 1.0
µA
6.0
± 0.5
± 5.0
± 10
µA
6.0
4.0
40
160
µA
85_C
125_C
Unit
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns)
Guaranteed Limit
S b l
Symbol
P
Parameter
VCC
V
– 55 to
25_C
85_C
125_C
U i
Unit
tPLH,
tPHL
Maximum Propagation Delay, Input A to Output Y
(Figures 1 and 3)
2.0
3.0
4.5
6.0
90
36
18
15
115
45
23
20
135
60
27
23
ns
tPLZ,
tPHZ
Maximum Propagation Delay, Output Enable to Y
(Figures 2 and 4)
2.0
3.0
4.5
6.0
120
45
24
20
150
60
30
26
180
80
36
31
ns
tPZL,
tPZH
Maximum Propagation Delay, Output Enable to Y
(Figures 2 and 4)
2.0
3.0
4.5
6.0
90
36
18
15
115
45
23
20
135
60
27
23
ns
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 3)
2.0
3.0
4.5
6.0
60
22
12
10
75
28
15
13
90
34
18
15
ns
Maximum Input Capacitance
—
10
10
10
pF
Maximum Three–State Output Capacitance
(Output in High–Impedance State)
—
15
15
15
pF
Cin
Cout
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–
Speed CMOS Data Book (DL129/D).
Typical @ 25°C, VCC = 5.0 V
CPD
P
Power
Di
Dissipation
i i C
Capacitance
i
(P
(Per B
Buffer)*
ff )*
30
pF
F
* Used to determine the no–load dynamic power consumption: P D = C PD V CC 2 f + I CC V CC . For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
MC74HC125A MC74HC126A
SWITCHING WAVEFORMS
OE (HC125A)
tr
tf
OUTPUT Y
GND
VCC
90%
50%
10%
INPUT A
OE (HC126A)
GND
VCC
50%
GND
tPHL
tPLH
VCC
50%
tPZL tPLZ
90%
50%
10%
50%
OUTPUT Y
tTHL
tTLH
HIGH
IMPEDANCE
10%
VOL
90%
VOH
HIGH
IMPEDANCE
tPZH tPHZ
50%
OUTPUT Y
Figure 1.
Figure 2.
TEST POINT
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
DEVICE
UNDER
TEST
CL*
* Includes all probe and jig capacitance
OUTPUT
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ and tPZH.
1 kΩ
CL *
* Includes all probe and jig capacitance
Figure 3. Test Circuit
Figure 4. Test Circuit
VCC
OE
A
Y
HC125A
(1/4 OF THE DEVICE)
VCC
OE
A
Y
HC126A
(1/4 OF THE DEVICE)
MOTOROLA
4
High–Speed CMOS Logic Data
DL129 — Rev 6
MC74HC125A MC74HC126A
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A–03
ISSUE F
–A–
14
8
P 7 PL
–B–
1
0.25 (0.010)
7
G
SEATING
PLANE
D
0.25 (0.010)
M
T
M
F
B
S
A
S
N SUFFIX
PLASTIC DIP PACKAGE
CASE 646–06
ISSUE L
14
8
B
1
7
A
F
C
J
G
High–Speed CMOS Logic Data
DL129 — Rev 6
D
SEATING
PLANE
K
M
5
MILLIMETERS
MIN
MAX
8.75
8.55
4.00
3.80
1.75
1.35
0.49
0.35
1.25
0.40
1.27 BSC
0.25
0.19
0.25
0.10
7°
0°
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337 0.344
0.150 0.157
0.054 0.068
0.014 0.019
0.016 0.049
0.050 BSC
0.008 0.009
0.004 0.009
7°
0°
0.228 0.244
0.010 0.019
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
4. ROUNDED CORNERS OPTIONAL.
DIM
A
B
C
D
F
G
H
J
K
L
M
N
L
N
DIM
A
B
C
D
F
G
J
K
M
P
R
J
M
K
14 PL
B
M
R X 45°
C
H
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
INCHES
MIN
MAX
0.715
0.770
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.052
0.095
0.008
0.015
0.115
0.135
0.300 BSC
0_
10_
0.015
0.039
MILLIMETERS
MIN
MAX
18.16
19.56
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
1.32
2.41
0.20
0.38
2.92
3.43
7.62 BSC
0_
10_
0.39
1.01
MOTOROLA
MC74HC125A MC74HC126A
OUTLINE DIMENSIONS
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948G–01
ISSUE O
14X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
S
S
N
2X
14
L/2
0.25 (0.010)
8
M
B
–U–
L
PIN 1
IDENT.
F
7
1
0.15 (0.006) T U
N
S
DETAIL E
K
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
ÇÇÇ
A
–V–
K1
J J1
SECTION N–N
–W–
C
0.10 (0.004)
–T– SEATING
PLANE
D
H
G
DETAIL E
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
–––
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.50
0.60
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN
MAX
0.193
0.200
0.169
0.177
–––
0.047
0.002
0.006
0.020
0.030
0.026 BSC
0.020
0.024
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0_
8_
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
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arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
Mfax is a trademark of Motorola, Inc.
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INTERNET: http://www.mot.com/SPS/
MOTOROLA
◊
6
MC74HC125A/D
High–Speed CMOS Logic Data
DL129 — Rev 6
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