Intersil ISL9211AIRU68XZ-T Charging system safety circuit Datasheet

ISL9211A
Features
The ISL9211A is an integrated circuit (IC) optimized to
provide a redundant safety protection to a Li-ion battery
charging system. The IC monitors the input voltage, the
battery voltage, and the charge current. When any of the
three parameters exceeds its limit, the IC turns off an
internal N-channel MOSFET to remove the power from
the charging system to the battery. In addition to the
above protected parameters, the IC also monitors its
own internal temperature and turns off the N-channel
MOSFET when the temperature exceeds +150°C.
Together with the battery charger IC and the protection
module in a battery pack, the charging system using the
ISL9211A has triple-level protection and is two-fault
tolerant.
• 24V Max Input Voltage
• Supports Up To 2.0A Input Current
• Fully Integrated Protection Circuit for Three
Protected Variables
• High Accuracy Protection Thresholds
• User Programmable Overcurrent Protection
Threshold
• Responds To Input Overvoltage in Less Than 1µs
• High Immunity of False Triggering Under Transients
• Fault Indication for Various Fault Occurrence
• Easy to Use
• Pb-Free (RoHS Compliant)
The IC is designed to turn on the internal NFET slowly to
avoid inrush current at power up but will turn off the
NFET quickly when the input is overvoltage in order to
remove the power before any damage occurs. The
ISL9211A has a logic flag output to indicate a fault
condition. The enable input allows the system to cut off
the input power if needed.
Applications*(see page 11)
• Cell Phones
• Digital Still Cameras
• PDAs and Smart Phones
• Portable Instruments
• Desktop Chargers
Related Literature*(see page 11)
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Technical Brief TB379 “Thermal Characterization of
Packaged Semiconductor Devices”
• Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for QFN Packages”
Typical Application Circuit
INPUT
VIN
OUT
C1
C2
ISL9211A
ILIM
RVB
VB
EN
RILIM
August 25, 2010
FN6702.1
1
ISL6292
BATTERY
CHARGER
DISA
ENA
GND
FAULT
BATT
PACK
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2009, 2010. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL9211A
Charging System Safety Circuit
ISL9211A
Block Diagram
IN PU T
OUT
V IN
ISL6292
BATTERY
CHARGER
Q1
Q2
POR
P R E -R E G
REF
R1
FET
D R IV ER
CP1
R2
Q3
R ILIM
CP2
CP3
Q4
FA U LT
2
EA
0 .8 V
LO G IC
1 .2 V
R4
GND
ILIM
VB
R VB
R3
EN
FN6702.1
August 25, 2010
ISL9211A
Pin Configuration
ISL9211A
(8 LD µTDFN)
TOP VIEW
VIN 1
8 OUT
GND 2
NC 3
7 ILIM
PAD
6 VB
5 EN
FAULT 4
Pin Descriptions
SYMBOL
PIN NUMBER
DESCRIPTION
VIN
1
The input power source. The VIN can withstand 24V input.
GND
2
System ground reference.
NC
3
No connection and must be left floating.
FAULT
4
FAULT is an open-drain logic output that turns LOW when any protection event occurs.
EN
5
IC enable pin. Pull this pin to LO to enable the device and pull it to HI to disable.
VB
6
Battery voltage monitoring input. This pin is connected to the battery pack positive terminal via an
isolation resistor.
ILIM
7
Overcurrent protection threshold setting pin. Connect a resistor between this pin and GND to set the
OCP threshold.
OUT
8
Output pin.
-
PD
Exposed pad. Connect to system ground
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP RANGE
(°C)
PACKAGE
Tape and Reel
(Pb-free)
PKG.
DWG. #
ISL9211AIRU48XZ-T
4XE
-40 to +85
8 Ld µTDFN
L8.2x2B
ISL9211AIRU58XZ-T
5XX
-40 to +85
8 Ld µTDFN
L8.2x2B
ISL9211AIRU68XZ-T
6XX
-40 to +85
8 Ld µTDFN
L8.2x2B
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach
materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL9211A. For more information on MSL please
see techbrief TB363.
3
FN6702.1
August 25, 2010
ISL9211A
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . -0.3V to 26V
Output and VB Pin (OUT, VB) (Note 4) . . . . . . . . -0.3V to 8V
Other Pins (ILIM, FAULT, EN) . . . . . . . . . . . . . -0.3V to 5.5V
ESD Rating
Human Body Model (Tested per JESD22-A114F) . . . . . 3kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . 200V
Latch Up (Tested per JESD78B; Class II, Level A). . . . 100mA
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
8 Ld 2x2 µTDFN (Notes 5, 6) . . . . .
98
37
Maximum Junction Temperature (Plastic Package) . . +150°C
Maximum Storage Temperature Range . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . -40°C to +85°C
Supply Voltage, VIN . . . . . . . . . . . . . . . . . . . . 4.3V to 24V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
4. The maximum voltage rating for the VB pin under continuous operating conditions is 5.5V. All other pins are allowed to operate
continuously at the absolute maximum ratings.
5. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
features. See Tech Brief TB379.
6. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 8) TYP (Note 8) UNITS
POWER-ON RESET
VIN Threshold
VPOR
VIN Bias Current
IVIN
Rising
-
-
2.47
V
Falling
2.20
-
-
V
RILIM = 24.9k, EN = L
-
-
1000
µA
EN = H
-
80
-
µA
ISL9211ARU48
4.6
4.8
5.0
V
ISL9211ARU58
5.6
5.8
6.0
V
ISL9211ARU68
6.6
6.8
7.0
V
-
100
-
mV
ISL9211ARU48
4.55
-
-
V
ISL9211ARU58
5.55
-
-
V
ISL9211ARU68
6.55
-
-
V
-
-
1
µs
0.93
1.0
1.07
A
-
2.0
-
A
PROTECTIONS
Input Overvoltage Protection
VOVP
Input OVP Hysteresis
Input OVP Falling Threshold
Input OVP Response Time (Note 7)
Overcurrent Protection
IOCP
VVB = 3V, RILIM = 24.9kΩ
Maximum Output Current
IMAX
RILIM = 9.53kΩ
Overcurrent Protection Blanking Time
BTOCP
-
180
-
µs
Battery Overvoltage Protection Threshold
VBOVP
4.25
4.34
4.40
V
-
30
-
mV
-
180
-
µs
-
-
20
nA
Battery OVP Threshold Hysteresis
Battery OVP Blanking Time
BTBOVP
VVB = 4.34V
VB Pin Leakage Current
4
FN6702.1
August 25, 2010
ISL9211A
Electrical Specifications
(Continued)
PARAMETER
SYMBOL
MIN
MAX
(Note 8) TYP (Note 8) UNITS
TEST CONDITIONS
Over-Temperature Protection Rising
Threshold
-
150
-
°C
Over-Temperature Protection Falling
Threshold
-
110
-
°C
EN Input Logic HIGH
1.5
-
-
V
EN Input Logic LOW
-
-
0.4
V
EN Internal Pull-down Resistor
-
200
-
kΩ
LOGIC
FAULT Output Logic Low
Sink 5mA current
-
0.4
0.8
V
FAULT Output Logic High Leakage Current
Pin Voltage = 4.2V
-
-
1.5
µA
Measured at 200mA
-
170
280
mΩ
POWER MOSFET
On-Resistance (Note 7)
rDS(ON)
NOTES:
7. Limits should be considered typical and are not production tested.
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
Typical Application
INPUT
VIN
OUT
C1
C2
ISL9211A
ISL6292
BATTERY
CHARGER
RVB
VB
ILIM
EN
RILIM
DISA
ENA
GND
FAULT
BATT
PACK
TABLE 1.
PART
RILIM
RVB
C1,C2
5
DESCRIPTION
24.9kΩ
200kΩ to 1MΩ
1µF/25V X5R ceramic capacitor
FN6702.1
August 25, 2010
ISL9211A
Typical Operating Performance
The test conditions for the Typical Operating Performance are:
VIN = 5V, TA = +25°C, RILIM = 24.9kΩ, RVB = 200kΩ, Unless Otherwise Noted.
VIN(2V/div)
VIN (2V/DIV)
V
VIN(2V/div)
IN (2V/DIV)
OUT
(2V/DIV)
OUT(2V/div)
OUT
(2V/DIV)
OUT(2V/div)
LOAD
(200mA/DIV)
LoadCURRENT
Current(200mA/div)
FAULT (5V/DIV)
Fault(5V/div)
TIME - 4ms/DIV
TIME - 20µs/DIV
FIGURE 1. CAPTURED WAVEFORMS FOR POWER-UP.
THE OUTPUT IS LOADED WITH A 10Ω
RESISTOR
FIGURE 2. CAPTURED WAVEFORMS WHEN THE INPUT
VOLTAGE STEPS FROM 5.5V TO 9.5V
V
VIN(2V/div)
IN (2V/DIV)
VIN
(2V/DIV)
VIN(2V/div)
OUT
(2V/DIV)
OUT(2V/div)
OUT
(2V/DIV)
OUT(2V/div)
FAULT (5V/DIV)
Fault(5V/div)
TIME - 2s/DIV
FIGURE 3. CAPTURED WAVEFORMS WHEN THE INPUT
GRADUALLY RISES TO THE INPUT
OVERVOLTAGE THRESHOLD
VVIN(5V/div)
IN (5V/DIV)
FAULT Fault(5V/div)
(5V/DIV)
TIME - 4ms/DIV
FIGURE 4. TRANSIENT WHEN THE INPUT VOLTAGE
STEPS FROM 6.5V TO 5.5V
VVIN(1V/div)
IN (1V/DIV)
VB
(1V/DIV)
VB(1V/div)
OUT
(2V/DIV)
OUT(2V/div)
FAULT
(2V/DIV)
Fault(2V/div)
TIME - 40µs/DIV
FIGURE 5. TRANSIENT WAVEFORMS WHEN INPUT
STEPS FROM 0V TO 9V
6
OUT
(1V/DIV)
OUT(1V/div)
FAULT
(2V/DIV)
Fault(2V/div)
TIME - 20s/DIV
FIGURE 6. BATTERY OVERVOLTAGE PROTECTION. THE
IC IS LATCHED OFF AFTER 16 COUNTS OF
PROTECTION. VB VOLTAGE VARIES
BETWEEN 4.3V TO 4.5V
FN6702.1
August 25, 2010
ISL9211A
Typical Operating Performance
The test conditions for the Typical Operating Performance are:
VIN = 5V, TA = +25°C, RILIM = 24.9kΩ, RVB = 200kΩ, Unless Otherwise Noted. (Continued)
V
VIN(5V/div)
IN (5V/DIV)
VVIN(5V/div)
IN (5V/DIV)
LOAD
CURRENT
Load
current
(2A/div) (2A/DIV)
LOAD CURRENT (2A/DIV)
Load current (2A/div)
FAULT
(2V/DIV)
Fault(2V/div)
FAULT
(2V/DIV)
Fault(2V/div
TIME - 1ms/DIV
TIME - 40µs/DIV
FIGURE 7. POWER-UP WAVEFORMS WHEN OUTPUT IS
SHORT-CIRCUITED
FIGURE 8. ZOOMED-IN VIEW OF FIGURE 7
5.85
2.52
2.48
5.80
RISING THRESHOLD
2.40
VOVP (V)
VPOR (V)
2.44
2.36
FALLING THRESHOLD
2.32
2.28
RISING THRESHOLD
5.75
5.70
FALLING THRESHOLD
5.65
2.24
2.20
-50
-30
-10
10
30
50
70
5.60
-50
90
-30
-10
TEMPERATURE (°C)
FIGURE 9. VPOR vs TEMPERATURE
1.03
70
90
0.986
4.3V
1.02
1.01
1.00
0.99
0.98
3.0V
0.984
0.982
0.980
0.978
0.976
0.974
0.96
0.95
-50 -30 -10
50
0.988
5.0V
0.97
30
FIGURE 10. INPUT OVERVOLTAGE PROTECTION vs
TEMPERATURE
ILIM PIN VOLTAGE (V)
OVERCURRENT PROTECTION (A)
1.04
10
TEMPERATURE (°C)
10
30
50
70
90 110 130
TEMPERATURE (°C)
FIGURE 11. OVERCURRENT PROTECTION vs
TEMPERATURE AT VARIOUS INPUT
VOLTAGES
7
0.972
-50 -30 -10
10
30
50
70
90 110 130
TEMPERATURE (°C)
FIGURE 12. ILIM PIN VOLTAGE vs TEMPERATURE
FN6702.1
August 25, 2010
ISL9211A
Typical Operating Performance
The test conditions for the Typical Operating Performance are:
VIN = 5V, TA = +25°C, RILIM = 24.9kΩ, RVB = 200kΩ, Unless Otherwise Noted. (Continued)
350
3.0V
300
4.3V
rDS(ON) (mΩ)
250
200
150
5.0V
100
50
0
-50 -30 -10
10
30
50
70
90
110 130
TEMPERATURE (°C)
FIGURE 13. ON-RESISTANCE vs TEMPERATURE AT DIFFERENT INPUT VOLTAGES
Theory of Operation
The ISL9211A is an integrated circuit (IC) optimized to
provide a redundant safety protection to a Li-ion battery
from charging system failures. The IC monitors the input
voltage, the battery voltage, and the charge current.
When any of the above three parameters exceeds its
limit, the IC turns off an internal N-channel MOSFET to
remove the power from the charging system. In addition
to the above protected parameters, the IC also monitors
its own internal temperature and turns off the N-channel
MOSFET when the temperature exceeds +150°C.
Together with the battery charger IC and the protection
module in a battery pack, the charging system has
triple-level protection from overcharging the Li-ion
battery and is two-fault tolerant. The ISL9211A protects
up to 26V input voltage.
Power-Up
The ISL9211A has a power-on reset (POR) threshold of
2.47V (max). Before the input voltage reaches the POR
threshold, the internal power NFET is off. Approximately
10ms after the input voltage exceeds the POR threshold,
the IC resets itself and begins the soft-start. The 10ms
delay allows any transients at the input during a hot
insertion of the power supply to settle down before the IC
starts to operate. The soft-start slowly turns on the
power NFET to reduce the inrush current as well as the
input voltage drop during the transition. The power-up
sequence is illustrated in Figure 1.
Input Overvoltage Protection (OVP)
The input voltage is monitored by the comparator CP1 in
the “Block Diagram” on page 2. CP1 has an accurate
reference of 1.2V from the bandgap reference. The OVP
threshold is set by the resistive divider consisting of R1
and R2. When the input voltage exceeds the threshold,
the CP1 outputs a logic signal to turn off the power NFET
within 1µs (see Figure 2) to prevent the high input
voltage from damaging the electronics in the handheld
8
system. The hysteresis for the input OVP threshold is
given in the “Electrical Specifications” table on page 4.
When the input overvoltage condition is removed, the
ISL9211A re-enables the output by running through the
soft-start, as shown in Figure 4. Because of the 10ms
second delay before the soft-start, the output is never
enabled if the input rises above the OVP threshold
quickly, as shown in Figure 5.
Battery Overvoltage Protection
The battery voltage OVP is realized with the VB pin. The
comparator CP3, as shown in the “Block Diagram” on
page 2, monitors the VB pin and issues an overvoltage
signal when the battery voltage exceeds the 4.34V
battery OVP threshold. The threshold has 30mV built-in
hysteresis. The comparator CP3 has a built-in 180µs
blanking time to prevent any transient voltage from
triggering the OVP. If the OVP situation still exists after
the blanking time, the power NFET is turned off. The
control logic contains a 4-bit binary counter that if the
battery overvoltage event occurs 16 times, the power
NFET is turned off permanently, as shown in Figure 6.
Recycling the input power will reset the counter and
restart the ISL9211A.
The resistor between the VB pin and the battery, RVB, as
shown in the “Typical Application Circuit” on page 1, is an
important component. This resistor provides a current
limit in case the VB pin is shorted to the input voltage
under a failure mode. The VB pin leakage current under
normal operation is negligible to allow a resistance of
200kΩ to 1MΩ be used.
Overcurrent Protection (OCP)
The current in the power NFET is limited to prevent
charging the battery with an excessive current. The
current is sensed using the voltage drop across the
power FET after the it is turned on. The reference of the
OCP is generated using a sensing FET Q2 (Mirror to Q1),
as shown in the “Block Diagram” on page 2. The current
FN6702.1
August 25, 2010
ISL9211A
TABLE 2.
RLIM
(kΩ)
OCP
(mA)
RLIM
(kΩ)
OCP
(mA)
82.5
300
21
1200
61.9
400
19.1
1300
49.9
500
16.5
1400
41.2
600
15.4
1500
35.7
700
14
1600
31.6
800
12.4
1700
28
900
11.3
1800
24.9
1000
10.5
1900
22.6
1100
9.53
2000
The size of the power FET Q1 is 31,250 times the size of
the sensing FET. Therefore, when the current in the
power FET is 31,250 times the current in the sensing FET,
the drain voltage of the power FET falls below that of the
sensing FET. The comparator CP2 then outputs a signal
to turn off the power FET. where the 0.8V is the regulated
reference voltage at the ILIM pin. The OCP comparator
CP2 has a built-in 180µs delay to prevent false triggering
by transient signals. The OCP function also has a 4-bit
binary counter that accumulates during an OCP event.
When the total count reaches 16, the power NFET is
turned off permanently until the input power is recycled
or the enable pin is toggled. Figures 7 and 8 illustrate the
waveforms during the power-up when the output is
shorted to ground.
Internal Over-Temperature Protection
The ISL9211A monitors its own internal temperature to
prevent thermal failures. When the internal temperature
reaches +150°C, the IC turns off the N-channel power
MOSFET. The IC does not resume operation until the
internal temperature drops below +110°C.
Fault Indication Output
The FAULT pin is an open-drain output that indicates a
LOW signal when any of the three fault events happens.
This provides a signal to the microprocessor to take
further action to enhance the safety of the charging
system.
Applications Information
The ISL9211A is designed to meet the “Lithium-Safe”
criteria when operating together with a qualified Li-ion
battery charger. The “Lithium-Safe” criteria requires the
charger output to fall within the green region shown in
Figure 14 under normal operating conditions and NOT to
fall in the red region when there is a single fault in the
charging system. Taking into account the safety circuit in
a Li-ion battery pack, the charging system is allowed to
9
have two faults without creating hazardous conditions for
the battery cell. The output of the Li-ion charger, such as
the ISL6292C, has a typical I-V curve shown with the
blue lines under normal operation, which is within the
green region. The function of the ISL9211A is to add a
redundant protection layer such that, under any single
fault condition, the charging system output does not
exceed the I-V limits shown with the red lines. As a
result, the charging system adopting the ISL9211A and
the ISL6292C chip set can easily pass the “Lithium-Safe”
criteria test procedures.
The ISL9211A is a simple device that requires only three
external components, in addition to the ISL6292 charger
circuit, to meet the “Lithium-Safe” criteria, as shown in
the “Typical Application Circuit” on page 1. The selection
of the current limit resistor RILIM is given in “Overcurrent
Protection (OCP)” on page 8.
RVB Selection
The RVB prevents a large current from the VB pin to the
battery terminal, in case the ISL9211A fails. The
recommended value should be between 200kΩ to 1MΩ.
With 200kΩ resistance, the worst case current flowing
from the VB pin to the charger output is shown in
Equation 1, assuming the VB pin voltage is 24V under a
failure mode and the battery voltage is 4.2V.
(EQ. 1)
( 24V – 4.2V ) ⁄ ( 200kΩ ) = 99μA
Such a small current can be easily absorbed by the bias
current of other components in the handheld system.
Increasing the RVB value reduces the worst case current,
but at the same time increases the error for the 4.34V
battery OVP threshold.
The error of the battery OVP threshold is the original
accuracy at the VB pin given in the “Electrical
Specifications” table on page 4 plus the voltage built
across the RVB by the VB pin leakage current. The VB pin
leakage current is less than 20nA, as given in the
“Electrical Specifications” table on page 4. With the
200kΩ resistor, the worst-case additional error is 4mV
and with a 1MΩ resistor, the worst-case additional error
is 20mV.
1000
ISL9211A
LIMITS
CHARGE CURRENT (mA)
in the sensing FET is forced to match the value
programmed by ILIM pin. The OCP threshold can be set
with the resistor RLIM as shown in Table 2.
ISL6292C
LIMITS
0
1
2
3
4
5
6
BATTERY VOLTAGE (V)
FIGURE 14. LITHIUM-SAFE OPERATING REGIONS
FN6702.1
August 25, 2010
ISL9211A
Capacitor Selection
The input capacitor (C1 in the “Typical Application Circuit”
on page 1) is for decoupling. Higher value reduces the
voltage drop or the over-shoot during transients.
Two scenarios can cause the input voltage over-shoot. The
first one is when the AC adapter is inserted live (hot
insertion) and the second one is when the current in the
power NFET of the ISL9211A has a step-down change.
Figure 15 shows an equivalent circuit for the ISL9211A
input. The cable between the AC/DC converter output and
the handheld system input has a parasitic inductor. The
parasitic resistor is the lumped sum of various components,
such as the cable, the adapter output capacitor ESR, the
connector contact resistance, and so on.
C1
L
R
AC/DC
ADAPTER
C2
ISL9211A
CABLE
HANDHELD SYSTEM
FIGURE 15. EQUIVALENT CIRCUIT FOR THE ISL9211A
INPUT
During the load current step-down transient, the energy
stored in the parasitic inductor is used to charge the
input decoupling capacitor C2. The ISL9211A is designed
to turn off the power NFET slowly during the OCP and the
battery OVP event. Because of such design, the input
over-shoot during those events is not significant. During
an input OVP, however, the NFET is turned in less than
1µs and can lead to significant over-shoot. Higher
capacitance reduces the over-shoot.
10
The over-shoot caused by a hot insertion is not very
dependent on the decoupling capacitance value.
Especially when ceramic type capacitors are used for
decoupling. In theory, the over-shoot can rise up to twice
of the DC output voltage of the AC adapter. The actual
peak voltage is dependent on the damping factor that is
mainly determined by the parasitic resistance (R in
Figure 15).
In practice, the input decoupling capacitor is
recommended to use a 25V, X5R dielectric ceramic
capacitor with a value between 0.1µF to 1µF.
The output of the ISL9211A and the input of the charging
circuit typically share one decoupling capacitor. The
selection of that capacitor is mainly determined by the
requirement of the charging circuit. When using the
ISL6292 family chargers, a 1µF, 6.3V, X5R capacitor is
recommended.
Layout Recommendation
The ISL9211A uses a thermal-enhanced TDFN package
with an exposed thermal pad at the bottom of the
package. The layout should include as much copper as
possible beneath the exposed pad on the component
layer to improve thermal performance. The exposed pad
under the package should be connected to the ground
plane electrically as well as thermally. The vias should be
about 0.3mm to 0.33mm in diameter, use as many vias
as possible to fit in the epad area.
FN6702.1
August 25, 2010
ISL9211A
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to
web to make sure you have the latest Rev.
DATE
REVISION
5/5/10
FN6702.1
3/30/10
CHANGE
In Table 2 on page 9, changed layout from: 2 columns to 4 columns.
In “Electrical Specifications” table on page 4, changed the test conditions for “Maximum
Output Current” from “Rlim = 12.4k” to “Rlim = 9.53k”.
Converted to new Intersil template. Edits include:
Moved “Block Diagram” to page 2, “Pin Configuration” to page 3, “Ordering Information” to
page 3 and “Typical Application Circuit” to page 1
Adding MSL Note 3 and TB347 Note 1 to “Ordering Information” on page 3.
Converted “Pin Descriptions” to tabular format and moved after “Pin Configuration” on page 3.
Added Exposed Pad to “Pin Descriptions” on page 3.
Added PAD label to “Pin Configuration” on page 3.
Added “ESD Rating” on page 4. Added “Latch up” to page 4.
Moved “Parameters with MIN and Max..” in common conditions of “Electrical Specifications”
table to Note 8 in MIN MAX columns.
Removed the following from “Overcurrent Protection (OCP)” on page 9:
“The OCP threshold can be calculated using Equation 1:
ILIM = 0.8V/RILIM x 31250 - 25000/RILIM (EQ. 1)”
Added Table 2 to page 9 and following sentence to“Overcurrent Protection (OCP)” on page 9:
“The OCP threshold can be set with the resistor RLIM as shown in Table 2."
Added “Revision History” on page 11 and “Products” on page 11.
4/2/09
FN6702.0
Initial Release
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The
Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones,
handheld products, and notebooks. Intersil's product families address power management and analog signal
processing functions. Go to www.intersil.com/products for a complete list of Intersil product families.
*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device
information page on intersil.com: ISL9211A
To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff
FITs are available from our website at http://rel.intersil.com/reports/search.php
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications
at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by
Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11
FN6702.1
August 25, 2010
ISL9211A
Package Outline Drawing
L8.2x2B
8 LEAD MICRO THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE (µTDFN) WITH E-PAD
Rev 0, 04/08
2.00
A
6
PIN #1
INDEX AREA
B
6
PIN 1
INDEX AREA
8
1
0.50
2.00
1.60±0.050
EXP. DAP
(4X)
0.15
0.10 M C A B 0.25±0.050
( 8x0.30 )
0.90±0.050
EXP. DAP
TOP VIEW
BOTTOM VIEW
SEE DETAIL "X"
( 8x0.20 )
PACKAGE
OUTLINE
0.10
C
0 . 55 MAX
( 8x0.30 )
C
BASE PLANE
SEATING PLANE
SIDE VIEW
( 6x0.50 )
1.60
C
2.00
C
( 8x0.25 )
0.08
0 . 2 REF
0.90
0 . 00 MIN.
2.00
0 . 05 MAX.
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
12
FN6702.1
August 25, 2010
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