Aeroflex ACT8501-7 Act8501 radiation hardened & esd protected 64-channel analog multiplexer module Datasheet

ACT8501
Radiation Hardened & ESD Protected
64-Channel Analog Multiplexer Module
Features
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CIRCUIT TECHNOLOGY
Radiation Environment
www.aeroflex.com
• Radiation 300K(Si) Total Dose
• No Latch-Up or SEE to 120MeV/cm2/mg
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■
■
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■
■
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ISO
I NC .
■
S
■
B
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Full Military Temperature Range
Low Power Consumption < 90mW
64 Channels Provided by Four (4) HS-1840RH Multiplexers
Two Address Busses (A0-3 & B0-3), and Four Enable lines afford flexible
organization
All Channel Inputs protected by ±20V Transorbs
X LA
LE
F
Fast Access Time 1500ns
±35V Input Over Voltage Protection (Power On or Off)
Break-Before-Make Switching
9001
High Analog Input Impedance (Power On or Off)
C
E
RT IFIE D
Dielectrically Isolated Device Islands
No Latch-Up
Packaging – Hermetic Ceramic Quad Flat Pack
A E RO
■
• 96 Leads, 1.32"Sq x .20"Ht Quad Flat Pack
• Typical Weight 15 grams
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DESC SMD Pending
General Description
Aeroflex’s ACT8501 is a radiation hardened, multi-chip 64 channel multiplexer MCM (multi-chip
module) with ESD protection for use in space applications. All channel inputs have electrostatic
discharge protection.
The ACT8501 has been specifically designed to meet exposure to radiation environments. The
multiplexer is available in a 96 lead High Temperature Co-Fired Ceramic (HTCC) Quad Flatpack
(QFP) and is guaranteed operational from -55°C to +125°C. Available screened in accordance with
MIL-PRF-38534, the ACT8501 is ideal for demanding military and space applications.
eroflex Circuit Technology – Multiplexer Modules For The Future © SCD8501 REV A 10/26/01
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2
SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700
+VDD
A0
A1
A2
A3
EN 32-47
CH 47
•
•
•
CH 32
B0
B1
B2
B3
EN 0-15
CH 15
•
•
•
CH 0
16
16
VR
VR
16
16
MUX 3
MUX 1
GND
VREF
EN 48-63
CH 63
16
16
VR
VR
16
16
ACT8501 64 Channel Analog MUX Block Diagram
-VEE
OUTPUT 32-47
CH 48
•
•
•
EN 16-31
CH 31
SECTION A
OUTPUT 0-15
•
•
•
CH 16
SECTION B
MUX 4
MUX 2
OUTPUT 48-63
OUTPUT 16-31
Organization and Application
The ACT8501 consists of four 16 channel muxes arranged as shown in the Block Diagram. The
ACT8501 design is inherently Radiation Hard due to the HS1840RH Multiplexers as well as
Microsemi Corp. Transient Suppressors (Reference Microsemi MicroNotes Series 050 page 14).
A Section
Thirty-two channels addressable by Bus A0~A3, in two 16 channel blocks, each block enabled
separately.
B Section
Thirty-two (32) channels addressable by Bus B0~B3, in two 16 channel blocks, each block
enabled separately.
NOTE: It is recommended that all "NC or "no connect pin", be grounded. This eliminates or
minimizes any ESD or static buildup.
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3
SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700
Absolute Maximum Ratings 1/
Parameter
Range
Units
Case Operating Temperature Range
-55 to +125
°C
Storage Temperature Range
-55 to +150
°C
+20
-20
+20
V
V
V
< VR +4
> GND -4
V
V
±18
V
Supply Voltage
+VCC (Pin 44)
-VEE (Pin 46)
VREF (Pin 48)
Digital Input Overvoltage
VEN (Pins 5, 6, 91, 92), VA (Pins 93, 95, 1, 3), VB (Pins 94, 96, 2, 4)
Analog Input Over Voltage
VS
Notes:
1/ All measurements are made with respect to ground.
NOTICE: Stresses above those listed under "Absolute Maximums Rating" may cause permanent damage to the device. These are stress
rating only; functional operation beyond the "Operation Conditions" is not recommended and extended exposure beyond the "Operation
Conditions" may effect device reliability.
Recommended Operating Conditions
Symbol
Parameter
Typical
Units
+VCC
+15V Power Supply Voltage
+15.0
V
-VEE
-15V Power Supply Voltage
-15.0
V
VREF
Reference Voltage
+5.00
V
VAL
Logic Low Level
+0.8
V
VAH
Logic High Level
+4.0
V
DC Electrical Performance Characteristics 1/
(Tc = -55°C to +125°C, +VEE = +15V, -VEE = -15V, VREF = +5.0V, Unless otherwise specified)
Parameter
Supply Current
Address Input
Current
Enable Input Current
Aeroflex Circuit Technology
Symbol
Conditions
Min Max Units
I+
VEN(0-63) = VA(0-3)A = VA(0-3)B = 0
0.2
2
mA
I-
VEN(0-63) = VA(0-3)A = VA(0-3)B = 0
-2
-0.2
mA
+ISBY
VEN(0-63) = 4V, VA(0-3)A = VA(0-3)B = 0 6/
0.2
2
mA
-ISBY
VEN(0-63) = 4V, VA(0-3)A = VA(0-3)B = 0 6/
-2
-0.2
mA
IAL(0-3)A
VA = 0V 1/
-2
2
µA
IAH(0-3)A
VA = 5V 1/
-2
2
µA
IAL(0-3)B
VA = 0V 1/
-2
2
µA
IAH(0-3)B
VA = 5V 1/
-2
2
µA
IENL(0-15)
VEN(0-15) = 0V
-1
1
µA
IENH(0-15)
VEN(0-15) = 5V
-1
1
µA
IENL(16-31)
VEN(16-31) = 0V
-1
1
µA
IENH(16-31)
VEN(16-31) = 5V
-1
1
µA
IENL(32-63)
VEN(32-63) = 0V
-1
1
µA
IENH(32-63)
VEN(32-63) = 5V
-1
1
µA
4
SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700
DC Electrical Performance Characteristics 1/ (con’t)
(Tc = -55°C to +125°C, +VEE = +15V, -VEE = -15V, VREF = +5.0V, Unless otherwise specified)
Parameter
Symbol
Conditions
Positive Input
Leakage Current
CH0-CH63
+ISOFFOUT-
VIN = +10V, VEN = 4V, output and all unused
MUX inputs under test = -10V 2/, 3/
-100 +700
nA
Negative Input
Leakage Current
CH0-CH63
-ISOFFOUT-
VIN = -10V, VEN = 4V, output and all unused
MUX inputs under test = +10V 2/, 3/
-100 +700
nA
Output Leakage
Current OUTPUTS
(pins 25,26, 68 & 70)
+IDOFFOUT-
VOUT = +10V, VEN = 4V, output and all
unused MUX inputs under test = -10V 3/, 4/
-100 +100
nA
Output Leakage
Current OUTPUTS
(pins 25,26, 68 & 70)
-IDOFFOUT-
VOUT = -10V, VEN = 4V, output and all unused
MUX inputs under test = +10V 3/, 4/
-100 +100
nA
Input Clamped
Voltage CH0 - CH63
+VCLMP(0-63)
+25°C 18.0 23.0
+125°C 18.0 23.5
-55°C 17.5 22.5
V
V
V
Input Clamped
Voltage CH0 - CH63
-VCLMP(0-63)
+25°C -23.0 -18.0
+125°C -23.5 -18.0
-55°C -22.5 -17.5
V
V
V
Switch ON
Resistance
OUTPUTS
(pins 25,26, 68 & 70)
R DS(ON)(0-63)A
VIN = +15V, VEN = 0.8V, IOUT = -1mA
2/, 3/, 5/
500 3000
Ω
R DS(ON)(0-63)B
VIN = +5V, VEN = 0.8V, IOUT = -1mA
2/, 3/, 5/
500 3000
Ω
RDS(ON)(0-63)C
VIN = -5V, VEN = 0.8V, IOUT = +1mA
2/, 3/, 5/
500 3000
Ω
PUT(0-63)
PUT(0-63)
PUT(0-63)
PUT(0-63)
Min Max Units
VEN = 4V, all unused MUX inputs under test
are open. 3/
Notes:
1/ Measure inputs sequentially. Ground all unused inputs of the MUX under test. VA is the applied input voltage to the MUXes’ address lines
A(0-3). VB is the applied input voltage to the MUXes’ address lines B(0-3).
2/ VIN is the applied input voltage to the MUXes’ input channel CH0-CH63.
3/ V EN is the applied input voltage to the MUXes’ enable line En(0-15), En(16-31), En(32-47) and En(48-63).
4/ VOUT is the applied input voltage to the MUXes’ output line OUTPUT(1-15), OUTPUT(16-31), OUTPUT(32-47) and OUTPUT(48-63).
5/ Negative current is the current flowing out of each of the MUX pins. Positive current is the current flowing into each MUX pin.
6/ If not tested, shall be guaranteed to the specified limits.
Switching Characteristics
(Tc = -55°C to +125°C, VDD = +15V, VEE = -15V, VR = +5.0V, Unless otherwise specified)
Parameter
Switching Test MUX
Aeroflex Circuit Technology
Symbol
Conditions
Min
Max
Units
tONA
R L = 10KΩ, CL = 50pF
10
1500
ns
tOFFA
R L = 10KΩ, CL = 50pF
10
2000
ns
tONEN
R L = 1KΩ, CL = 50pF
10
1500
ns
tOFFEN
R L = 1KΩ, CL = 50pF
10
1000
ns
5
SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700
Truth Table (CH0 – CH15)
B3
B2
B1
B0
EN(0-15)
"ON" CHANNEL 1/
X
X
X
X
H
NONE
L
L
L
L
L
CH0
L
L
L
H
L
CH1
L
L
H
L
L
CH2
L
L
H
H
L
CH3
L
H
L
L
L
CH4
L
H
L
H
L
CH5
L
H
H
L
L
CH6
L
H
H
H
L
CH7
H
L
L
L
L
CH8
H
L
L
H
L
CH9
H
L
H
L
L
CH10
H
L
H
H
L
CH11
H
H
L
L
L
CH12
H
H
L
H
L
CH13
H
H
H
L
L
CH14
H
H
H
H
L
CH15
1/ Between CH0-15 and OUTPUT (0-15)
Truth Table (CH16 – CH31)
B3
B2
B1
B0
EN(16-31)
"ON" CHANNEL 1/
X
X
X
X
H
NONE
L
L
L
L
L
CH16
L
L
L
H
L
CH17
L
L
H
L
L
CH18
L
L
H
H
L
CH19
L
H
L
L
L
CH20
L
H
L
H
L
CH21
L
H
H
L
L
CH22
L
H
H
H
L
CH23
H
L
L
L
L
CH24
H
L
L
H
L
CH25
H
L
H
L
L
CH26
H
L
H
H
L
CH27
H
H
L
L
L
CH28
H
H
L
H
L
CH29
H
H
H
L
L
CH30
H
H
H
H
L
CH31
1/ Between CH16-31 and OUTPUT (16-31)
Aeroflex Circuit Technology
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SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700
Truth Table (CH32 – CH47)
A3
A2
A1
A0
EN(32-47)
"ON" CHANNEL 1/
X
X
X
X
H
NONE
L
L
L
L
L
CH32
L
L
L
H
L
CH33
L
L
H
L
L
CH34
L
L
H
H
L
CH35
L
H
L
L
L
CH36
L
H
L
H
L
CH37
L
H
H
L
L
CH38
L
H
H
H
L
CH39
H
L
L
L
L
CH40
H
L
L
H
L
CH41
H
L
H
L
L
CH42
H
L
H
H
L
CH43
H
H
L
L
L
CH44
H
H
L
H
L
CH45
H
H
H
L
L
CH46
H
H
H
H
L
CH47
1/ Between CH32-47 and OUTPUT (32-47)
Truth Table (CH48 – CH63)
A3
A2
A1
A0
EN(47-63)
"ON" CHANNEL 1/
X
X
X
X
H
NONE
L
L
L
L
L
CH48
L
L
L
H
L
CH49
L
L
H
L
L
CH50
L
L
H
H
L
CH51
L
H
L
L
L
CH52
L
H
L
H
L
CH53
L
H
H
L
L
CH54
L
H
H
H
L
CH55
H
L
L
L
L
CH56
H
L
L
H
L
CH57
H
L
H
L
L
CH58
H
L
H
H
L
CH59
H
H
L
L
L
CH60
H
H
L
H
L
CH61
H
H
H
L
L
CH62
H
H
H
H
L
CH63
1/ Between CH48-63 and OUTPUT (48-63)
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SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700
4V
Address Lines
0.8V
12V MIN
OUTPUT
0V
tONA
Definition of tONA
4V
Address Lines
0.8V
OUTPUT
0V
tOFFA
Definition of tOFFA
4V
Enable Line
50%
0.8V
90%
OUTPUT
10%
tONEN
0V
tOFFEN
Definition of tONEN and tOFFEN
Aeroflex Circuit Technology
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SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700
Lead Numbers & Functions
ACT8501 – 96 Leads Ceramic QUAD Flat Pack
Pin #
Function
Pin #
Function
Pin #
Function
1
A2
33
CH11
65
CH49
2
B2
34
CH27
66
CH48
3
A3
35
CH12
67
NC
4
B3
36
CH28
68
Output V(48-63)
5
EN 0-15
37
CH13
69
NC
6
EN 16-31
38
CH29
70
Output V(32-47)
7
CH0
39
CH14
71
GND
8
CH16
40
CH30
72
GND
9
CH1
41
CH15
73
CH47
10
CH17
42
CH31
74
CH46
11
CH2
43
NC
75
CH45
12
CH18
44
+VCC
76
CH44
13
CH3
45
NC
77
CH43
14
CH19
46
-VEE
78
CH42
15
CH4
47
NC
79
CH41
16
CH20
48
VREF
80
CH40
17
CH5
49
NC
81
CH39
18
CH21
50
CASE GND
82
CH38
19
CH6
51
CH63
83
CH37
20
CH22
52
CH62
84
CH36
21
CH7
53
CH61
85
CH35
22
CH23
54
CH60
86
CH34
23
GND
55
CH59
87
CH33
24
GND
56
CH58
88
CH32
25
Output V(0-15)
57
CH57
89
GND
26
Output V(16-31)
58
CH56
90
GND
27
CH8
59
CH55
91
EN 48-63
28
CH24
60
CH54
92
EN 32-47
29
CH9
61
CH53
93
A0
30
CH25
62
CH52
94
B0
31
CH10
63
CH51
95
A1
32
CH26
64
CH50
96
B1
NOTE: It is recommended that all "NC or "no connect pin", be grounded. This eliminates or minimizes any ESD or static buildup.
Aeroflex Circuit Technology
9
SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700
CIRCUIT TECHNOLOGY
Ordering Information
Model Number
Screening
DESC SMD #
Package
ACT8501 -S
Military Temperature, -55°C to +125°C,
Screened to the individual test methods of MIL-STD-883 IAW
MIL-PRF-38534 Class K
Pending
QUAD Flat
Pack
ACT8501
Military Temperature, -55°C to +125°C,
Screened to the individual test methods of MIL-STD-883 IAW
MIL-PRF-38534 Class H
ACT8501 -7
Commercial Flow, +25°C testing only
ACT8501 -T
Commercial Flow, -55°C to +125°C testing only
ACT8501 -I
Commercial Flow, -40°C to +85°C testing only
ACT8501 -C
Commercial Flow, -0°C to +70°C testing only
Flat Package Outline
NA
1.150 ±.005
(23 Spaces at .050)
Tol Non-Cum
4 Sides
Pin 1
Pin 12
.200
MAX
Pin 85
Pin 84
Pin 13
.0165
±.003
1.320 SQ
MAX
Pin 36
(.400)
Pin 61
Pin 60
Pin 37
.006
±.001
Specifications subject to change without notice
Aeroflex Circuit Technology
35 South Service Road
Plainview New York 11803
www.aeroflex.com
Aeroflex Circuit Technology
Note: Outside ceramic tie
bars not shown for clarity.
Contact factory for details
Telephone: (516) 694-6700
FAX:
(516) 694-6715
Toll Free Inquiries: (800) THE-1553
E-Mail: [email protected]
10
SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700
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