NSC LM4992SD 420mw stereo cell phone audio amplifier Datasheet

LM4992
420mW Stereo Cell Phone Audio Amplifier
General Description
Key Specifications
The LM4992 is a stereo audio power amplifier primarily
designed for demanding applications in mobile phones and
other portable communication device applications. It is capable of delivering 1 watt, per channel, of continuous average power to an 8Ω BTL load with less than 1% distortion
(THD+N) from a 5VDC power supply.
j Improved PSRR at 217Hz & 1KHz
Boomer audio power amplifiers were designed specifically to
provide high quality output power with a minimal amount of
external components. The LM4992 does not require output
coupling capacitors or bootstrap capacitors, and therefore is
ideally suited for mobile phone and other low voltage applications where minimal power consumption is a primary requirement.
The LM4992 features independent shutdown control for
each channel and a low-power consumption shutdown
mode, which is achieved by driving both shutdown pins with
logic low. Additionally, the LM4992 features an internal thermal shutdown protection mechanism.
j Shutdown Current, Vdd = 3.3V
The LM4992 contains advanced pop & click circuitry which
eliminates noise which would otherwise occur during turn-on
and turn-off transitions.
The LM4992 is unity-gain stable and can be configured by
external gain-setting resistors.
64dB (1KHz)
j Stereo Output Power at 5.0V,
1% THD, 8Ω
1.07W (typ)
j Stereo Output Power at 3.3V,
1% THD, 8Ω
420mW (typ)
0.2µA (typ)
Features
n
n
n
n
n
n
n
n
Available in space-saving LLP package
Ultra low current shutdown mode
BTL output can drive capacitive loads
Improved pop & click circuitry eliminates noise during
turn-on and turn-off transitions
2.2 - 5.5V operation
No output coupling capacitors, snubber networks or
bootstrap capacitors required
Unity-gain stable
External gain configuration capability
Applications
n Mobile Phones
n PDAs
n Portable electronic devices
Connection Diagram
SDA14A
200761E6
Top View
Order Number LM4992SD
See NS Package Number SDA14A
Boomer ® is a registered trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation
DS200761
www.national.com
LM4992 420mW Stereo Cell Phone Audio Amplifier
February 2004
LM4992
Typical Application
200761E7
FIGURE 1. Typical Audio Amplifier Application Circuit
www.national.com
2
Junction Temperature
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Thermal Resistance
Supply Voltage (Note 10)
Operating Ratings
θJA (LLP)
6.0V
Storage Temperature
−65˚C to +150˚C
Power Dissipation (Notes 3, 11)
TMIN ≤ TA ≤ TMAX
Internally Limited
ESD Susceptibility (Note 4)
2000V
ESD Susceptibility (Note 5)
200V
103˚C/W
Temperature Range
−0.3V to VDD +0.3V
Input Voltage
150˚C
−40˚C ≤ TA ≤ 85˚C
2.2V ≤ VDD ≤ 5.5V
Supply Voltage
Electrical Characteristics VDD = 5V (Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25˚C.
LM4992
Symbol
Parameter
Conditions
Typical
Limit
(Note 6)
(Notes 7, 8)
Units
(Limits)
VIN = 0V, Io = 0A, No Load
6
14
mA (max)
VIN = 0V, Io = 0A, 8Ω Load
7
18
mA (max)
1.4
3
µA (max)
IDD
Quiescent Power Supply Current
ISD
Shutdown Current
VSDIH
Shutdown Voltage Input High
1.5
VSDIL
Shutdown Voltage Input Low
1.3
VOS
Output Offset Voltage
Po
Output Power
TWU
Wake-up time
THD+N
Total Harmonic Distortion+Noise
Xtalk
Crosstalk
PSRR
Power Supply Rejection Ratio
VSD = VGND
V
V
7
30
mV (max)
THD = 1% (max); f = 1 kHz, per
channel
1.07
0.9
W (min)
Po = 0.5 Wrms; f = 1kHz
0.15
%
80
dB
100
Vripple = 200mV sine p-p
Input terminated with 10Ω
ms
60 (f =
217Hz)
64 (f = 1kHz)
55
dB (min)
Electrical Characteristics VDD = 3.3V (Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25˚C.
LM4992
Symbol
Parameter
Conditions
Typical
Limit
(Note 6)
(Notes 7, 8)
VIN = 0V, Io = 0A, No Load
4
12
mA (max)
VIN = 0V, Io = 0A, 8Ω Load
5
15
mA (max)
0.2
2.0
µA (max)
IDD
Quiescent Power Supply Current
ISD
Shutdown Current
VSDIH
Shutdown Voltage Input High
1.2
VSDIL
Shutdown Voltage Input Low
1.0
VOS
Output Offset Voltage
Po
Output Power
TWU
Wake-up time
THD+N
Total Harmonic Distortion+Noise
Xtalk
Crosstalk
PSRR
Power Supply Rejection Ratio
Units
(Limits)
VSD = VGND
7
V
V
30
mV (max)
THD = 1% (max); f = 1 kHz, per
channel
420
mW (min)
75
ms
Po = 0.25 Wrms; f = 1kHz
0.1
%
80
dB
Vripple = 200mV sine p-p
Input terminated with 10Ω
65 (f =
217Hz)
70 (f = 1kHz)
3
55
dB (min)
www.national.com
LM4992
Absolute Maximum Ratings (Note 2)
LM4992
Electrical Characteristics VDD = 2.6V (Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25˚C.
LM4992
Symbol
Parameter
Conditions
Typical
Limit
(Note 6)
(Notes 7, 8)
VIN = 0V, Io = 0A, No Load
4.0
mA (max)
VIN = 0V, Io = 0A, 8Ω Load
6.0
mA (max)
VSD = VGND
0.02
IDD
Quiescent Power Supply Current
ISD
Shutdown Current
VSDIH
Shutdown Voltage Input High
1.2
VSDIL
Shutdown Voltage Input Low
1.0
VOS
Output Offset Voltage
Po
Output Power
TWU
Wake-up time
THD+N
Total Harmonic Distortion+Noise
Xtalk
Crosstalk
PSRR
Power Supply Rejection Ratio
Units
(Limits)
5
2.0
µA (max)
V
V
30
mV (max)
THD = 1% (max); f = 1 kHz, per
channel
240
70
ms
Po = 0.15 Wrms; f = 1kHz
0.1
%
80
dB
Vripple = 200mV sine p-p
Input terminated with 10Ω
51 (f =
217Hz)
51 (f = 1kHz)
dB (min)
mW (min)
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature TA. The maximum
allowable power dissipation is PDMAX = (TJMAX–TA)/θJA or the number given in Absolute Maximum Ratings, whichever is lower.
Note 4: Human body model, 100pF discharged through a 1.5kΩ resistor.
Note 5: Machine Model, 220pF–240pF discharged through all pins.
Note 6: Typicals are measured at 25˚C and represent the parametric norm.
Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 9: ROUT is measured from the output pin to ground. This value represents the parallel combination of the 10kΩ output resistors and the two 20kΩ resistors.
Note 10: If the product is in Shutdown mode and VDD exceeds 6V (to a max of 8V VDD), then most of the excess current will flow through the ESD protection circuits.
If the source impedance limits the current to a max of 10mA, then the device will be protected. If the device is enabled when VDD is greater than 5.5V and less than
6.5V, no damage will occur, although operation life will be reduced. Operation above 6.5V with no current limit will result in permanent damage.
Note 11: Maximum power dissipation in the device (PDMAX) occurs at an output power level significantly below full output power. PDMAX can be calculated using
Equation 1 shown in the Application Information section. It may also be obtained from the power dissipation graphs.
www.national.com
4
LM4992
External Components Description
(Figure 1)
Components
Functional Description
1.
Ri
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a
high pass filter with Ci at fC= 1/(2π RiCi).
2.
Ci
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a
highpass filter with Ri at fc = 1/(2π RiCi). Refer to the section, Proper Selection of External Components,
for an explanation of how to determine the value of Ci.
3.
Rf
Feedback resistance which sets the closed-loop gain in conjunction with Ri.
4.
CS
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing
section for information concerning proper placement and selection of the supply bypass capacitor.
5.
CB
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External
Components, for information concerning proper placement and selection of CB.
Typical Performance Characteristics
THD+N vs Frequency
at VDD = 3.3V, 8Ω RL,
and PWR = 250mW, per channel
THD+N vs Frequency
at VDD = 5V, 8Ω RL,
and PWR = 500mW, per channel
200761F1
200761F2
THD+N vs Power Out
at VDD = 5V, 8Ω RL,
1kHz, per channel
THD+N vs Frequency
at VDD = 2.6V, 8Ω RL,
and PWR = 150mW, per channel
200761F3
200761F4
5
www.national.com
LM4992
Typical Performance Characteristics
(Continued)
THD+N vs Power Out
at VDD = 3.3V, 8Ω RL,
1kHz, per channel
THD+N vs Power Out
at VDD = 2.6V, 8Ω RL,
1kHz, per channel
200761F5
200761F6
Power Supply Rejection Ratio (PSRR) vs Frequency
at VDD = 5V, 8Ω RL
Power Supply Rejection Ratio (PSRR) vs Frequency
at VDD = 5V, 8Ω RL
200761F7
200761F8
Input terminated with 10Ω
Input Floating
Power Supply Rejection Ratio (PSRR) vs Frequency
at VDD = 3.3V, 8Ω RL
Power Supply Rejection Ratio (PSRR) vs Frequency
at VDD = 3.3V, 8Ω RL
200761F9
200761G0
Input Floating
www.national.com
Input Floating
6
(Continued)
Power Supply Rejection Ratio (PSRR) vs Frequency
at VDD = 2.6V, 8Ω RL
Power Supply Rejection Ratio (PSRR) vs Frequency
at VDD = 2.6V, 8Ω RL
200761G1
200761G2
Input terminated with 10Ω
Input Floating
Open Loop Frequency Response, 5V
Open Loop Frequency Response, 3.3V
200761G3
200761G4
Open Loop Frequency Response, 2.6V
Noise Floor, 5V, 8Ω
80kHz Bandwidth, Input to GND
200761G5
200761G6
7
www.national.com
LM4992
Typical Performance Characteristics
LM4992
Typical Performance Characteristics
(Continued)
Crosstalk vs Frequency
5V, 8Ω, POUT = 1W
Crosstalk vs Frequency
3.3V, 8Ω, POUT = 400mW
200761G7
200761G8
Power Dissipation vs
Output Power, 5V, 8Ω,
per channel
Crosstalk vs Frequency
2.6V, 8Ω, POUT = 200mW
200761G9
200761H0
Power Dissipation vs
Output Power, 3.3V, 8Ω,
per channel
Power Dissipation vs
Output Power, 2.6V, 8Ω,
per channel
200761H1
www.national.com
200761H2
8
LM4992
Typical Performance Characteristics
(Continued)
Shutdown Hysteresis Voltage
5V
Shutdown Hysteresis Voltage
3.3V
200761H3
200761H4
Shutdown Hysteresis Voltage
2.6V
Output Power vs
Supply Voltage, 8Ω
200761H4
200761H5
Frequency Response vs
Input Capacitor Size
Wakeup Time vs
Supply Voltage
200761H6
200761H7
9
www.national.com
LM4992
Application Information
of good heat sinking. If TJMAX still exceeds 150˚C, then
additional changes must be made. These changes can include reduced supply voltage, higher load impedance, or
reduced ambient temperature. Internal power dissipation is a
function of output power. Refer to the Typical Performance
Characteristics curves for power dissipation information for
different output powers and output loading.
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4992 has two internal operational amplifiers per channel. The first amplifier’s gain is
externally configurable , while the second amplifier is internally fixed in a unity-gain, inverting configuration. The
closed-loop gain of the first amplifier is set by selecting the
ratio of Rf to Ri while the second amplifier’s gain is fixed by
the two internal 20kΩ resistors. Figure 1 shows that the
output of amplifier one serves as the input to amplifier two
which results in both amplifiers producing signals identical in
magnitude, but out of phase by 180˚. Consequently, the
differential gain for the IC is
EXPOSED-DAP MOUNTING CONSIDERATIONS
The LM4992’s exposed-DAP (die attach paddle) packages
(SD) provide a low thermal resistance between the die and
the PCB to which the part is mounted and soldered. This
allows rapid heat transfer from the die to the surrounding
PCB copper area heatsink, copper traces, ground plane, and
finally, surrounding air. The result is a low voltage audio
power amplifier that produces 1.07W dissipation per channel
in an 8Ω load at ≤ 1% THD+N. This power is achieved
through careful consideration of necessary thermal design.
Failing to optimize thermal design may compromise the
LM4992’s performance and activate unwanted, though necessary, thermal shutdown protection.
AVD= 2 *(Rf/Ri)
By driving the load differentially through outputs Vo1 and
Vo2, an amplifier configuration commonly referred to as
“bridged mode” is established. Bridged mode operation is
different from the classical single-ended amplifier configuration where one side of the load is connected to ground.
A bridge amplifier design has a few distinct advantages over
the single-ended configuration, as it provides differential
drive to the load, thus doubling output swing for a specified
supply voltage. Four times the output power is possible as
compared to a single-ended amplifier under the same conditions. This increase in attainable output power assumes
that the amplifier is not current limited or clipped. In order to
choose an amplifier’s closed-loop gain without causing excessive clipping, please refer to the Audio Power Amplifier
Design section.
A bridge configuration, such as the one used in LM4992,
also creates a second advantage over single-ended amplifiers. Since the differential outputs, Vo1 and Vo2, are biased
at half-supply, no net DC voltage exists across the load. This
eliminates the need for an output coupling capacitor which is
required in a single supply, single-ended amplifier configuration. Without an output coupling capacitor, the half-supply
bias across the load would result in both increased internal
IC power dissipation and also possible loudspeaker damage.
The LM4992SD must have its DAP soldered to a copper pad
on the PCB. The DAP’s PCB copper pad is then, ideally,
connected to a large plane of continuous unbroken copper.
This plane forms a thermal mass, heat sink, and radiation
area. Place the heat sink area on either outside plane in the
case of a two-sided or multi-layer PCB. (The heat sink area
can also be placed on an inner layer of a multi-layer board.
The thermal resistance, however, will be higher.) Connect
the DAP copper pad to the inner layer or backside copper
heat sink area with vias. The via diameter should be 0.012in
- 0.013in with a 1.27mm pitch. Ensure efficient thermal conductivity by plugging and tenting the vias with plating and
solder mask, respectively.
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is critical for
low noise performance and high power supply rejection. The
capacitor location on both the bypass and power supply pins
should be as close to the device as possible. Typical applications employ a 5V regulator with 10 µF tantalum or electrolytic capacitor and a ceramic bypass capacitor which aid
in supply stability. This does not eliminate the need for
bypassing the supply nodes of the LM4992. The selection of
a bypass capacitor, CB, is dependent upon PSRR requirements, click and pop performance (as explained in the section, Proper Selection of External Components), system
cost, and size constraints.
POWER DISSIPATION
Power dissipation is a major concern when designing a
successful amplifier, whether the amplifier is bridged or
single-ended. A direct consequence of the increased power
delivered to the load by a bridge amplifier is an increase in
internal power dissipation. The maximum internal power dissipation per channel is 4 times that of a single-ended amplifier. The maximum power dissipation for a given application
can be derived from the power dissipation graphs or from
Equation 1.
PDMAX = 4*(VDD)2/(2π2RL)
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the
LM4992 contains shutdown circuitry that is used to independently turn off each channel’s bias circuitry. This shutdown
feature turns a given channel off when logic low is placed on
the corresponding shutdown pin. By switching a particular
shutdown pin to GND, the LM4992 supply current draw due
to that channel will be minimized in idle mode. Idle current is
measured with the shutdown pin connected to GND. The
trigger point for shutdown is shown as a typical value in the
Shutdown Hysteresis Voltage graphs in the Typical Performance Characteristics section. It is best to switch between
ground and supply for maximum performance. While the
device may be disabled with shutdown voltages in between
ground and supply, the idle current may be greater than the
(1)
It is critical that the maximum junction temperature TJMAX of
150˚C is not exceeded. TJMAX is a function of PDMAX and the
PC board foil area. By adding copper foil, the thermal resistance of the application can be reduced from the free air
value of θJA, resulting in higher PDMAX values without thermal shutdown protection circuitry being activated. Additional
copper foil can be added to any of the leads connected to the
LM4992. It is especially effective when connected to VDD,
GND, and the output pins. Refer to the application information on the LM4992 reference design board for an example
www.national.com
10
CB equal to 0.1µF, the device will be much more susceptible
to turn-on clicks and pops. Thus, a value of CB equal to
1.0µF is recommended in all but the most cost sensitive
designs.
(Continued)
typical value of 0.2µA. In either case, the shutdown pin
should be tied to a definite voltage to avoid unwanted state
changes.
AUDIO POWER AMPLIFIER DESIGN
In many applications, a microcontroller or microprocessor
output is used to control the shutdown circuitry, which provides a quick, smooth transition to shutdown. Another solution is to use a single-throw switch in conjunction with an
external pull-up resistor. This scheme guarantees that the
shutdown pin will not float, thus preventing unwanted state
changes.
A 1W/8Ω Audio Amplifier
Given:
Power Output
1 Wrms
Load Impedance
8Ω
Input Level
1 Vrms
Input Impedance
PROPER SELECTION OF EXTERNAL COMPONENTS
Bandwidth
Proper selection of external components in applications using integrated power amplifiers is critical to optimize device
and system performance. While the LM4992 is tolerant of
external component combinations, consideration to component values must be used to maximize overall system quality.
The LM4992 is unity-gain stable which gives the designer
maximum system flexibility. The LM4992 should be used in
low gain configurations to minimize THD+N values, and
maximize the signal to noise ratio. Low gain configurations
require large input signals to obtain a given output power.
Input signals equal to or greater than 1 Vrms are available
from sources such as audio codecs. Please refer to the
section, Audio Power Amplifier Design, for a more complete explanation of proper gain selection.
Besides gain, one of the major considerations is the closedloop bandwidth of the amplifier. To a large extent, the bandwidth is dictated by the choice of external components
shown in Figure 1. The input coupling capacitor, Ci, forms a
first order high pass filter which limits low frequency response. This value should be chosen based on needed
frequency response for a few distinct reasons.
20 kΩ
100 Hz–20 kHz ± 0.25 dB
A designer must first determine the minimum supply rail to
obtain the specified output power. By extrapolating from the
Output Power vs Supply Voltage graphs in the Typical Performance Characteristics section, the supply rail can be
easily found.
5V is a standard voltage in most applications, it is chosen for
the supply rail. Extra supply voltage creates headroom that
allows the LM4992 to reproduce peaks in excess of 1W
without producing audible distortion. At this time, the designer must make sure that the power supply choice along
with the output impedance does not violate the conditions
explained in the Power Dissipation section.
Once the power dissipation equations have been addressed,
the required differential gain can be determined from Equation 2.
(2)
Rf/Ri = AVD/2
From Equation 2, the minimum AVD is 2.83; use AVD = 3.
Since the desired input impedance was 20 kΩ, and with a
AVD impedance of 2, a ratio of 1.5:1 of Rf to Ri results in an
allocation of Ri = 20 kΩ and Rf = 30 kΩ. The final design step
is to address the bandwidth requirements which must be
stated as a pair of −3 dB frequency points. Five times away
from a −3 dB point is 0.17 dB down from passband response
which is better than the required ± 0.25 dB specified.
fL = 100 Hz/5 = 20 Hz
fH = 20 kHz * 5 = 100 kHz
As stated in the External Components section, Ri in conjunction with Ci create a highpass filter.
Ci ≥ 1/(2π*20 kΩ*20 Hz) = 0.397 µF; use 0.39 µF
The high frequency pole is determined by the product of the
desired frequency pole, fH, and the differential gain, AVD.
With a AVD = 3 and fH = 100 kHz, the resulting GBWP =
300kHz which is much smaller than the LM4992 GBWP of
1.5MHz. This figure displays that if a designer has a need to
design an amplifier with a higher differential gain, the
LM4992 can still be used without running into bandwidth
limitations.
The LM4992 is unity-gain stable and requires no external
components besides gain-setting resistors, an input coupling
capacitor, and proper supply bypassing in the typical application. However, if a closed-loop differential gain of greater
than 10 is required, a feedback capacitor (C4) may be
needed as shown in Figure 2 to bandwidth limit the amplifier.
This feedback capacitor creates a low pass filter that elimi-
Selection Of Input Capacitor Size
Large input capacitors are both expensive and space hungry
for portable designs. Clearly, a certain sized capacitor is
needed to couple in low frequencies without severe attenuation. But in many cases the speakers used in portable
systems, whether internal or external, have little ability to
reproduce signals below 100Hz to 150Hz. Thus, using a
large input capacitor may not increase actual system performance.
In addition to system cost and size, click and pop performance is effected by the size of the input coupling capacitor,
Ci. A larger input coupling capacitor requires more charge to
reach its quiescent DC voltage (nominally 1/2 VDD). This
charge comes from the output via the feedback and is apt to
create pops upon device enable. Thus, by minimizing the
capacitor size based on necessary low frequency response,
turn-on pops can be minimized.
Besides minimizing the input capacitor size, careful consideration should be paid to the bypass capacitor value. Bypass
capacitor, CB, is the most critical component to minimize
turn-on pops since it determines how fast the LM4992 turns
on. The slower the LM4992’s outputs ramp to their quiescent
DC voltage (nominally 1/2 VDD), the smaller the turn-on pop.
Choosing CB equal to 1.0µF along with a small value of Ci (in
the range of 0.1µF to 0.39µF), should produce a virtually
clickless and popless shutdown function. While the device
will function properly, (no oscillations or motorboating), with
11
www.national.com
LM4992
Application Information
LM4992
Application Information
routing refers to using individual traces to feed power and
ground to each circuit or even device. This technique will
require a greater amount of design time but will not increase
the final price of the board. The only extra parts required will
be some jumpers.
(Continued)
nates possible high frequency oscillations. Care should be
taken when calculating the -3dB frequency in that an incorrect combination of R3 and C4 will cause rolloff before
20kHz. A typical combination of feedback resistor and capacitor that will not produce audio band high frequency rolloff
is R3 = 20kΩ and C4 = 25pf. These components result in a
-3dB point of approximately 320 kHz.
Single-Point Power / Ground Connections
The analog power traces should be connected to the digital
traces through a single point (link). A "Pi-filter" can be helpful
in minimizing High Frequency noise coupling between the
analog and digital sections. It is further recommended to put
digital and analog power traces over the corresponding digital and analog ground traces to minimize noise coupling.
PCB LAYOUT GUIDELINES
This section provides practical guidelines for mixed signal
PCB layout that involves various digital/analog power and
ground traces. Designers should note that these are only
"rule-of-thumb" recommendations and the actual results will
depend heavily on the final layout.
Placement of Digital and Analog Components
All digital components and high-speed digital signal traces
should be located as far away as possible from analog
components and circuit traces.
GENERAL MIXED SIGNAL LAYOUT
RECOMMENDATION
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces
parallel to each other (side-by-side) on the same PCB layer.
When traces must cross over each other do it at 90 degrees.
Running digital and analog traces at 90 degrees to each
other from the top to the bottom side as much as possible will
minimize capacitive noise coupling and cross talk.
Power and Ground Circuits
For 2 layer mixed signal design, it is important to isolate the
digital power and ground trace paths from the analog power
and ground trace paths. Star trace routing techniques (bringing individual traces back to a central point rather than daisy
chaining traces together in a serial manner) can have a
major impact on low level signal performance. Star trace
www.national.com
12
LM4992
Application Information
(Continued)
SCHEMATIC DRAWING
200761I2
FIGURE 2. Higher Gain Schematic Drawing
13
www.national.com
LM4992
Demonstration Board Layout
200761E8
Recommended LLP Board Layout:
Top Overlay
200761E9
Recommended LLP Board Layout:
Top Layer
www.national.com
14
LM4992
Demonstration Board Layout
(Continued)
200761F0
Recommended LLP Board Layout:
Bottom Layer
15
www.national.com
LM4992 420mW Stereo Cell Phone Audio Amplifier
Physical Dimensions
inches (millimeters) unless otherwise noted
LLP Package
Order Number LM4992SD
NS Package Number SDA14A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
BANNED SUBSTANCE COMPLIANCE
National Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products
Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification
(CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2.
National Semiconductor
Americas Customer
Support Center
Email: [email protected]
Tel: 1-800-272-9959
www.national.com
National Semiconductor
Europe Customer Support Center
Fax: +49 (0) 180-530 85 86
Email: [email protected]
Deutsch Tel: +49 (0) 69 9508 6208
English Tel: +44 (0) 870 24 0 2171
Français Tel: +33 (0) 1 41 91 8790
National Semiconductor
Asia Pacific Customer
Support Center
Email: [email protected]
National Semiconductor
Japan Customer Support Center
Fax: 81-3-5639-7507
Email: [email protected]
Tel: 81-3-5639-7560
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
Similar pages