Rohm BU9795AKS2 Standard lcd segment driver Datasheet

BU9795AKS2
Datasheet
Standard LCD Segment Drivers
BU9795Axxx Series
MAX 140 segments (SEG35×COM4)
●Features
„ Integrated RAM for display data (DDRAM) :
35 × 4bit (Max 140 Segment)
„ LCD drive output :
4 Common output, Max 35Segment output
„ Integrated Buffer AMP for LCD driving
„ Integrated Oscillator circuit
„ No external components
„ Low power consumption design
●Key Specifications
■ Supply Voltage Range:
+2.5V to +5.5V
■ Operating Temperature Range:
-40°C to +85°C
■ Max Segments:
BU9795AKV
140 Segments
BU9795AFV
108 Segments
BU9795AGUW
124 Segments
BU9795AKS2
140 Segments
■ Display Duty:
1/4
■ Bias:
1/2, 1/3 selectable
■ Interface:
3wire serial interface
●Applications
„
Telephone
„
FAX
„
Portable equipment (POS, ECR, PDA etc.)
„
DSC
„
DVC
„
Car audio
„
Home electrical appliance
„
Meter equipment
etc.
W (Typ.) x D (Typ.) x H (Max.)
●Packages
VQFP48C
9.00mm x 9.00mm x 1.60mm
VBGA048W040
4.00mm x 4.00mm x 0.90mm
SSOP-B40
SQFP-T52M
13.60mm x 7.80mm x 2.00mm 12.00mm x 12.00mm x 1.40mm
●Typical Application Circuit
VDD
COM0
COM1
COM2
COM3
VDD
VLCD
INHb
CSB
SD
SCL
Controller
OSCIN
TEST
VSS
・・・
・・・・
SEG0
SEG1
Segment
LCD
SEG34
Using Internal oscillator
Figure 1.
○Product structure:Silicon monolithic integrated circuit
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
Typical application circuit
○This product is not designed protection against radioactive rays.
1/37
TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Block Diagrams / Pin Configurations / Pin Descriptions
Common
driver
SEG24
25
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
36
LCD voltage generator
SEG33
SEG0 … SEG34
COM0
COM0…… COM3
VDD
SEG34
BU9795AKV
Segment
driver
37
+
LCD BIAS
SELECTOR
VLCD
INHb
SEG17
CSB
SEG16
SCL
SEG15
SD
SEG14
TEST
SEG13
INHb
Serial inter face
SEG12
13
48
CSB
SD
SEG11
SEG10
SEG9
SEG0
TEST
12
1
IF FILTER
VSS
SEG8
Power On Reset
SEG18
OSCIN
SEG7
OSCILLATOR
SEG19
VSS
SEG6
OSCIN
Command
Data Decoder
SEG20
VDD
SEG5
Command
register
SEG21
VLCD
SEG4
-
DDRAM
SEG22
COM3
SEG3
+
Blink timing
generator
COM2
SEG2
Common
counter
24
SEG23
SEG1
-
COM1
SCL
Figure 2. Block Diagram
Figure 3.
Pin Configuration (TOP VIEW)
Table 1 Pin Description
Pin name
Pin No.
I/O
INHb
48
I
TEST
47
I
OSCIN
43
I
SD
46
I
serial data input
SCL
45
I
serial data transfer clock
CSB
44
I
Chip select
VSS
42
GND
VDD
41
Power supply
VLCD
40
Power supply for LCD driving
SEG0 to 34
1 to 35
O
SEGMENT output for LCD driving
COM0 to 3
36 to 39
O
COMMON output for LCD driving
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
Function
Input terminal for turn off display
H : turn on display
L : turn off display
Test input (ROHM use only)
Must be connect to VSS
External clock input
External clock and Internal clock can be selected by command.
Must be connect to VSS when use internal oscillation circuit.
:
”L” active
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TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Block Diagrams / Pin Configurations / Pin Descriptions - continued
BU9795AFV
COM0…… COM3
SEG0 … SEG30
VDD
LCD voltage generator
Common
driver
Segment
driver
COM1
COM0
SEG30
SEG29
SEG28
SEG24
SEG25
SEG26
SEG27
COM2
SEG22
SEG23
VLCD
COM3
VDD
SEG19
SEG21
VSS
SEG18
SEG20
CSB
OSCIN
SEG17
SEG15
SEG16
SDA
SCL
SEG14
INHb
TEST
SEG4
SEG12
SEG13
SEG5
SEG11
Blink timing
generator
SEG10
-
SEG7
Common
counter
+
SEG6
LCD BIAS
SELECTOR
SEG9
-
SEG8
+
DDRAM
VLCD
INHb
Command
register
OSCIN
OSCILLATOR
Power On Reset
Command
Data Decoder
Serial inter face
IF FILTER
VSS
TEST
CSB
SD
SCL
Figure 4. Block Diagram
Figure 5.
Pin Configuration (TOP VIEW)
Table 2 Pin Description
Pin name
Pin No.
I/O
INHb
36
I
TEST
35
I
OSCIN
31
I
SD
34
I
serial data input
SCL
33
I
serial data transfer clock
CSB
32
I
Chip select
VSS
30
GND
VDD
29
Power supply
VLCD
28
I
Power supply for LCD driving
SEG4 to 30
1 to 23,
37 to 40
O
SEGMENT output for LCD driving
COM0 to 3
24 to 27
O
COMMON output for LCD driving
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
Function
Input terminal for turn off display
H : turn on display
L : turn off display
Test input (ROHM use only)
Must be connect to VSS
External clock input
Ex clock and Int clock can be changed by command.
Must be connect to VSS when use internal oscillation circuit.
:
”L” active
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TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Block Diagrams / Pin Configurations / Pin Descriptions - continued
BU9795AGUW
COM0…… COM3
VDD
LCD voltage generator
1
2
3
4
5
6
7
G
(NC)
SEG13
SEG15
SEG18
SEG20
SEG22
(NC)
F
SEG11
SEG12
SEG16
SEG17
SEG21
SEG23
SEG24
E
SEG9
SEG10
SEG14
SEG19
SEG25
SEG27
SEG26
D
SEG7
SEG6
SEG8
SEG5
SEG30
SEG28
SEG29
C
SEG4
SEG3
SEG2
CSB
COM3
SEG32
SEG31
INHb
SD
VSS
VDD
COM1
COM0
TEST2
SCL
OSCIN
VLCD
COM2
(NC)
SEG0 … SEG32
Common
driver
Segment
driver
+
-
LCD BIAS
SELECTOR
Common
counter
+
-
Blink timing
generator
DDRAM
VLCD
INHb
Command
register
OSCIN
OSCILLATOR
Command
Data Decoder
B
Power On Reset
Serial inter face
A
IF FILTER
(NC)
VSS
TEST
CSB
SD
SCL
Figure 6. Block Diagram
Figure 7.
Pin Configuration (BOTTOM VIEW)
Table 3 Pin Description
Pin name
I/O
Function
INHb
I
TEST
I
OSCIN
I
SD
I
serial data input
SCL
I
serial data transfer clock
CSB
I
Chip select
Input terminal for turn off display
H : turn on display
L : turn off display
Test input (ROHM use only)
Must be connect to VSS
External clock input
Ex clock and Int clock can be changed by command.
Must be connect to VSS when use internal oscillation circuit.
VSS
GND
VDD
Power supply
:
”L” active
VLCD
I
Power supply for LCD driving
SEG2 to 32
O
SEGMENT output for LCD driving
COM0 to 3
O
COMMON output for LCD driving
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TSZ22111・15・001
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TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Block Diagrams / Pin Configurations / Pin Descriptions – continued
BU9795AKS2
SEG14
SEG13
NC
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
NC
SEG21
SEG0 … SEG34
SEG22
SEG23
COM0…… COM3
39
VDD
27
40
LCD voltage generator
Common
driver
Segment
driver
+
-
26
SEG24
SEG12
SEG25
SEG11
SEG26
SEG10
SEG27
SEG9
SEG28
SEG8
SEG29
SEG7
SEG30
SEG6
SEG31
SEG5
SEG32
SEG4
SEG33
SEG3
SEG34
SEG2
COM0
SEG1
LCD BIAS
SELECTOR
Common
counter
+
-
Blink timing
generator
DDRAM
VLCD
INHb
Command
register
OSCIN
Command
Data Decoder
COM1
OSCILLATOR
Power On Reset
Serial inter face
SEG0
14
52
13
1
INHB
TEST
SDA
NC
CSB
SCL
VSS
OSCIN
VLCD
VDD
NC
COM3
COM2
IF FILTER
VSS
TEST
CSB
SD
SCL
Figure 8. ブロック図
Figure 9. 端子配置図 (TOP VIEW)
Table 1 端子説明
端子名
端子番号
I/O
機
能
Input terminal for turn off display
H : turn on display
L : turn off display
Test input (ROHM use only)
Must be connect to VSS
INHb
13
I
TEST
12
I
OSCIN
7
I
External clock input
Ex clock and Int clock can be changed by command.
Must be connect to VSS when use internal oscillation circuit.
SD
10
I
serial data input
SCL
9
I
serial data transfer clock
CSB
8
I
Chip select
VSS
6
GND
VDD
5
Power supply
VLCD
4
Power supply for LCD driving
SEG0-34
COM0-3
14-28,
30-36
38-50
51-52,
1-2
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
:
”L” active
O
SEGMENT output for LCD driving
O
COMMON output for LCD driving
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TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Absolute Maximum Ratings (VSS=0V)
Parameter
Symbol
Ratings
Unit
Remark
Power supply voltage1
VDD
-0.5 to +7.0
V
Power supply
Power supply voltage2
VLCD
-0.5 to VDD
V
LCD drive voltage
0.6
W
0.7
W
0.27
W
0.85
W
Allowable loss
Pd
Input voltage range
VIN
-0.5 to VDD+0.5
V
Operational temperature range
Topr
-40 to +85
℃
Storage temperature range
Tstg
-55 to +125
℃
●Recommended Operating Ratings(Ta=-40°C to +85°C,VSS=0V)
Ratings
Parameter
Symbol
Min.
Typ.
When use more than Ta=25℃, subtract 6mW
per degree.(BU9795AKV) (Package only)
When use more than Ta=25℃, subtract 7mW
per degree (BU9795AFV) (Package only)
When use more than Ta=25°C, subtract 2.7mW
per degree (BU9795AGUW) (Package only)
When use more than Ta=25°C, subtract 8.5mW
per degree (BU9795AKS2) (Package only)
Max.
Unit
Remark
Power Supply voltage1
VDD
2.5
-
5.5
V
Power supply
Power Supply voltage2
VLCD
0
-
VDD
-2.4
V
LCD drive voltage
* Please use VDD-VLCD≥2.4V condition.
●Electrical Characteristics
DC Characteristics (VDD=2.5V to 5.5V, VSS=0V, Ta=-40°C to +85°C, unless otherwise specified)
Limits
Parameter
Symbol
Unit
Conditions
MIN
TYP
MAX
“H” level input voltage
VIH
0.7VDD
-
VDD
V
“L” level input voltage
VIL
VSS
-
0.3VDD
V
“H” level input current
IIH
-
-
1
µA
“L” level input current
IIL
-1
-
-
µA
SEG
RON
-
3.5
-
kΩ
COM
RON
-
3.5
-
kΩ
VLCD
0
-
VDD -2.4
V
VDD-VLCD≥2.5V
Ist
-
-
5
µA
Display off, Oscillator off
Power consumption 1
IDD1
-
12.5
30
µA
Power consumption 2
IDD2
-
20
40
µA
LCD Driver
on resistance
VLCD supply voltage
Standby current
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TSZ22111・15・001
6/37
Iload=±10µA
VDD=3.3V, Ta=25°C,
Power save mode1, FR=70Hz
1/3 bias, Frame inverse
VDD=3.3V, Ta=25°C,
Normal mode, FR=80Hz
1/3 bias, Line inverse
TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Electrical Characteristics - continued
Oscillation Characteristics (VDD=2.5V to 5.5V,VSS=0V, Ta=-40°C to +85°C)
Limits
Parameter
Symbol
Unit
MIN
TYP
MAX
Conditions
Frame frequency
fCLK
56
80
104
Hz
FR = 80Hz setting
Frame frequency1
fCLK1
70
80
90
Hz
VDD=3.5V, 25°C
MPU interface Characteristics(VDD=2.5V to 5.5V,VSS=0V, Ta=-40°C to +85°C)
Limits
Parameter
Symbol
Unit
MIN
TYP
MAX
Input rise time
tr
-
-
80
ns
Input fall time
tf
-
-
80
ns
SCL cycle time
tSCYC
400
-
-
ns
“H” SCL pulse width
tSHW
100
-
-
ns
“L” SCL pulse width
tSLW
100
-
-
ns
SD setup time
tSDS
20
-
-
ns
SD hold time
tSDH
50
-
-
ns
CSB setup time
tCSS
50
-
-
ns
CSB hold time
tCSH
50
-
-
ns
“H” CSB pulse width
tCHW
50
-
-
ns
Conditions
tCHW
CSB
tf
tCSS
tr
tSCYC
tCSH
tSLW
tSHW
SCL
tSDS
tSDH
SD
Figure 10. Interface Timing
●I/O equivalent circuit
VDD
VDD
VLCD
TEST
VSS
VSS
VDD
VDD
CSB, SD, SCL
OSCIN
VSS
VSS
VDD
VDD
INHb
VSS
VSS
Figure 11. I/O equivalent circuit
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TSZ22111・15・001
7/37
TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Example of recommended circuit
<BU9795AKV/BU9795AKS2>
VDD
COM0
COM1
COM2
COM3
VDD
VLCD
INHb
CSB
SD
SCL
Controller
OSCIN
TEST
VSS
・・・
・・・・
SEG0
SEG1
Segment
LCD
SEG34
Using Internal oscillator
VDD
VDD
VLCD
Controller
COM0
COM1
COM2
COM3
INHb
CSB
SD
SCL
Segment
OSCIN
TEST
VSS
LCD
・・・
・・・
SEG0
SEG1
SEG34
Using external oscillator
Figure 12. BU9795AKV/BU9795AKS2
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
8/37
E.g. of recommended circuit
TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Example of recommended circuit - continued
<BU9795AFV>
VDD
VDD
VLCD
COM0
COM1
COM2
COM3
INHb
CSB
SD
SCL
Segment
LCD
SEG4
SEG5
・
・
・
・
・
・
Controller
OSCIN
TEST
VSS
SEG30
Using Internal oscillator
VDD
VDD
VLCD
INHb
CSB
SD
SCL
SEG4
SEG5
Segment
LCD
・
・
・
・
・
・
Controller
COM0
COM1
COM2
COM3
OSCIN
TEST
VSS
SEG30
Using external oscillator
Figure 13. BU9795AFV
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
E.g. of recommended circuit
9/37
TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Example of recommended circuit- continued
<BU9795AGUW>
VDD
VDD
VLCD
COM0
COM1
COM2
COM3
INHb
CSB
SD
SCL
Segment
LCD
SEG
SEG
・
・
・
・
・
・
OSCIN
TEST
VSS
・
・
・
・
・
・
Controller
SEG32
Using Internal oscillator
VDD
VDD
VLCD
INHb
CSB
SD
SCL
Segment
LCD
SEG2
SEG3
・
・
・
・
・
・
OSCIN
TEST
VSS
・
・
・
・
・
・
Controller
COM0
COM1
COM2
COM3
SEG32
Using external oscillator
Figure14. BU9795AGUW
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
E.g. of recommended circuit
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TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Function Description
○Command and data transfer method
○3-SPI (3wire Serial interface)
This device is controlled by 3-wire signal (CSB, SCL, and SD).
First, Interface counter is initialized with CSB=“H", and CSB=“L” makes SD and SCL input enable.
The protocol of 3-SPI transfer is as follows.
Each command starts with Command or Data judgment bit (D/C) as MSB data,
and continuously in order of D6 to D0 are followed after CSB =“L”.
(Internal data is latched at the rising edge of SCL, it converted to 8bits parallel data at the falling edge of 8th CLK.)
Command/Data
Command
CSB
SCL
SD
D/C D6
D5
D4
D/C = “H” : Command
D3
D2
D1
D0
D/C
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D/C = “L” : Data
Figure 15. 3-SPI Command/Data transfer format
○Command transfer method
After CSB=“H”→”L”, 1st byte is always a command input.
MSB of the command input data will be judged that the next byte data is a command or display data (This bit calls
“command or data judgment bit”).
When set “command or data judge bit”=‘1’, next byte will be (continuously) command.
When set “command or data judge bit”=‘0’, next byte data is display data.
1 Command
1 Command
Display Data
0 Command
1 Command
…
Once it becomes display data transfer condition, it will not be back to command input condition even if D/C=1.
So if you want to send command data again, please set CSB=“L”→”H”.
(CSB “L”→”H” will cancel data transfer condition.)
Command transfer is done by 8bits unit, so if CSB=“L”→”H” with less than 8bits data transfer, command will be
cancelled.
It will be able to transfer command with CSB=“L” again.
In Case Of Command Transfer
Command
Command
CSB
SCL
SD
STATUS
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
DISCTL Command Transfer
Command Cancelled (Less Than 8bits)
DISPON Command Transfer
Figure 16. Command transfer format
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TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
○Write display data and transfer method
<BU9795AKV/BU9795AKS2>
This LSI has Display Data RAM (DDRAM) of 35×4=140bit.
The relationship between data input and display data, DDRAM data and address are as follows.
Command
0000000
a
b
c d
e
f
g
h
i
j k
l m
n
o p
…
Display Data
8 bit data will be stored in DDRAM. The address to be written is the address specified by ADSET command, and the
address is automatically incremented in every 4bit data.
Data can be continuously written in DDRAM by transmitting Data continuously.
(When RAM data is written successively after writing RAM data to 22h (SEG34), the address is returned to 00h
(SEG0) by the auto-increment function.
BIT
00h
01h
0
a
1
b
2
c
3
DDRAM address
06h 07h ・・・・・・・ 1Eh
02h
03h
04h
05h
1Fh
20h
21h
22h
e
i
m
q
u
COM0
f
j
n
r
v
COM1
g
k
o
s
x
COM2
d
h
l
p
t
y
SEG SEG SEG SEG SEG SEG SEG SEG
SEG SEG SEG SEG SEG
・・・・・・・
0
1
2
3
4
5
6
7
30
31
32
33
34
COM3
As data transfer to DDRAM happens every 4bit data, it will be cancelled if it changes CSB=“L”→”H” before
4bits data transfer.
Command
RAM write
CSB
SCL
SD
Address set
D7
D6
D5
D4
D3
D2
D1
D0
D7 D6
D5
D4
D3
D2
D1
D0
Internal signal
RAM write
Address00h
Address01h
Address02h
RAM write (Every 4bit data)
Command
Write data will be
canceled, when CSB='H'
Without
4bit data transfer.
RAM write
CSB
SCL
SD
Address set
D7
D6
D5
D4
D3
D2
D1
D0
D7 D6
D5
D4
D3
D2
D1
D0
Internal signal
RAM write
Address00h
Address21h
Address22h
Address00h
Return to address "0"
by automatically
increment.
Figure 17. BU9795AKV/BU9795AKS2 Data Transfer Format
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BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
<BU9795AFV>
This LSI has Display Data RAM (DDRAM) of 27×4=108bit.
As SEG0, SEG1, SEG2, SEG3, SEG31, SEG32, SEG33, SEG34 are not output, these address will be dummy address.
The relationship between data input and display data, DDRAM data and address are as follows.
Command
0000000
a b c d
e
f g
h
i
j
k
l
m n
o
p q
r
Dummy data
s
t
u
v x y
…
Display Data
8 bit data will be stored in DDRAM. The address to be written is the address specified by ADSET command, and the
address is automatically incremented in every 4bit data.
Data can be continuously written in DDRAM by transmitting Data continuously.
(When RAM data is written successively after writing RAM data to 22h (SEG34), the address is returned to 00h (SEG0)
by the auto-increment function.
Dummy data
BIT
DDRAM address
05h 06h 07h ・・・・・・・ 1Eh
Dummy data
00h
01h
02h
03h
04h
0
a
e
i
m
q
u
COM0
1
b
f
j
n
r
v
COM1
2
c
g
k
o
s
x
COM2
3
1Fh
20h
21h
22h
d
h
l
p
t
y
COM3
SEG SEG SEG SEG SEG SEG SEG SEG
SEG SEG SEG SEG SEG
・・・・・・・
0
1
2
3
4
5
6
7
30
31
32
33
34
As data transfer to DDRAM happens every 4bit data, it will be cancelled if it changes CSB=“L”→”H” before
4bits data transfer.
Command
RAM write
CSB
SCL
SD
Address set
D7
D6
D5
D4
D3
D2
D1
D0
D7 D6
D5
D4
D3
D2
D1
D0
Internal signal
RAM write
Address00h
Address01h
Address02h
RAM write (Every 4bit data)
Command
Write data will be
canceled, when CSB='H'
without
4bit data transfer.
RAM write
CSB
SCL
SD
Address set
D7
D6
D5
D4
D3
D2
D1
D0
D7 D6
D5
D4
D3
D2
D1
D0
Internal signal
RAM write
Address00h
Figure 18. BU9795AFV
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TSZ22111・15・001
Address21h
Address22h
Address00h
Return to address "0"
by automatically
increment.
Data Transfer Format
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BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
<BU9795AGUW>
This LSI has Display Data RAM (DDRAM) of 31×4=124bit.
As SEG0, SEG1, SEG33, SEG34 are not output, these address will be dummy address.
The relationship between data input and display data, DDRAM data and address are as follows.
Command
0000000
a b c d e
f
g h
i
j
k
l
m n
Dummy data
o p q
r
s
t
u v
x y
…
Display Data
8 bit data will be stored in DDRAM. The address to be written is the address specified by ADSET command, and the
address is automatically incremented in every 4bit data.
Data can be continuously written in DDRAM by transmitting Data continuously.
(When RAM data is written successively after writing RAM data to 22h (SEG34), the address is returned to 00h (SEG0)
by the auto-increment function.
Dummy data
Dummy data
DDRAM address
00h 01h 02h 03h 04h 05h 06h 07h ・・・・・・・ 1Eh 1Fh 20h 21h 22h
BIT
0
a
e
i
m
q
u
COM0
1
b
f
j
n
r
v
COM1
c
g
k
o
s
x
COM2
2
3
d
h
l
p
t
y
COM3
SEG SEG SEG SEG SEG SEG SEG SEG
SEG SEG SEG SEG SEG
・・・・・・・
0
1
2
3
4
5
6
7
30 31 32 33 34
As data transfer to DDRAM happens every 4bit data, it will be cancelled if it changes CSB=“L”→”H” before
4bits data transfer.
Command
RAM write
CSB
SCL
SD
Address set
D7
D6
D5
D4
D3
D2
D1
D0
D7 D6
D5
D4
D3
D2
D1
D0
Internal signal
RAM write
Address00h
Address01h
Address02h
RAM write (Every 4bit data)
Write data will be
canceled, when CSB='H'
without
4bit data transfer.
RAM write
Command
CSB
SCL
SD
Address set
D7
D6
D5
D4
D3
D2
D1
D0
D7 D6
D5
D4
D3
D2
D1
D0
Internal signal
RAM write
Address00h
Figure 19. BU9795AGUW
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Address21h
Address22h
Address00h
Return to address "0"
by automatically
increment.
Data Transfer Format
TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
○OSCILLATOR
Several kinds of clock for logic and analog circuit are generated from internal oscillation circuit or external clock.
This device has internal oscillator circuit. When you use internal oscillation circuit, please connect OSCIN to VSS.
*When you use external clock, execute ICSET command and connect OSCIN to external clock.
OSCIN
BU9795AKV
/FV/GUW/KS2
VSS
OSCIN
BU9795AKV
/FV/GUW/KS2
VSS
Figure 20. Using internal oscillator circuit
Clock input
Figure 21. Using external clock
○LCD Driver Bias Circuit
This LSI generates LCD driving voltage with on-chip Buffer AMP.
And it can drive LCD at low power consumption.
*1/3 and 1/2Bias can be set in MODESET command.
*Line and frame inversion can be set in DISCTL command.
Refer to “LCD driving waveform” about each LCD driving waveform.
○Blink timing generator
This device has Blinking function.
*This LSI is able to set blink mode with BLKCTL command.
Blink frequency varies widely by characteristic of fCLK, when internal oscillation circuit.
About the characteristics of fCLK, refer to Oscillation Characteristics.
○Reset (initial) condition
Initial condition after execute SOFTWARE RESET is as follows.
・Display is OFF.
・DDRAM address is initialized (DDRAM Data is not initialized).
Refer to Command Description about initialize value of register.
●Command / Function List
Description List of Command / Function
No.
Command
Function
1
Mode Set (MODESET)
Set LCD drive mode
2
Address Set (ADSET)
Set LCD display mode 1
3
Display Control (DISCTL)
Set LCD display mode 2
4
Set IC Operation (ICSET)
Set IC operation
5
Blink Control (BLKCTL)
Set blink mode
6
All Pixel Control (APCTL)
Set pixel condition
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BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Detailed Command Description
D7 (MSB) is bit for command or data judgment.
Refer to Command and data transfer method.
C : 0 : Next byte is RAM write data.
C : 1 : Next byte is command.
○Mode Set (MODE SET)
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
C
1
0
*
P3
P2
*
*
Set display ON and OFF
Setting
P3
Reset initialize condition
Display OFF(DISPOFF)
0
○
(* : Don’t care)
Display ON(DISPON)
1
Display OFF : Regardless of DDRAM data, all SEGMENT and COMMON output will be stopped after 1 frame off
data write. Display OFF mode will be finished by Display ON.
Display ON : SEGMENT and COMMON output will be active and start to read the display data from DDRAM.
(Note) It is not synchronize with display frame, when it will be controlled display ON/OFF with INHb terminal.
Set bias level
Setting
P2
Reset initialize condition
1/3 Bias
0
○
1/2 Bias
1
Refer to LCD driving waveform.
○Address set (ADSET)
MSB
D7
C
D6
0
D5
0
LSB
D4
P4
D3
P3
D2
P2
D1
P1
D0
P0
Address data is specified in P[4 : 0] and P2 (ICSET command) as follows.
MSB
LSB
Internal register
Address [5]
Address [4]
・・・
Address [0]
Bit of each command
ICSET [P2]
ADSET [P4]
・・・
ADSET [P0]
The address is 00h in reset condition. The valid address is 00h to 22h.
Another address is invalid, (otherwise address will be set to 00h.)
P2 of ICSET command is only to define either MSB of address is “1” or “0”.
Address counter will be set only when ADSET command is executed.
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BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
CSB
COMMAND
ADSET”00010”
RAM Write
RAM Write RAM Write
DISCTL
RAM Write
・・・・・
RAM Write
RAM Write
・・・ RAM Write
Internal Signal
ICSET P2
Internal Signal
Address
000010
000011
000100
100010
・・・
000000
000001
000010
Set address by ADSET command.
P2(ICSET command) is refer to set address.
Address will be set "000010", because P2(ICSET)="0".
When RAM data is continuously transmitted,
address will be increment automatically.
When write at 22h address, address will be
return to 00h automatically.
000011
000100
000101
Because of no setting ADSET command,
it will be kept the previous address.
It will be start to write RAM data from maintained address.
The following address that write at the end is maintained.
CSB
COMMAND
ADSET ”11111”
RAM Write
RAM Write RAM Write
RAM Write
・・・・・
ADSET”00000”RAM Write
RAM Write
・・・ RAM Write
Internal Signal
ICSET P2
Internal Signal
Address
011111
100000
100001
100010
000000
000001
000010
000011
000000
Set address by ADSET command.
P2(ICSET command) is refer to set address.
Address will be set "011111", because P2(ICSET)="0".
000001
000010
000011
New address will be set by ADSET command.
When RAM data is continuously transmitted,The following address that write at the end is maintained.
address will be increment automatically.
When write at 22h address, address will be
return to 00h automatically.
CSB
COMMAND
ICSET P2=1
ADSET ”00000”
RAM Write RAM Write
RAM Write
・・・・・
ADSET”00000”
RAM Write
RAM Write
・・・ RAM Write
Internal Signal
ICSET P2
Internal Signal
Address
100000
100001
100010
000000
000001
000010
000011
Set address by ADSET command.
P2(ICSET command) is refer to set address.
Address will be set "100000", because P2(ICSET)="1".
It will be set P2="1" by ICSET command.
(ICSET command cannot set address)
100000
100001
100010
000000
New address will be set by ADSET command.
Address will be set "100000", because P2(ICSET)="1".
(P2(ICSET) will maintain the previous address
until ICSET command input.
When RAM data is continuously transmitted,
address will be increment automatically.
The following address that write at the end is maintained.
When write at 22h address, address will be
return to 00h automatically.
CSB
COMMAND
ICSET P2=1
ADSET ”00000”
RAM Write RAM Write
RAM Write
・・・・・
ICSET P2=0
RAM Write
RAM Write
・・・ RAM Write
Internal Signal
ICSET P2
Internal Signal
Address
100000
100001
100010
000000
・・・・・
100000
100001
Set address by ADSET command.
P2(ICSET command) is refer to set address.
100010
000000
000001
It is written to RAM continuously
from the previous address.
The address maintain the previous address
When RAM data is continuously transmitted,
because it doesn't input the ADSET command
address will be increment automatically.
though ICSET P2="0" setting.
When write at 22h address, address will be
return to 00h automatically.
The following address that write at the end is maintained.
Figure 22. Address Set sequence
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BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
○Display control (DISCTL)
MSB
D7
D6
D5
D4
C
0
1
P4
Set Frame frequency
Setting
D3
P3
D2
P2
LSB
D0
P0
D1
P1
P4
P3
Reset initialize condition
80Hz
0
0
○
71Hz
0
1
64Hz
1
0
53Hz
1
1
* About the characteristics of FR, refer to Oscillation characteristics.
Set LCD drive waveform
Setting
P2
Reset initialize condition
Line inversion
0
○
Frame inversion
1
Set Power save mode
Setting
P1
P0
Power save mode 1
0
0
Power save mode 2
0
1
Normal mode
1
0
High power mode
1
1
Reset initialize condition
○
*VDD-VLCD≥3.0V is required for High power mode.
(Reference current consumption data)
Setting
Reset initialize condition
Power save mode 1
×0.5
Power save mode 2
×0.67
Normal mode
×1.0
High power mode
×1.8
*Above current consumption data is reference value. It depends on panel load.
(Note) Frame rate FR / LCD drive waveform / Power save mode SR will effect display image.
Select the best value in point of current consumption and display image using LCD panel (under real application).
Screen flicker
Display image / contrast
Frame frequency
Mode
○
-
LCD drive waveform
○
○
-
○
Power save mode
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BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
○Set IC Operation (ICSET)
MSB
D7
D6
D5
D4
C
1
1
0
D3
1
D2
P2
LSB
D0
P0
D1
P1
P2 : MSB data of DDRAM address. Please refer to “ADSET” command.
Setting
P2
Reset initialize condition
Address MSB’0’
0
Address MSB’1’
1
○
Set Software Reset condition
Setting
P1
No operation
0
Software Reset
1
When “Software Reset” is executed, this LSI will be reset to initial condition.
If software reset is executed, the value of P2 and P1 will be ignored and they will be set initialized condition. (Refer
to “Reset initial condition”)
Switch between internal clock and external clock.
Setting
P0
Reset initialize condition
Internal clock
0
○
External clock input
1
For internal clock
: OSCIN is connected to VSS.
For external clock input : Input external clock into OSCIN.
<external Clock Frame frequency calculation>
DISCTL 80Hz select : Frame frequency [Hz] = external clock[Hz] / 512
DISCTL 71Hz select : Frame frequency [Hz] = external clock[Hz] / 576
DISCTL 64Hz select : Frame frequency [Hz] = external clock[Hz] / 648
DISCTL 53Hz select : Frame frequency [Hz] = external clock[Hz] / 768
Command
OSCIN_EN
(Internal signal)
ICSET
Internal clock mode
External clock mode
Internal oscillation
(Internal signal)
External clock
(OSCIN)
Figure 23. OSCMODE switching timing
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BU9795Axxx Series
○Blink control (BLKCTL)
MSB
D7
D6
D5
C
1
1
MAX 140 segments (SEG35×COM4)
D4
1
Set blink condition
Setting (Hz)
D3
0
P1
D2
*
Reset initialize condition
○
0
0
0.5
0
1
1
1
0
2
1
1
○All pixel control (APCTL)
MSB
D7
D6
D5
D4
C
1
1
1
D3
1
All display set ON. OFF
Setting
P1
Normal
0
All pixel ON
1
Setting
LSB
D0
P0
D1
P1
P0
OFF
D2
1
Datasheet
LSB
D0
P0
D1
P1
Reset initialize condition
○
P0
Reset initialize condition
Normal
0
○
All pixel OFF
1
All pixels ON : All pixels are ON regardless of DDRAM data.
All pixels OFF : All pixels are OFF regardless of DDRAM data.
(Note) All pixels ON/OFF is effective only at the time of “Display ON” status.
The data of DDRAM do not change with this command.
If both P1 and P0=‘1’, APOFF is selected. APOFF has higher priority than APON.
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BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●LCD driving waveform
(1/3bias)
Line inversion
Frame inversion
SEGn SEGn+1 SEGn+2 SEGn+3
SEGn SEG n+1 SEGn+2 SEGn+3
COM0
stateA
COM0
stateA
COM1
stateB
COM1
stateB
COM2
COM2
COM3
COM3
VDD
1frame
1frame
VDD
COM0
COM0
VLCD
VDD
VLCD
VDD
COM1
COM1
VLCD
VDD
VLCD
VDD
COM2
COM2
VLCD
VDD
VLCD
VDD
COM3
COM3
VLCD
VLCD
VDD
VDD
SEGn
SEGn
VLCD
VDD
VLCD
VDD
SEGn+1
SEGn+1
VLCD
VDD
VLCD
VDD
SEGn+2
SEGn+2
VLCD
VDD
VLCD
VDD
SEGn+3
SEGn+3
VLCD
VLCD
stateA
(COM0-SEGn)
stateB
(COM1-SEGn)
Figure 24. Line inversion waveform(1/3bias)
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stateA
(COM0-SEGn)
stateB
(COM1-SEGn)
Figure 25. Frame inversion waveform(1/3bias)
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BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
(1/2bias)
Line inversion
Frame inversion
SEGn SEGn+1 SEGn+2 SEGn+3
SEGn SEGn+1 SEGn+2 SEGn+3
COM0
stateA
COM0
stateA
COM1
stateB
COM1
stateB
COM2
COM2
COM3
COM3
VDD
1frame
1frame
VDD
COM0
COM0
VLCD
VLCD
VDD
VDD
COM1
COM1
VLCD
VLCD
VDD
VDD
COM2
COM2
VLCD
VLCD
VDD
VDD
COM3
COM3
VLCD
VLCD
VDD
VDD
SEGn
SEGn
VLCD
VLCD
VDD
VDD
SEGn+1
SEGn+1
VLCD
VLCD
VDD
VDD
SEGn+2
SEGn+2
VLCD
VLCD
VDD
VDD
SEGn+3
SEGn+3
VLCD
VLCD
stateA
stateA
(COM0-SEGn)
(COM0-SEGn)
stateB
stateB
(COM1-SEGn)
(COM1-SEGn)
Figure 26. Line inversion waveform(1/2bias)
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Figure 27. Frame inversion waveform(1/2bias)
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BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Example of display data
If LCD layout pattern is shown as in Figure ,Figure
as in Figure .
and DDRAM data is shown as in Table1, display pattern will be shown
COM0
COM1
COM2
COM3
Figure 28. E.g. COM line pattern
SEG1 SEG3
SEG2
SEG5 SEG7
SEG4 SEG6 SEG8
SEG9
SEG10
Figure 29. E.g. SEG line pattern
Figure 30. E.g. Display pattern
Table DDRAM Data map
S
S
S
E
E
E
G G G
0
1
2
S
E
G
3
S
E
G
4
S
E
G
5
S
E
G
6
S
E
G
7
S
E
G
8
S
E
G
9
S
E
G
10
S
E
G
11
S
E
G
12
S
E
G
13
S
E
G
14
S
E
G
15
S
E
G
16
S
E
G
17
S
E
G
18
S
E
G
19
COM0
D0
0
1
1
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
COM1
D1
0
0
1
1
1
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
COM2
D2
0
0
0
1
0
1
0
0
1
0
1
0
0
0
0
0
0
0
0
0
COM3
D3
0
0
1
1
0
0
0
1
0
1
0
0
0
0
0
0
0
0
0
0
Address
00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h 13h
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BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Initialize sequence
Please follow sequence below after Power-On to set this device to initial condition.
Power on
↓
CSB ’H’ …I/F initialize condition
↓
CSB ’L’
…I/F Data transfer start
↓
Execute Software Reset by sending ICSET command
* Each register value and DDRAM address, DDRAM data are random condition after power on till initialize sequence is executed.
●Start sequence
○Start sequence example1
No.
Input
1
D7
D6
D5
D4
D3
D2
D1
D0
Power on
Descriptions
VDD=0 to 5V (Tr=0.1ms)
↓
2
wait 100us
Initialize IC
↓
3
CSB
’H’
Initialize I/F data
’L’
I/F Data transfer start
↓
4
CSB
↓
5
ICSET
6
BLKCTL
1
1
1
0
1
*
1
0
Software Reset
1
1
1
1
0
*
0
1
1
0
1
0
0
1
1
0
1
1
1
0
1
0
0
0
RAM address MSB set
0
0
0
0
0
0
0
0
RAM address set
↓
↓
7
DISCTL
↓
8
ICSET
9
ADSET
10
Display Data
*
*
*
*
*
*
*
*
address
00h to 01h
Display Data
*
*
*
*
*
*
*
*
address
02h to 03h
*
*
*
*
*
*
*
*
address
↓
↓
…
…
Display Data
22h to 00h
↓
11
CSB ‘H’
12
CSB ‘L’
I/F Data transfer stop
↓
I/F Data transfer start
↓
13
MODESET
1
1
0
*
1
0
*
*
Display ON
↓
14
CSB ‘H’
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
I/F Data transfer stop
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TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
○Start sequence example2
Initialize
Initialize Sequence
DISPON
DISPON Sequence
RAM write
RAM write Sequence
DISPOFF
DISPOFF Sequence
This LSI is initialized with Initialize Sequence. And start to display with DISPON Sequence.
This LSI will update display data with RAM write Sequence.
And stop the display with DISPOFF sequence.
If you want to restart to display, This LSI will restart to display with DISPON Sequence.
Initialize sequence
Input
Power on
wait 100us
CSB 'H'
CSB 'L'
ICSET
MODESET
ADSET
Display Data
…
CSB 'H'
DATA
Description
D7 D6 D5 D4 D3 D2 D1 D0
IC initialized
I/F initialized
1
1
1
0
1
0
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
*
*
*
*
*
*
*
*
Software Reset
Display OFF
RAM address set
Display data
Dispon sequence
Input
CSB 'L'
DISCTL
BLKCTL
APCTL
MODESET
CSB 'H'
DATA
Description
D7 D6 D5 D4 D3 D2 D1 D0
1
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
1
0
0
0
Display Control
BLKCTL
APCTL
Display ON
RAM write sequence
Input
CSB 'L'
DISCTL
BLKCTL
APCTL
MODESET
ADSET
Display Data
…
DATA
Description
D7 D6 D5 D4 D3 D2 D1 D0
1
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
*
*
*
*
*
*
*
*
Display Control
BLKCTL
APCTL
Display ON
RAM address set
Display data
CSB 'H'
Dispoff sequence
Input
CSB 'L'
MODESET
CSB 'H'
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
DATA
D7 D6 D5 D4 D3 D2 D1 D0
1
1
0
0
0
0
0
0
25/37
Description
Display OFF
TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Example of start sequence
START
Reduce operating
current or enhance
display quality
Display quality
Please select Frame rate from 80Hz,71Hz,64Hz,53Hz
according to LCD panel characteristic.
Line inversion.
Power save mode= High Power mode
DISCTL setup value
"101**011"
Operating current
Operating current decreases in order of
80Hz>71Hz>64Hz>53Hz.
Frame inversion.
Power save mode= Power save mode1
Screen Flicker?
DISCTL setup value
"101**100"
OK
Please select Frame rate from 80Hz,71Hz,64Hz,53Hz
according to LCD panel characteristic.
Frame inversion.
Power save mode= Power save mode1
DISCTL setup value
"101**100"
NG
Operating current decreases in order of
80Hz>71Hz>64Hz>53Hz.
Frame inversion.
Power save mode= Power save mode2
Screen Flicker?
DISCTL setup value
"101**101"
OK
Please select Frame rate from 80Hz,71Hz,64Hz,53Hz
according to LCD panel characteristic.
Frame inversion.
Power save mode= Power save mode2
DISCTL setup value
"101**101"
NG
Operating current decreases in order of
80Hz>71Hz>64Hz>53Hz.
Frame inversion.
Power save mode= Normal mode
Screen Flicker?
DISCTL setup value
"101**110"
OK
Please select Frame rate from 80Hz,71Hz,64Hz,53Hz
according to LCD panel characteristic.
Frame inversion.
Power save mode= Normal mode
DISCTL setup value
"101**110"
NG
Operating current decreases in order of
80Hz>71Hz>64Hz>53Hz.
Frame inversion.
Power save mode= High Power mode
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
DISCTL setup value
"101**111"
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TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Cautions of Power-On condition
This LSI has “P.O.R” (Power-On Reset) circuit and Software Reset function.
Please keep the following recommended Power-On conditions in order to power up properly.
Please set power up conditions to meet the recommended tR, tF, tOFF, and Vbot spec below in order to ensure P.O.R
operation.
VDD
tF
tR
tOFF
Recommended condition of tR,tF,tOFF,Vbot
tR
Less than
1ms
Vbot
tF
Less than
1ms
tOFF
More than
150ms
Vbot
Less than
0.1V
Figure 31. Power on-off waveform
If it is difficult to meet above conditions, execute the following sequence after Power-On.
Because it doesn’t accept the command in power off, it is necessary to care that correspondence by software reset doesn’t
become alternative to POR function completely.
(1) CSB=“L”→”H” condition
VDD
CSB
Figure 32. CSB Timing
(2) After CSB”H”→”L”, execute Software Reset (ICSET command).
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BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Cautions on application
In case, BU9795AKV/BU9795AFV/BU9795AGUW/BU9795AKS2 used at VLCD≠VSS, voltage gap occur between SEG line
to COM1–3 line at Display off state. Because of this voltage gap, there is possibility to display LCD for a moment.
To avoid this phenomenon, please decide VDD and VLCD level to satisfy Voff voltage lower than OFF level (OFF level = 1V
at the example explained below).
condition : VDD=5.0V
VLCD=2.0V
1/3bias
DDRAM data ALL "H"
Frame inversion
In case, VLCD voltage different from VSS level(VLCD≠VSS)
In this case, volatage gap occur, between SEG line to COM 1-3 line.
Because of this gap, there is possibility to display LCD for a moment.
1Frame
Send "Display off" command
VDD (5V)
Output VLCD level at display off
(All SEG terminal)
SEG0 Output
VLCD (2V)
VLCD-VSS=2V
VSS
COM0 Output
VDD (5V)
Output VLCD level at display off
(Only COM0 terminal)
VLCD (2V)
VLCD-VSS=2V
VSS
COM1 Output
VDD (5V)
VLCD (2V)
Output VSS level at display off
(at COM 1-3 terminal)
VLCD-VSS=2V
VSS
Display on
Voltage gap of
COM0-SEG0
Display off
3V
2V
the volatage between COM0 to SEG0
is 0V at display off.
1V
0V
-1V
-2V
-3V
Display off
Display on
Voltage gap of
COM1-SEG0
3V
2V
ON level
the volatage between COM1 to SEG0
is -2V at display off.
1V
OFF level
0V
-1V
Voff
-2V
-3V
Voltage gap occur between COM1 to SEG0 at display off.
So, there is possibility to display LCD.
(Only at COM 1-3 line)
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
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TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
MAX 140 segments (SEG35×COM4)
Datasheet
●Operational Notes
(1) Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can
break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit.
If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical
safety measures including the use of fuses, etc.
(2) Operating conditions
These conditions represent a range within which characteristics can be provided approximately as expected.
The electrical characteristics are guaranteed under the conditions of each parameter.
(3) Reverse connection of power supply connector
The reverse connection of power supply connector can break down ICs. Take protective measures against the
breakdown due to the reverse connection, such as mounting an external diode between the power supply and the IC’s
power supply terminal.
(4) Power supply line
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard,
or the digital block power supply and the analog block power supply, even though these power supplies has the same
level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing
the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns.
For the GND line, give consideration to design the patterns in a similar manner.
Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal.
At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor
to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the
constant.
(5) GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state.
Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric
transient.
(6) Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can
break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between
the terminal and the power supply or the GND terminal, the ICs can break down.
(7) Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
(8) Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress.
Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set
PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the
jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig.
In addition, for protection against static electricity, establish a ground for the assembly process and pay thorough
attention to the transportation and the storage of the set PCB.
(9) Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the
parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the
input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals
a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage
to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is
applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of
electrical characteristics.
(10) Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND
pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that
resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the
small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well.
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TSZ22111・15・001
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TSZ02201-0A0A2D300020-1-2
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BU9795Axxx Series
MAX 140 segments (SEG35×COM4)
Datasheet
●Operational Notes - continued
(11) External capacitor
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a
degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc.
(12) No Connecting input terminals
In terms of extremely high impedance of CMOS gate, to open the input terminals causes unstable state. And unstable
state brings the inside gate voltage of p-channel or n-channel transistor into active. As a result, battery current may
increase. And unstable state can also causes unexpected operation of IC. So unless otherwise specified, input terminals
not being used should be connected to the power supply or GND line.
(13) Rush current
When power is first supplied to the CMOS IC, it is possible that the internal logic may be unstable and rush current may
flow instantaneously. Therefore, give special condition to power coupling capacitance, power wiring, width of GND wiring,
and routing of connections.
Status of this document
The Japanese version of this document is formal specification. A customer may use this translation version only for a reference
to help reading the formal version.
If there are any differences in translation version of this document formal version takes priority.
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TSZ22111・15・001
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12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Ordering Information
B
U
9
7
9
5
Part Number
A
x
x
-
Package
KV
FV
GUW
KS2
●Lineup
Segment output
x
Common output
: VQFP48C
: SSOP-B40
: VBGA048W040
: SQFP-T52M
xx
Packaging and forming specification
E2: Embossed tape and reel
(VQFP48C/ SSOP-B40/ VBGA048W040/
SQFP-T52M)
Package
Orderable Part Number
35
VQFP48C
Reel of 1500
BU9795AKV-E2
27
SSOP-B40
Reel of 2000
BU9795AFV-E2
VBGA048W040
Reel of 2500
BU9795AGUW-E2
Reel of 1000
BU9795AKS2-E2
Tray of 1000
BU9795AKS2
31
4
35
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
SQFP-T52M
31/37
TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
MAX 140 segments (SEG35×COM4)
Datasheet
●Physical Dimension Tape and Reel Information
Package Name
VQFP48C
1PIN MARK
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
1500pcs
Direction
of feed
E2
direction is the 1pin of product is at the upper left when you hold
( The
)
reel on the left hand and you pull out the tape on the right hand
Direction of feed
1pin
Reel
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
∗ Order quantity needs to be multiple of the minimum quantity.
32/37
TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Physical Dimension, Tape and Reel Information – continued
Package Name
SSOP-B40
(Max 13.95 (include. BURR)
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
2000pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
Direction of feed
1pin
Reel
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
)
∗ Order quantity needs to be multiple of the minimum quantity.
33/37
TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Physical Dimension, Tape and Reel Information – continued
Package Name
VBGA048W040
<Tape and Reel information>
Tape
Embossed carrier tape (with dry pack)
Quantity
2500pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
Direction of feed
1pin
Reel
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
)
∗ Order quantity needs to be multiple of the minimum quantity.
34/37
TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
MAX 140 segments (SEG35×COM4)
Datasheet
●Physical Dimension, Tape and Reel Information – continued
Package Name
SQFP-T52M
<Tape and Reel information>
Container
Tray (with dry pack)
Quantity
1000pcs
Direction of feed Direction of product is fixed in a tray
1pin
∗ Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
1000pcs
Direction
of feed
E2
direction is the 1pin of product is at the upper left when you hold
( The
)
reel on the left hand and you pull out the tape on the right hand
Direction of feed
1pin
Reel
∗ Order quantity needs to be multiple of the minimum quantity.
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
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TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
Datasheet
MAX 140 segments (SEG35×COM4)
●Marking Diagrams
SSOP-B40 (TOP VIEW)
VQFP48C (TOP VIEW)
Part Number Marking
Part Number Marking
BU9795A
BU9795AFV
LOT Number
1PIN MARK
1PIN MARK
VBGA048W040
(TOP VIEW)
1PIN MARK
SQFP-T52M (TOP VIEW)
Part Number Marking
Part Number Marking
9795A
LOT Number
BU9795AKS2
LOT Number
LOT Number
1PIN MARK
Part Number
Package
Part Number Marking
BU9795AKV
VQFP48C
BU9795A
BU9795AFV
SSOP-B40
BU9795AFV
BU9795AGUW
VBGA048W040
9795A
BU9795AKS2
SQFP-T52M
BU9795AKS2
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
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TSZ02201-0A0A2D300020-1-2
12.July.2012 Rev.002
BU9795Axxx Series
MAX 140 segments (SEG35×COM4)
Datasheet
●Revision History
Date
Revision
1.Jun.2012
12.July.2012
001
002
Changes
New Release
Add BU9795AKS2
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Datasheet
Notice
●General Precaution
1) Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2) All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
●Precaution on using ROHM Products
1) Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment, transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
2)
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3)
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4)
The Products are not subject to radiation-proof design.
5)
Please verify and confirm characteristics of the final or mounted products in using the Products.
6)
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse) is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7)
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8)
Confirm that operation temperature is within the specified range described in the product specification.
9)
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Notice - Rev.003
© 2012 ROHM Co., Ltd. All rights reserved.
Datasheet
●Precaution for Mounting / Circuit board design
1) When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2)
In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
●Precautions Regarding Application Examples and External Circuits
1) If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2)
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
●Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
●Precaution for Storage / Transportation
1) Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2)
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3)
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4)
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
●Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
●Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
●Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
●Precaution Regarding Intellectual Property Rights
1) All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2)
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Notice - Rev.003
© 2012 ROHM Co., Ltd. All rights reserved.
Datasheet
●Other Precaution
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information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
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This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
3)
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
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In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
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Notice - Rev.003
© 2012 ROHM Co., Ltd. All rights reserved.
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