1/4 Structure Silicon monolithic integrated circuit Product Name System LSI for Event data recorder Type BU1511KV2 Function ○ BU1511KV2 is a system LSI for event data recorder that makes developing it easier BU1511KV2 have built-in specific hardware to communicate and control with a 3-axis accelerometer and a camera module, SD card, etc. that are recommended for event data recorder. The specific hardware are controllerable by built-in ARM946E-S, which can execute various applications. The following function blocks are built-in. ･ARM946E-S ･Interrupt Controller ･External Memory Interface ･Timer/Timer Counter ･GPIO(16ch, PWM 4ch(shared), IRQ 4ch(shared)) ･UART(2ch) ･SD Card Interface/SD Card Controller ･I2C Master Controller ･SSI(Synchronous Serial Interface) ･Camera Interface (up to 2M pixels) ･Watch Dog Timer ･JPEG Codec ･ADPCM Audio Codec with IIS Interface ･Clock Controller/PLL ･TV Encoder(within 75Ω driver) ･A/D Converter(4ch) Absolute maximum ratings Parameter Symbol Rating Unit Parameter Symbol Rating Unit Power supply voltage 1 (DAC) DAVDD -0.3～+4.2 V Input voltage（ADC） VIN1 -0.3～ADVDD+0.3 V Power supply voltage 2 (ADC) ADVDD -0.3～+4.2 V Input voltage（I2C-1） VIN2 -0.3～I1VDD+0.3 V Power supply voltage 3 (I2C-1) I1VDD -0.3～+4.2 V Input voltage（I2C-2） VIN3 -0.3～I2VDD+0.3 V Power supply voltage 4 (I2C-2) I2VDD -0.3～+4.2 V Input voltage（SD-CARD） VIN4 -0.3～SDVDD+0.3 V Power supply voltage 5 (SD-CARD) SDVDD -0.3～+4.2 V Input voltage（CAMERA） VIN5 -0.3～CAVDD+0.3 V Power supply voltage 6(CAMERA) CAVDD -0.3～+4.2 V Input voltage（Other IO） VIN6 -0.3～IOVDD+0.3 V Power supply voltage 7(Other IO) IOVDD -0.3～+4.2 V Storage temperature range Tstg -40～+150 ºC Power supply voltage 8(Digital CORE) DVDD -0.3～+2.1 V Power dissipation PD 1200*1, 1700*2 mW *1 IC only. In the case of exceeding 25C, 12.0 mW should be reduced at the rating 1C. *2 When packaging a glass epoxy board of 270x70x1.6mm. If exceeding 25ºC, 17mW should be reduced at the rating 1ºC. * Has not been designed to withstand radiation. Because this product is specifically designed for a particular device or unit, check in advance if the device or unit is a strategic material stated in the Foreign Exchange law. Be careful of handling this document because contents of this document may fall under the service (technology in the design, the manufacture and the use) defined in the Foreign Exchange and Foreign Trade Control law of Japan. REV.C 2/4 ○ Recommended operating conditions Parameter Power supply voltage 1 (DAC) Power supply voltage 2 (ADC) Power supply voltage 3 (I2C-1) Power supply voltage 4 (I2C-2) Power supply voltage 5 (SD-CARD) Power supply voltage 6 (CAMERA) Power supply voltage 7 (Other IO) Power supply voltage 8 (Digital CORE) Symbol Min Typ Max Unit Parameter Symbol Min Typ Max Unit Input voltage range ADVDD DAVDD 3.00 3.30 3.60 V VIN1 -0.3 V （ADC） +0.3 Input voltage range I1VDD ADVDD 3.00 3.30 3.60 V VIN2 -0.3 V （I2C-1） +0.3 Input voltage range I2VDD I1VDD 2.40 3.30 3.60 V VIN3 -0.3 V （I2C-2） +0.3 Input voltage range SDI1 I2VDD 2.40 3.30 3.60 V VIN4 -0.3 V （SD-CARD） VDD+0.3 Input voltage range CAVDD SDVDD 2.70 3.30 3.60 V VIN5 -0.3 V （CAMERA） +0.3 Input voltage range IOVDD CAVDD 2.30 2.85 3.30 V VIN6 -0.3 V （Other IO） +0.3 Output "H" Current -13 mA IOVDD 1.70 3.30 3.60 V IOH *1 Output "L Current 13 mA DVDD 1.45 1.50 1.55 V IOL *1 Operating temperature Topr -40 85 ºC range *1 Sum of absolute current of IOs in IOVDD system must be less than 100mA, and every sum of absolute current of IOs in CAVDD, SDVDD, I1VDD and I2VDD system must be less than 26mA. * Please supply power source in order of CORE(DVDD) → IO（IOVDD,CAVDD,SDVDD,I1VDD,I2VDD,ADVDD,DAVDD） * Please keep RESETB terminal is LOW, until power supply is stable. ○ Electric characteristics (Unless otherwise specified, DVDD=1.50V, DAVDD=ADVDD=I1VDD=I2VDD=SDVDD=IOVDD=3.30V, CAVDD=2.85V, DAVSS=ADVSS=DVSS=0.0V, Ta=25ºC, fXIN=13.5MHz, fAXIN=16.384MHz, fSYS=41.0MHz(Internal Clock with PLL) IOPWR is a generic name of I1VDD,I2VDD,SDVDD,CAVDD,IOVDD.) Parameter Common Input frequency 1 Input frequency 2 Internal clock frequency 1 Internal clock frequency 2 Static consumption current Logic Block Input "H" Leakcurrent Input "L" Leak current Input Pull down "H" current 1 Input Pull down "H" current 2 Input Pull down "L" current Input ”H” voltage 1 Input ”L” voltage 1 Input ”H” voltage 2 Input ”L” voltage 12 Output ”H” voltage 1 Output ”L” voltage 1 Output ”H” voltage 2 Output ”L” voltage 2 DACBlock DAC Bit Width DAC Operating current DAC Static consumption current Integral Non-linearity Differential Non-linearity Full scale voltage ADCBlock ADC Bit Width Input voltage range(Upper Limit) Input voltage range(Lower Limit) Integral Non-linearity Differential Non-linearity Change Standard clock cycle Change cycle Symbol Min Specification Max Unit fXIN fAXIN fSYS ｆAUD IDDST 5.0 8.284 - 30.0 32.768 41.0 32.768 200 MHz MHz MHz MHz μA IIHL IIHL IIHPD1 IIHPD2 IILPD VIH1 VIL1 VIH2 VIL2 VOH1 VOL1 VOH2 VOL2 -10 -10 25 25 -10 IOPWR×0.8 -0.3 IOPWR×0.85 -0.3 IOPWR-0.4 0.0 IOPWR-0.4 0.0 10 10 100 100 10 IOPWR+0.3 IOPWR×0.2 IOPWR+0.3 IOPWR×0.15 IOPWR 0.4 IOPWR 0.4 μA μA μA μA μA V V V V V V V V RES_DA IDDDA IDDSTDA INL_DA DNL_DA VFS_DA 32 -8.0 -2.0 1.1 10 42 5 +8.0 +2.0 1.4 bits mA uA LSB LSB V 8 ADVDD×0.95 ADVDD×0.15 +2.0 +2.0 16.0 bits V V LSB LSB MHz 123K sps RES_AD VIN_AD_T ADVDD×0.85 VIN_AD_B ADVDD×0.05 INL_AD -2.0 DNL_AD -2.0 ｆADC 4.0 fsps 30.8K REV. C Conditions XIN (Duty 50±10%), When PLL is ON. AXIN(Duty 50±10%) When PLL is ON, Except I2S Audio Block I2S Audio Block When all clock stop VIH=IOPWR VIL=０V Pull down pin, VIH=IOVDD Pull down pin, VIH=CAVDD Pull down pin, VIL=０V Normal Input Normal Input Hysteresis input pin (TIM_TRIG,NTRST,RESETB,BIT_SEL,TCM_SEL,AUTO_READ) IOH=-2.0mA(DC), Output except SD_CLK, When CAVDD=3.3V IOL=2.0mA(DC), Output except SD_CLK, When CAVDD=3.3V. IOH=-4.0mA(DC)、SD_CLK IOL=4.0mA(DC)、SD_CLK RL=37.5Ω、RIREF=2.4kΩ、DAVDD Pin current RL=37.5Ω、RIREF=2.4kΩ、DAVDD Pin current RL=37.5Ω、RIREF=2.4kΩ RL=37.5Ω、RIREF=2.4kΩ RL=37.5Ω、RIREF=2.4kΩ Sample per second Need 130*ADC_CLK for conversion by sweeping 3/4 ○Pin Function Descriptions PIN No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin Name EXT_ADR20 EXT_ADR19 EXT_ADR18 EXT_ADR17 EXT_ADR16 EXT_ADR15 EXT_ADR14 EXT_ADR13 EXT_ADR12 EXT_ADR11 EXT_ADR10 EXT_ADR9 EXT_ADR8 EXT_ADR7 EXT_ADR6 EXT_ADR5 IOVDD DVSS EXT_ADR4 EXT_ADR3 EXT_ADR2 EXT_ADR1 EXT_DATA15 EXT_DATA14 EXT_DATA13 EXT_DATA12 IOVDD DVSS EXT_DATA11 EXT_DATA10 EXT_DATA9 EXT_DATA8 EXT_DATA7 EXT_DATA6 EXT_DATA5 EXT_DATA4 EXT_DATA3 EXT_DATA2 EXT_DATA1 EXT_DATA0 EXT_CSB2 EXT_CSB1 EXT_CSB0 EXT_WEB EXT_OEB EXT_WPB SSI_CLK SSI_CSB1 ○ Physical dimensions Function External Bus --- External Bus --- External Bus Serial PIN No. 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 Pin Name SSI_CSB0 SSI_WPB SSI_DOUT SSI_DIN DVDD TIM_TRIG GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO9 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 IOVDD DVSS GPIO3 GPIO2 GPIO1 GPIO0 TX1 RX1 RTS1 CTS1 TX2 RX2 TDI TDO TCK TMS NTRST AUDCKI AUDLRI AUDDTI AUDCKO AUDLRO AUDDTO AUDMCKO IOVDD DVSS DVDD RESETB TEST BIT_SEL Function PIN No. 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 Serial -Counter trigger GPIO GPIO/PWM --GPIO/IRQ UART1 UART2 JTAG I2S input Interface I2S output Interface ---System setting Pin Name TCM_SEL AUTO_READ ADVDD ADVSS ADIN3 ADIN2 ADIN1 ADIN0 VOUT DAVSS IREF DAVDD I1VDD DVSS SDC1 SDA1 SDC2 SDA2 I2VDD CAMCKO CAVDD CAMHS CAMVS CAMD7 CAMD6 CAMD5 CAMD4 DVDD CAMD3 CAMD2 CAMD1 CAMD0 CAMCKI SD_CLK SD_CMD SD_DAT3 SD_DAT2 SD_DAT1 SD_DAT0 SDVDD DVSS AXIN AXOUT IOVDD XIN XOUT DVSS EXT_ADR21 Function System setting --ADC input Video output (75Ω) -Video output Reference ---I2C Master Interface -Camera Interface -- Camera Interface -- Camera Interface SD card Interface --Clock input or X'tal -Clock input or X'tal -External Bus ○ Block diagram JTAG Serial EEPROM/FLASH FLASH,SRAM Camera Module Amp,MIC Imaging Bock 画像処理ブロック Camera I-TCM 64KB I-Cache IF 4KB IIS IF / ADPCM Codec JPEG BU1511KV2 D-Cache Auto Read SPI Controller ARM946E-S 4KB External Memory Controller Register Codec D-TCM 4KB AHB 1PIN mark Lot No. Timer WatchDog AHB/APB Interrupt 2ch timer Bridge Controller I2C SD TV Master Controller Encoder I2C Slave SD Card TV monitor APB VQFP-T144 (Unit:mm) Timer UART Clock 2ch GPIO 16ch (IRQ 4ch /PWM 4ch) ADC Counter 4ch Controller Sensor UART PHY LED,Buzzer Sensor X'tal, Clock Source REV. C PLL 4/4 ○ Cautions on use (1) Absolute Maximum Ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) Recommended Operating conditions These conditions represent a range within which characteristics can be provided approximately as expected. The electrical characteristics are guaranteed under the conditions of each parameter. (3) Reverse connection of power supply connector The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to the reverse connection, such as mounting an external diode between the power supply and the IC’s power supply terminal. (4) Power supply line Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard, for the digital block power supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner. Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (5) GND voltage Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient. (6) Short circuit between terminals and erroneous mounting In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the GND terminal, the ICs can break down. (7) Operation in strong electromagnetic field Be noted that using ICs in the strong electromagnetic field can malfunction them. (8) Inspection with set PCB On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress. Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the storage of the set PCB. (9) Input terminals In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics. (10) Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. (11) External capacitor In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc. REV. C Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. 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