Stepping Motor Drivers Standard 36V Stepping Motor Driver BD6290EFV No.12009EAT03 ●Description BD6290EFV is the simple type that provides the minimum function for driving stepping motor and various protection circuits. As for its basic function, it is a low power consumption bipolar PWM constant current-drive driver with power supply’s rated voltage of 36V and rated output current of 0.8A. There are excitation modes of FULL STEP & HALF STEP &, QUARTER STEP mode. This IC contributes to reduction of mounting area, cost down, safety design. ●Feature 1) Power supply: one system drive (rated voltage of 36V) 2) Rated output current: 0.8A 3) Low ON resistance DMOS output 4) Parallel IN drive mode 5) PWM constant current control (self oscillation) 6) Built-in spike noise cancel function (external noise filter is unnecessary) 7) FULL STEP, HALF STEP, QUARTER STEP 8) Power save function 9) Built-in logic input pull-down resistor 10) Power-on reset function 11) Thermal shutdown circuit (TSD) 12) Over current protection circuit (OCP) 13) Under voltage lock out circuit (UVLO) 14) Over voltage lock out circuit (OVLO) 15) Malfunction prevention at the time of no applied power supply (Ghost Supply Prevention Function) 16) Electrostatic discharge: 4kV (HBM specification) 17) Microminiature, ultra-thin and high heat-radiation (exposed metal type) HTSSOP package (BD6391EFV) ●Application Laser beam printer, Scanner, Photo printer, FAX, Ink jet printer, Mini printer, Sewing machine, Toy, and Robot etc. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 1/8 2012.02 - Rev.A Technical Note BD6290EFV ●Absolute maximum ratings(Ta=25℃) Item Supply voltage Symbol VM1,2 Power dissipation Pd Input voltage for control pin RNF maximum voltage Maximum output current Operating temperature range Storage temperature range Junction temperature ※1 ※2 ※3 VIN VRNF IOUT Topr Tstg Tjmax Limit -0.2～+36.0 1 1.10※ ※2 4.00 Unit V -0.2～+7.0 0.5 0.8※3 -25～+85 -55～+150 150 V V A/phase ℃ ℃ ℃ W 70mm×70mm×1.6mm glass epoxy board. Derating in done at 8.8mW/℃ for operating above Ta=25℃. 4-layer recommended board. Derating in done at 32.0mW/℃ for operating above Ta=25℃. Do not, however exceed Pd, ASO and Tjmax=150℃. ●Operating conditions(Ta= -25～+85℃) Item Supply voltage Output current (DC) Symbol VM1,2 IOUT Limit 19～28 0.5※4 Unit V A/phase ※4 Do not however exceed Pd, ASO. ●Electrical characteristics (Unless otherwise specified Ta=25℃, VM=24V) Item Symbol Min. Whole Circuit current at standby IVMST Circuit current IVM Control input (PHA1, I01, I11, PHA2, I02, I12, P.S.) H level input voltage VPSH 2.0 L level input voltage VPSL H level input current IPSH 25 L level input current IPSL Output (OUT1A, OUT1B, OUT2A, OUT2B) Output ON resistance Output leak current Current control RNFX input current VREF input current VREF input voltage range Comparator threshold 100% Comparator threshold 67% Comparator threshold 33％ Minimum on time www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. Limit Typ. Max. 0.6 3.0 1.5 7.0 mA mA PS=L PS=H, VREF=2V 50 0 5.5 0.8 80 10 V V μA μA Control input voltage=5V Control input voltage=0V Unit Condition IOUT =±0.3A Sum of upper and lower RON - 2.80 3.60 Ω ILEAK - - 10 μA IRNFX IVREF VREF -40 -2.0 0 -20 -0.1 - 2 μA μA V VCTHLL 0.340 0.400 0.460 V VREF=2V,I0X=L,I1X=L VCTHHL 0.227 0.267 0.307 V VREF=2V,I0X=H,I1X=L VCTHLH 0.113 0.133 0.153 V VREF=2V,I0X=L,I1X=H tONMIN 0.3 0.5 1.0 μs 2/8 RNFX=0V VREF=0V R=39kΩ, C=1000pF 2012.02 - Rev.A Technical Note BD6290EFV ●Terminal function･Block diagram･Application circuit diagram Pin No. Pin name 1 PHA1 2 PGND 3 VM1 4 OUT1A 5 RNF1 6 OUT1B 7 OUT2B Pin No. Pin name Logic input terminal 13 I02 Logic input terminal for DAC Function Function Ground terminal 14 I12 Logic input terminal for DAC Power supply terminal 15 NC Non connection H bridge output terminal 16 CR2 Connection terminal of CR for setting PWM frequency Connection terminal of resistor for output current detection 17 TEST Terminal for testing (used by connecting with GND) H bridge output terminal 18 NC Non connection Ground terminal H bridge output terminal 19 GND Connection terminal of resistor for output current detection 20 PS H bridge output terminal 21 CR1 Connection terminal of CR for setting PWM frequency Output current value setting terminal 8 RNF2 9 OUT2A 10 VM2 Power supply terminal 22 VREF 11 NC Non connection 23 I11 Logic input terminal for DAC 12 PHA2 Logic input terminal 24 I01 Logic input terminal for DAC Set the PWM frequency. Setting range is C:470pF～4700pF R:10kΩ～100kΩ. Resistor for current. detecting. Setting range is 0.3Ω～0.82Ω. VM1 OUT1A PHA1 CR1 39kΩ 1000pF I01 ONE SHOT LOGIC Predriver OUT1B RNF1 DAC Current Limit Comp. PHA2 39kΩ CR2 ONE SHOT I02 DAC 1000pF VREF Buffer Be sure to short VM1 & VM2. LOGIC VM2 0.1uF OUT2A Predriver 0.2Ω Bypass capacitor. Setting range is 100uF～470uF(electrolytic) 0.01uF～0.1uF(multilayer ceramic etc.) OCP Current Limit Comp. TEST Regulator RESET PGND GND 100uF OUT2B RNF2 I12 Set the PWM frequency. Setting range is C:470pF～4700pF R:10kΩ～100kΩ. 0.2Ω OCP I11 Power save terminal TSD OVLO Resistor for current. detecting. Setting range is 0.3Ω～0.82Ω. PS UVLO Terminal for testing. Please connect to GND. Fig.1 Block diagram & Application circuit diagram www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 3/8 2012.02 - Rev.A Technical Note BD6290EFV ●Points to notice for terminal description ○PS／Power save terminal PS can make circuit standby state and make motor output OPEN. Please be careful because there is a delay of 40μs(max.) before it is returned from standby state to normal state and the motor output becomes ACTIVE. PS State L H Standby state (RESET) ACTIVE ○PHA1,PHA2／Logic input terminal These terminals decide output state. PHAX OUTXA L H L H OUTXB H L ○I01,I02,I11,I12／Logic input terminal for DAC These terminals decide internal DAC output voltage for current limit. Output current I0X I1X level(%) L L H L L H H H (I0X,I1X)=(H,H) : motor output are open. 100 67 33 0 ●Protection Circuits ○Thermal Shutdown (TSD) This IC has a built-in thermal shutdown circuit for thermal protection. When the IC’s chip temperature rises above 175℃ (Typ.), the motor output becomes OPEN. Also, when the temperature returns to under 150℃ (Typ.), it automatically returns to normal operation. However, even when TSD is in operation, if heat is continued to be added externally, heat overdrive can lead to destruction. ○Over Current Protection (OCP) This IC has a built in over current protection circuit as a provision against destruction when the motor outputs are shorted each other or VM－motor output or motor output－GND is shorted. This circuit latches the motor output to OPEN condition when the regulated threshold current flows for 4μs (Typ.). It returns with power reactivation or a reset of the PS terminal. The over current protection circuit’s only aim is to prevent the destruction of the IC from irregular situations such as motor output shorts, and is not meant to be used as protection or security for the set. Therefore, sets should not be designed to take into account this circuit’s functions. After OCP operating, if irregular situations continue and the return by power reactivation or a reset of the PS terminal is carried out repeatedly, then OCP operates repeatedly and the IC may generate heat or otherwise deteriorate. When the L value of the wiring is great due to the wiring being long, after the over current has flowed and the output terminal voltage jumps up and the absolute maximum values may be exceeded and as a result, there is a possibility of destruction. Also, when current which is over the output current rating and under the OCP detection current flows, the IC can heat up to over Tjmax =150℃ and can deteriorate, so current which exceeds the output rating should not be applied. ○Under Voltage Lock Out (UVLO) This IC has a built-in under voltage lock out function to prevent false operation such as IC output during power supply under voltage. When the applied voltage to the VM terminal goes under 15V (Typ.), the motor output is set to OPEN. This switching voltage has a 1V (Typ.) hysteresis to prevent false operation by noise etc. Please be aware that this circuit does not operate during power save mode. ○Over Voltage Lock Out (OVLO) This IC has a built-in over voltage lock out function to protect the IC output and the motor during power supply over voltage. When the applied voltage to the VM terminal goes over 32V (Typ.), the motor output is set to OPEN. This switching voltage has a 1V (Typ.) hysteresis and a 4μs (Typ.) mask time to prevent false operation by noise etc. Although this over voltage locked out circuit is built-in, there is a possibility of destruction if the absolute maximum value for power supply voltage is exceeded, therefore the absolute maximum value should not be exceeded. Please be aware that this circuit does not operate during power save mode. ○False operation prevention function in no power supply (Ghost Supply Prevention) If a logic control signal is input when there is no power supplied to this IC, there is a function which prevents the false operation by voltage supplied via the electrostatic destruction prevention diode from the logic control input terminal to the VM, to this IC or to another IC’s power supply. Therefore, there is no malfunction of the circuit even when voltage is supplied to the logic control input terminal while there is no power supply. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 4/8 2012.02 - Rev.A Technical Note BD6290EFV ●Power dissipation ○HTSSOP-B24 Package HTSSOP-B24 has exposed metal on the back, and it is possible to dissipate heat from a through hole in the back. Also, the back of board as well as the surfaces has large areas of copper foil heat dissipation patterns, greatly increasing power dissipation. The back metal is shorted with the back side of the IC chip, being a GND potential, therefore there is a possibility for malfunction if it is shorted with any potential other than GND, which should be avoided. Also, it is recommended that the back metal is soldered onto the GND to short. Please note that it has been assumed that this product will be used in the condition of this back metal performed heat dissipation treatment for increasing heat dissipation efficiency. Measurement machine：TH156（Kuwano Electric） Measurement condition：ROHM board 3 Board size：70*70*1.6mm (With through holes on the board) The exposed metal of the backside is connected to the board with solder. 2 Board①：1-layer board(Copper foil on the back 0mm ) 2 Board②：2-layer board(Copper foil on the back 15*15mm ) 2 Board③：2-layer board(Copper foil on the back 70*70mm ) 2 Board④：4-layer board(Copper foil on the back 70*70mm ) 5.0 Power Dissipation：Pd[W] 4.0 3.0 2.0 4.0W 4 2.8W 3 1.7W 2 1.1W 1 Board①：θja =113.6℃/W Board②：θja =73.5℃/W Board③：θja =44.6℃/W Board④：θja =31.3℃/W 1.0 0 100 125 Ambient Temperature:Ta[℃] Fig.2 HTSSOP-B24 Derating curve www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 5/8 2012.02 - Rev.A Technical Note BD6290EFV ●Usage Notes (1) Absolute maximum ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. (2) Connecting the power supply connector backward Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply lines. An external direction diode can be added. (3) Power supply Lines Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line, separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the circuit, not that capacitance characteristic values are reduced at low temperatures. (4) GND Potential The potential of GND pin must be minimum potential in all operating conditions. (5) Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. Users should be aware that BD6290EFV has been designed to expose their frames at the back of the package, and should be used with suitable heat dissipation treatment in this area to improve dissipation. As large a dissipation pattern should be taken as possible, not only on the front of the baseboard but also on the back surface. (6) Inter-pin shorts and mounting errors When attaching to a printed circuit board, pay close attention to the direction of the IC and displacement. Improper attachment may lead to destruction of the IC. There is also possibility of destruction from short circuits which can be caused by foreign matter entering between outputs or an output and the power supply or GND. (7) Operation in a strong electric field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. (8) ASO When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO. (9) Thermal shutdown circuit The IC has a built-in thermal shutdown circuit (TSD circuit). If the chip temperature becomes Tjmax =150℃, and higher, coil output to the motor will be open. The TSD circuit is designed only to shut the IC off to prevent runaway thermal operation. It is not designed to protect or indemnify peripheral equipment. Do not use the TSD function to protect peripheral equipment. TSD on temperature [℃] (Typ.) 175 Hysteresis Temperature [℃] 25 (Typ.) (10) Inspection of the application board During inspection of the application board, if a capacitor is connected to a pin with low impedance there is a possibility that it could cause stress to the IC, therefore an electrical discharge should be performed after each process. Also, as a measure again electrostatic discharge, it should be earthed during the assembly process and special care should be taken during transport or storage. Furthermore, when connecting to the jig during the inspection process, the power supply should first be turned off and then removed before the inspection. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 6/8 2012.02 - Rev.A Technical Note BD6290EFV (11) Input terminal of IC This IC is a monolithic IC, and between each element there is a P+ isolation for element partition and a P substrate. This P layer and each element’s N layer make up the P-N junction, and various parasitic elements are made up. For example, when the resistance and transistor are connected to the terminal as shown in figure 3, ○When GND＞(Terminal A) at the resistance and GND＞(Terminal B) at the transistor (NPN), the P-N junction operates as a parasitic diode. ○Also, when GND＞(Terminal B) at the transistor (NPN) The parasitic NPN transistor operates with the N layers of other elements close to the aforementioned parasitic diode. Because of the IC’s structure, the creation of parasitic elements is inevitable from the electrical potential relationship. The operation of parasitic elements causes interference in circuit operation, and can lead to malfunction and destruction. Therefore, be careful not to use it in a way which causes the parasitic elements to operate, such as by applying voltage that is lower than the GND (P substrate) to the input terminal. Resistor Transistor (NPN) Pin A Pin B C Pin A N P+ N P P+ N Pin B B E N Parasitic element P+ N P GND P+ B N E P substrate P substrate Parasitic element C Parasitic element GND GND GND Parasitic element Other adjacent elements Fig.3 Pattern Diagram of Parasitic Element (12) Ground Wiring Patterns When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern potential of any external components, either. (13) TEST Terminal Be sure to connect TEST pin to GND. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 7/8 2012.02 - Rev.A Technical Note BD6290EFV ●Ordering part number B D 6 2 9 E 0 F V パッケージ EFV=HTSSOP-B24 形名 - E2 包装、フォーミング仕様 E2: リール状エンボステーピング HTSSOP-B24 <Tape and Reel information> 7.8±0.1 (MAX 8.15 include BURR) (5.0) 1.0±0.2 0.53±0.15 (3.4) 1 0.325 Tape Embossed carrier tape (with dry pack) Quantity 2000pcs Direction of feed E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) 12 1PIN MARK +0.05 0.17 -0.03 S 0.08±0.05 0.85±0.05 1.0MAX +6° 4° −4° 13 5.6±0.1 7.6±0.2 24 0.65 0.08 S +0.05 0.24 -0.04 0.08 1pin M Reel (Unit : mm) www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 8/8 Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. 2012.02 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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