Sony ILX555K 10680 pixel ã 3 line ccd linear sensor (color) Datasheet

ILX555K
10680 pixel × 3 line CCD Linear Sensor (Color)
Description
The ILX555K is a reduction type CCD linear sensor
developed for color image scanner. This sensor
reads A4-size documents at a density of 1200DPI.
19
GND
φROG-B
9
Blue
Green
φ2
7
15
φ1
φ2
14 φROG-G
Driver
Driver
8
Driver
φROG-R
1
R
10680
1
G
10680
1
B
10680
D18
D19
NC 11
D69
S1
NC 10
21
14 φROG-G
2
9
φ1
φROG-B
3
15 φ1
φRS
8
6
φROG-R
VDD
16 NC
4
7
GND
φ2
CCD register
17 VOUT-R
Read out gate
6
Output
amplifier
VDD
VOUT-B 18
18 VOUT-B
CCD register
5
5
VOUT-G
VOUT-G
19 GND
Read out gate
4
Output
amplifier
GND
CCD register
Red
20 GND
Output
amplifier
3
VOUT-R 17
φRS
Read out gate
20
GND
21 φ2
D18
D19
2
D18
D19
φ1
22 NC
D69
S1
1
D69
S1
S10680
D70
NC
S10680
D70
Pin Configuration (Top View)
S10680
D70
V
°C
D74
D75
15
–10 to +55
D74
D75
Absolute Maximum Ratings
• Supply voltage
VDD
• Operating temperature
Block Diagram
D74
D75
Features
• Number of effective pixels:
32040 pixels (10680 pixels × 3)
• Pixel size:
3.5µm × 3.5µm (3.5µm pitch)
• Distance between line: 28µm (8 lines)
• Single-sided readout
• Ultra low lag
• Single 12V power supply
• Maximum data rate: 5MHz/Color
• Input Clock Pulse: CMOS 5V drive
• Number of output 3 (R, G, B)
• Package:
22 pin Plastic DIP (400mil)
22 pin DIP (Plastic)
13 NC
12 NC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E01114A18-PS
ILX555K
Pin Description
Pin No.
Symbol
Description
Pin No.
Symbol
Description
1
NC
NC
12
NC
NC
2
φ1
Clock pulse input
13
NC
NC
3
φRS
Clock pulse input
14
φROG-G
Clock pulse input
4
GND
GND
15
φ1
Clock pulse input
5
VOUT-G
Signal output (green)
16
NC
NC
6
VDD
12V power supply
17
VOUT-R
Signal output (red)
7
φ2
Clock pulse input
18
VOUT-B
Signal output (blue)
8
φROG-R
Clock pulse input
19
GND
GND
9
φROG-B
Clock pulse input
20
GND
GND
10
NC
NC
21
φ2
Clock pulse input
11
NC
NC
22
NC
NC
Recommended Supply Voltage
Item
VDD
Min.
Typ.
Max.
Unit
11.4
12.0
12.6
V
Clock Characteristics
Item
Symbol
Min.
Typ.
Max.
Unit
Input capacity of φ1, φ2
Cφ1, Cφ2
—
1200
—
pF
Input capacity of φRS
CφRS
—
10
—
pF
Input capacity of φROG
CφROG
—
10
—
pF
Clock Frequency
Item
Symbol
φ1, φ2, φRS
fφ1, fφ2, fφRS
Min.
Typ.
Max.
Unit
—
1
5
MHz
Input Clock Pulse Voltage Condition
Item
φ1, φ2, φRS, φROG pulse
voltage
Min.
Typ.
Max.
Unit
High level
4.75
5.0
5.25
V
Low level
—
0
0.1
V
–2–
ILX555K
Electrooptical Characteristics (Note 1)
(Ta = 25°C, VDD = 12V, fφRS = 1MHz, Input clock = 5Vp-p,
Light source = 3200K, IR cut filter CM-500S (t = 1.0mm))
Item
Sensitivity
Symbol
Min.
Typ.
Max.
Red
RR
0.98
1.5
2.02
Green
RG
0.98
1.5
2.02
Blue
RB
0.85
1.3
1.75
Unit
Remarks
V/(lx · s)
Note 2
Sensitivity nonuniformity
PRNU
—
4
20
%
Note 3
Saturation output voltage
VSAT
1.5
1.8
—
V
Note 4
Red
SER
0.74
1.20
—
Green
SEG
0.74
1.20
—
lx · s
Note 5
Blue
SEB
0.86
1.38
—
Dark voltage average
VDRK
—
2
5
mV
Dark signal nonuniformity
DSNU
—
4
12
mV
Image lag
IL
—
0.02
—
%
Supply current
IVDD
—
30
50
mA
Total transfer efficiency
TTE
92
98
—
%
Output impedance
ZO
—
360
—
Ω
Offset level
VOS
—
4.7
—
V
Saturation exposure
Note 6
Note 7
Note 8
Notes)
1. In accordance with the given electrooptical characteristics, the black level is defined as the average value of
D18, D19 to D67.
2. For the sensitivity test light is applied with a uniform intensity of illumination.
3. PRNU is defined as indicated below. Ray incidence conditions are the same as for Note 2.
VOUT = 500mV (Typ.)
PRNU =
(VMAX – VMIN)/2
VAVE
× 100 [%]
4. Use below the minimum value of the saturation output voltage.
5. Saturation exposure is defined as follows.
SE =
VSAT
R
Where R indicates RR, RG, RB, and SE indicates SER, SEG, SEB.
6. Optical signal accumulated time τ int stands at 5.5ms.
7. VOUT-G = 500mV (Typ.)
8. Vos is defined as indicated bellow.
VOUT
VOUT indicates VOUT-R, VOUT-G and VOUT-B.
VOS
GND
–3–
Clock Timing Chart 1
10755
4
3
2
0
5
0
5
D75
D74
D71
D70
S10680
S10679
S10678
S2
S1
D69
D68
D67
D19
D18
D17
0
D1
–4–
φRS
5
D3
φ2
0
D2
φ1
5
1
φROG
VOUT
Optical black (50 pixels)
Dummy signal (69 pixels)
1-line output period (10755 pixels)
Note) The transfer pulses (φ1, φ2) must have more than 10755 cycles.
VOUT indicates VOUT-R, VOUT-G, VOUT-B.
φROG indicates φROG-R, φROG-G, φROG-B.
ILX555K
ILX555K
Clock Timing Chart 2
t4
t5
φROG
t2
t6
φ1
t7
t1
t3
φ2
Clock Timing Chart 3
t6
t7
φ1
φ2
t9
φRS
t10
t8
t12
t11
VOUT
–5–
ILX555K
Clock Pulse Recommended Timing
Item
Symbol
Min.
Typ.
Max.
Unit
φROG, φ1 pulse timing
t1
50
100
—
ns
φROG pulse high level period
t2
3
5
—
µs
φROG, φ1 pulse timing
t3
1
2
—
µs
φROG pulse rise time
t4
0
5
—
ns
φROG pulse fall time
t5
0
5
—
ns
φ1 pulse rise time/φ2 pulse fall time
t6
0
20
—
ns
φ1 pulse fall time/φ2 pulse rise time
t7
0
—
ns
φRS pulse high level period
t8
30
20
50∗1
—
ns
φRS pulse rise time
t9
0
20
—
ns
φRS pulse fall time
t10
0
20
—
ns
t11
—
40
—
ns
t12
—
20
—
ns
Signal output delay time
∗1 These timing is the recommended condition under fφRS = 1MHz.
–6–
Application Circuit∗
φ2
5.1kΩ
VOUT-B
φROG-G
φ1
5.1kΩ
VOUT-R
IC1
IC1
Tr1
2Ω
Tr1
100Ω
0.1µF
47µF/16V
NC
φ1
φROG-G
φ2
φROG-R
φROG-B
NC
NC
3
4
5
6
7
8
9
10
11
2Ω
100Ω
2Ω
100Ω
100Ω
100Ω
Tr1
IC1
φ1
φRS
VOUT-G
5.1kΩ
NC
VOUT-R
VDD
2
NC
VOUT-B
12
1
–7–
12V
13
VOUT-G
14
GND
15
GND
16
GND
17
φRS
18
φ2
19
φ1
20
NC
21
100Ω
NC
22
2Ω
100Ω
IC1
φ2
φROG-R
φROG-B
IC1: 74AC04
Tr1: 2SC2785
∗ Data rate fφRS = 1MHz
ILX555K
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
ILX555K
Example of Representative Characteristics (VDD = 12V, Ta = 25°C)
Spectral sensitivity characteristics (Standard characteristics)
1.0
Relative sensitivity
0.8
0.6
0.4
0.2
0
400
450
500
550
600
Wavelength [nm]
Dark voltage rate vs. Ambient temperature
(Standard characteristics)
10
Output voltage rate
Dark voltage rate
700
Output voltage rate vs. Integration time
(Standard characteristics)
100
10
1
0.1
–10
650
1
0.1
0
10
20
30
40
50
Ta – Ambient temperature [˚C]
60
1
Offset level vs. Supply voltage
(Standard characteristics)
5
τ int – Integration time [ms]
10
Offset level vs. Ambient temperature
(Standard characteristics)
10
10
Ta = 25˚C
8
Vos – Offset level [V]
Vos – Offset level [V]
8
6
4
∆Vos
≈ 0.7
∆VDD
2
0
11.4
6
4
∆Vos
≈ 3mV/˚C
∆Ta
2
12
VDD – Supply voltage [V]
0
–10
12.6
–8–
0
10
20
30
40
50
Ta – Ambient temperature [˚C]
60
ILX555K
Notes of Handling
1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following
protective measures.
a) Either handle bare handed or use non chargeable gloves, clothes or material.
Also use conductive shoes.
b) When handling directly use an earth band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) Ionized air is recommended for discharge when handling CCD image sensor.
e) For the shipment of mounted substrates, use boxes treated for prevention of static charges.
2) Notes on Handling CCD Packages
The following points should be observed when handling and installing packages.
a) Remain within the following limits when applying static load to the package:
(1) Compressive strength: 39N/surface (Do not apply load more than 0.7mm inside the outer perimeter
of the glass portion.)
(2) Shearing strength: 29N/surface
(3) Tensile strength: 29N/surface
(4) Torsional strength: 0.9Nm
Cover glass
Plastic portion
Ceramic portion
39N
(1)
Adhesive
29N
29N
(2)
(3)
0.9Nm
(4)
b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be
generated and the package may fracture, etc., depending on the flatness of the ceramic portion.
Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive.
c) Be aware that any of the following can cause the package to crack or dust to be generated.
(1) Applying repetitive bending stress to the external leads.
(2) Applying heat to the external leads for an extended period of time with soldering iron.
(3) Rapid cooling or heating.
(4) Prying the plastic portion and ceramic portion away at a support point of the adhesive layer.
(5) Applying the metal a crash or a rub against the plastic portion.
Note that the preceding notes should also be observed when removing a component from a board after
it has already been soldered.
3) Soldering
a) Make sure the package temperature does not exceed 80°C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded 30W
soldering iron and solder each pin in less then 2 seconds. For repairs and remount, cool sufficiently.
c) To dismount an imaging device, do not use a solder suction equipment. When using an electric desoldering
tool, ground the controller. For the control system, use a zero cross type.
–9–
ILX555K
4) Dust and dirt protection
a) Operate in clean environments.
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should
dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized
air is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch
the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
5) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or
usage in such conditions.
6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks.
– 10 –
Package Outline
Unit: mm
22 pin DIP (400mil)
37.38 (3.5µm × 10680Pixels)
H
No.1 Pixel (Green)
0.25
V
10.16
12
22
10.0 ± 0.3
10.2 ± 0.3
5.0 ± 0.3
0˚ to 9˚
55.7 ± 0.3
11
1
4.95 ± 0.6
0.51
0.3
4.28 ± 0.5
3.58
4.0 ± 0.5
– 11 –
2.54
M
1. The height from the bottom to the sensor surface is 2.38 ± 0.3mm.
2. The thickness of the cover glass is 0.7mm, and the refractive in 1.5.
Plastic, Ceramic
LEAD TREATMENT
GOLD PLATING
LEAD MATERIAL
42 ALLOY
PACKAGE MASS
5.43g
DRAWING NUMBER
LS-B30(E)
ILX555K
Sony Corporation
PACKAGE MATERIAL
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