ROHM BD9859EFJ

Single-chip Type with built-in FET Switching Regulator Series
Simple Step-down
Switching Regulators
with Built-in Power MOSFET
No.10027EAT43
BD9859EFJ
●Summary
Output 3.0A and below High Efficiency Rate Step-down Switching Regulator Power MOSFET Internal Type BD9859EFJ
mainly used as secondary side Power supply, for example from fixed Power supply of 9V, 12V etc, Step-down Output
of 1.2V/1.8V/3.3V/5V, etc, can be produced.
This IC has external Coil/Capacitor down-sizing through 750kHz High Frequency operation, inside Nch-FET SW for 15V
“withstand-pressure” commutation and also, High Speed Load Response through Current Mode Control is a simple
external setting Phase compensation System, through a wide range external constant, a compact Power supply can be
produced easily.
●Features
1)
2)
3)
4)
5)
6)
7)
8)
Internal 100 mΩ Nch MOSFET
Output Current 3A
Oscillation Frequency 750kHz
Feedback Voltage 1.0V±1.0%
Internal Soft Start Function
Internal Over Current Protect Circuit, Low Input Error Prevention Circuit, Heat Protect Circuit
ON/OFF Control through EN Pin (Standby Current 0μA Typ.)
Package :HTSOP-J8 Package
●Uses
For Household machines in general that have 9V/12V Lines, etc.
●Operating Conditions (Ta=25℃)
Item
Symbol
Voltage Range
Unit
Power supply Voltage
VCC
5.0~14
V
Output Voltage
VOUT
1.0
V
●Absolute Maximum Rating
Item
Symbol
Rating
Unit
Maximum Application Power supply Voltage
VCC
15
V
Between BST – GND
VBST
22
V
Between BST – Lx
⊿VBST
7
V
Between EN – GND
VEN
15
V
Between Lx – GND
VLx
15
V
Between FB – GND
VFB
7
V
Between VC – GND
VC
7
V
Highside NchFET Drain Current
IDH
3
A
Power Dissipation
Pd
3.76
W
Operating Temperature Range
Topr
-40~+85
℃
Storage Temperature Range
Tstg
-55~+150
℃
Junction Temperature
Tjmax
150
℃
(*1)During mounting of 70×70×1.6t mm 4layer board (Copper area:70mm×70mm).Reduce by 30.08mW for every 1℃ increase. (Above 25℃)
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1/15
2010.02 - Rev.A
Technical Note
BD9859EFJ
●Electrical Characteristics
(Unless otherwise specified, Ta=25℃,VCC=12V, Vo=5V,EN=3V)
Item
Symbol
Min
Rating Value
Typ
Max
Unit
Conditions
【Circuit Current】
Circuit Current during Standby
Ist
-
0
10
uA
VEN=0V
Circuit Current during Operation
Icc
-
2.8
5.6
mA
FB=1.2V
【Low Voltage Input Error Prevention Circuit】
Detect Threshold Voltage
Vuv
4.2
4.4
4.6
V
Vuvhy
-
200
400
mV
fosc
675
750
825
kHz
Dmax
75
85
95
%
FB Pin Threshold Voltage
VFB
0.990
1.000
1.010
V
FB Pin Input Current
IFB
-1.0
0
1.0
uA
Hysteresis Width
【Oscillator】
Oscillation Frequency
Max Duty Cycle
【Error Amp】
Mutual Conductance
Gm
70
140
280
uA/V
Soft Start Time
Tsoft
2.0
4.0
6.0
ms
High Side Nch FET ON Resistance
RonH
-
100
200
mΩ
Nch FET ON Resistance for Pre-Charge
RonL
-
5
10
Ω
Over Current Detect Current
Iocp
3.5
5.5
-
A
ON
VENON
2.0
-
14
V
OFF
VENOF
F
-0.3
-
0.3
V
REN
2.5
7.5
15
uA
VFB=0V
IVC=±10uA,VC=1.5V
【Output-part】
【CTL】
EN Pin Threshold Voltage
EN Pin Input Current
VEN=3V
◎Not designed to withstand radiation.
●Pin Description
Pin No.
Pin Name
Function
1
Lx
2
GND
3
VC
Error Amp Output Pin
4
FB
Output Voltage Return Pin
5
EN
ON/OFF Control Pin
NMOSFET Source Pin
Ground Pin
6
BST
Capacitor Connection Pin for Bootstrap
7
VCC
Power supply Voltage Pin
8
VCC
Power supply Voltage Pin
Fig.1 Pin Layout Diagram
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2/15
2010.02 - Rev.A
Technical Note
BD9859EFJ
●Block Diagram
ON/OFF
EN
VCC
TSD
UVLO
Reference
REG
VREF
ICOMP
shutdown
FB
1.0V
BST
Σ
ERROR
- AMP
+
+
R Q
S 100mΩ
Lx
Soft
Start
VOUT
5Ω
GND
OSC
750kHz
VC
Fig.2 Block Diagram
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3/15
2010.02 - Rev.A
Technical Note
BD9859EFJ
●Block Description
1.
Reference
This Block generates Error Amp Standard Voltage.
Standard Voltage is 1.0V.
2.
REG
This is a Gate Drive Voltage Generator and 5VLow Saturation regulator for internal Circuit Power supply.
3.
OSC
This is a precise wave Oscillation Circuit with Operation Frequency fixed to 750kHz fixed.
4.
Soft Start
A Circuit that does Soft Start to the Output Voltage of DC/DC Comparator, and prevents Rush Current during
Start-up. Soft Start Time is set at IC internal, after 4mSecs from starting-up EN Pin, Standard Voltage comes to 1.0V,
and Output Voltage becomes set Voltage.
5.
ERROR AMP
This is an Error amplifier what detects Output Signal, and outputs PWM Control Signal.
Internal Standard Voltage is set to 1.0V.
Also, C and R are connected between the Output (VC) Pin GND of Error Amp as Phase compensation elements.
(See Page11)
6.
ICOMP
This is a Voltage-Pulse Width Converter that controls Output Voltage in response to Input Voltage.
This compares the Voltage added to the internal SLOPE waveform in response to the FET WS Current with Error
amplifier Output Voltage, controls the width of Output Pulse and outputs to Driver.
7. Nch FET SW
This is an internal commutation SW that converts Coil Current of DC/DC Comparator.
It contains 15V”withstand pressure” 100mΩSW.
Because the Current Rating of this FET is 3.0A, including Ripple Current of DC Current+Coil, please use at within
3.0A
8. UVLO
This is a Low Voltage Error Prevention Circuit.
This prevents internal circuit error during increase of Power supply Voltage and during decline of Power supply
Voltage.
It monitors VCC Pin Voltage and internal REG Voltage、And when VCC Voltage becomes 4.4V and below, it turns
OFF all Output FET and turns OFF DC/DC Comparator Output, and Soft Start Circuit resets.
Now this Threshold has Hysteresis of 200mV.
9. TSD
This is a Heat Protect (Temperature Protect) Circuit.
When it detects an abnormal temperature exceeding Maximum Junction Temperature (Tj=150℃), it turns OFF all
Output FET, and turns OFF DC/DC Comparator Output. When Temperature falls, it has/with Hysteresis and
automatically returns.
10. EN
With the Voltage applied to EN Pin(5pin), IC ON/OFF can be controlled.
When a Voltage of 2.0V or more is applied, it turns ON, at Open or 0V application, it turns OFF.
About 400kΩ Pull-down Resistance is contained within the Pin.
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4/15
2010.02 - Rev.A
Technical Note
BD9859EFJ
●Reference Data
(Unless otherwise specified, Ta=25℃,VCC=12V, Vo=5V,EN=3V)
6
6
0.5
5
5
0.4
4
0.3
0.2
VCC=14V
0.0
-60
VCC=7V
-40
-20
0
3
2
VCC=12V
0.1
Temp=85℃
Temp=25℃
20
40
60
80
100
VCC=12V
3
2
Temp=-40℃
VCC=7V
VCC=5V
1
1
0
0
Temp (°C)
VCC=15V
4
ICC(mA)
ICC(mA)
ICC (uA)
0.6
0
5
10
VCC(V)
-60 -40 -20 0 20 40 60
Temperature(°C)
15
80 100
Fig.3. Standby Current Temperature
Fig.4. Circuit Current Power supply Voltage
Fig.5. Circuit Current
Characteristics
Characteristics
Temperature Characteristics
6.0
800
High Threshold
Low Threshold
3.0
2.0
1.0
0.0
-60
VCC=14V
600
VCC=12V
VCC=7V
500
Max_Duty (%)
4.0
OSC_freq (KHz)
UVLO_th (V)
5.0
120.0
700
400
300
200
100.0
80.0
VCC=14V
VCC=12V
VCC=7V
60.0
100
-40
-20
0
20
40
60
80
0
-60
100
-40
-20
Temp (°C)
0
20
40
60
80
40.0
-60
100
-40
-20
Temp (°C)
0
20
40
60
80
Fig.6. UVLO Threshold
Fig.7. Oscillation Frequency
Fig.8. Max Duty Temperature
Temperature Characteristics
Temperature Characteristics
Characteristics
1.2
1.2
1.0
1.0
100
Temp (°C)
50
40
0.8
0.6
0.4
0.4
0.2
0.0
-60
0.0
-20
0
20
40
60
80
100
Temp (°C)
Fig.9. FB Threshold Voltage Temperature
Characteristics
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○
Temp=25°C
20
0.6
0.2
-40
Temp=85°C
Temp=25°C
Temp=-40°C
I_VC (uA)
VCC=12V
VCC=7V
VFB (V)
VFB (V)
0.8
Temp=-40°C
30
VCC=14V
10
Temp=85°C
0
-10
-20
-30
-40
-50
0
5
10
15
VCC (V)
Fig.10. FB Threshold Power supply
Characteristics
5/15
0
0.5
1
1.5
2
VFB (V)
Fig.11. FB Voltage - IVC Current
Characteristics
2010.02 - Rev.A
Technical Note
BD9859EFJ
6.0
360
1 00
Temp=-40°C
300
5.0
Temp=25°C
3.0
VCC=14V
VCC=12V
VCC=7V
2.0
Ta=25℃
60
40
-20
0
20
40
60
80
Temp=85°C
180
120
60
0
0
-40
240
Ta=-40℃
20
1.0
0.0
-60
Ta=85℃
I_LX (mA)
4.0
△ VCC-VLx[mV]
SS_Time (ms)
80
100
0
20 0
40 0
Temp (°C)
60 0
800
0
1 00 0
2
4
6
8
10
12
V_LX (V)
ILx[mA]
Fig.12. Soft Start Time Temperature
Fig.13. Nch FET ON Resistance
Fig.14. Pre-charge FET ON Resistance
Characteristics
Temperature Characteristics
Temperature Characteristics
10.0
VCC=12V
6.0
VEN_th (V)
Iocp (A)
8.0
VCC=14V
VCC=8V
4.0
12.0
2.0
10.0
1.6
8.0
1.2
0.8
0.4
2.0
0.0
-60
2.4
REN (uA)
12.0
-40
-20
0
20
40
60
80
100
0.0
-60
-40
-20
0
20
40
60
80
100
Temp (°C)
Fig.15 OCP Detect Current
Fig.16. EN Threshold Temperature
Temperature Characteristics
Characteristics
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4.0
2.0
Temp (°C)
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○
6.0
6/15
0.0
-60
-40
-20
0
20
40
60
80
100
Temp (°C)
Fig.17. EN Pin Influx Current
2010.02 - Rev.A
Technical Note
BD9859EFJ
●Example of Reference Application Circuit
(Input 12V, Output 5.0V/ 2.5A)
CBST
0.022 uF
JEN
VBAT
0 Ω SW
CBAT
22 uF/ 16V
GRM31CB31C226KE15
(murata)
4.7 uH
(FDV0630 - 4R7M)
VCC
VCC
BST
EN
Lx
GND
VC
FB
REN
0Ω
CEN
open
EN
10 uF/ 6.3V
GRM219B30J106KE18
(murata)
L
VOUT
COUT
CC2
RFRA
0Ω
RINV1
120 kΩ
RINV2
30 kΩ
1000 pF
RC
open
7.5 kΩ
RSX301-LA30 (ROHM)
(Example of Reference Application Circuit)
Transformation Efficiency η [%]
●Reference Application Data
CC1
D
100.0
80.0
VCC=7V
VCC=10V
60.0
VCC=12V
VCC=14V
40.0
20.0
0.0
0
500
1000
1500
2000
2500
3000
Load Current Io [mA]
Fig.19 Electric Power Conversion
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7/15
2010.02 - Rev.A
Technical Note
BD9859EFJ
●Reference Application Data (Example of Reference Application Circuit)
Gain
[dB]
Phase
[deg]
40
90
Gain
[dB]
Phase
[deg]
40
90
Phase
Phase
Gain
0
-40
100
10k
Frequency[kHz]
Gain
0
0
-90
-40
1M
100
Phase
0
-90
10k
Gain
Frequency[kHz]
1M
Fig.20 Frequency Response
Fig.21 Frequency Response
Fig.22 Load Response Characteristics
Characteristics(Io=1.5A)
Characteristics (Io=3.0A)
(Io=0A→3A)
Fig.23 Load Response Characteristics
Fig.24 Operation Waveform
Fig.25 Stop Waveform
(Io=3A→0A)
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8/15
2010.02 - Rev.A
Technical Note
BD9859EFJ
●Evaluation Board Pattern (Reference)
VOUT
Lx
VBAT
GND
Fig.26 Evaluation Board Pattern
・
・
Please make the Heat radiation plate of the Bottom layer to a plane of Low Impedance.
Because large currents low into the lines of VCC, Lx, PGND, please make the patterns as thick as much as
possible.
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9/15
2010.02 - Rev.A
Technical Note
BD9859EFJ
●Application Components Selection Method
(1)Inductor
Something of the shield Type that Fulfills the Current Rating (Current value Ipecac below), with low DCR (Direct
Current Resistance element) is recommended.
Value of Inductor influences Inductor Ripple Current and becomes the cause of Output Ripple.
In the same way as the formula below, this Ripple Current can be made small for as big as the L value of Coil or as
high as the Switching Frequency.
Ipeak =Iout + ⊿IL/2 [A]
⊿IL=
Vin-Vout
×
Vout
(1)
×
Vin
L
1
[A]
Δ IL
(2)
Fig.27 Inductor Current
f
(η:Efficiency、⊿IL:Output Ripple Current、f:Switching Frequency )
For design value of Inductor Ripple Current, please carry out design tentatively with about 20%~50% of Maximum
Input Current.
※When current that exceeds Coil rating flows to the coil, the Coil causes a Magnetic Saturation, and there are
cases wherein a decline in efficiency, oscillation of output happens. Please have sufficient margin and select so that
Peak Current does not exceed Rating Current of Coil.
(2)Output Capacitor
In order for Capacitor to be used in Output to reduce Output Ripple, Low Ceramic Capacitor of ESR is recommended.
Also, for Capacitor Rating, on top of putting into consideration DC Bias Characteristics, please use something whose
Maximum Rating has sufficient margin with respect to the Output Voltage.
Output Ripple Voltage is looked for using the following formula.
Vpp=⊿IL×
1
2π×f×Co
+
⊿IL×RESR
[V] ・・・ (3)
Please design in a way that it is held within Capacity Ripple Voltage.
(3)Output Voltage Setting
ERROR AMP internal Standard Voltage is 1.0V.Output Voltage is determined as seen in (4) formula.
VOUT
ERROR AMP
R1
FB
Vo=
R2
(R1+R2)
R2
×1.0 [V] ・・・ (4)
VREF
1.0V
Fig.28 Voltage Return Resistance Setting Method
(4)Boost Capacitor
Please connect CBST=0.022uF(Laminate Ceramic Capacitor) between BST Pin-Lx Pins as Output capacitors of Gate Drive
Voltage Generator REG(5V).
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10/15
2010.02 - Rev.A
Technical Note
BD9859EFJ
(5)About Adjustment of DC/DC Comparator Frequency Characteristics
Role of Phase compensation element CC1、CC2,RC (See P.7Example of Reference Application Circuit)
Stability and Responsiveness of Loop are controlled through VC Pin which is the output of Error Amp.
The combination of zero and ball that determines Stability and Responsiveness is adjusted by the combination of resistor
and capacitor that are connected in series to the VC Pin.
DC Gain of Voltage Return Loop can be calculated for using the following formula.
Adc  Rl  Gcs  A EA 
V FB
Vout
Here, VFB is Feedback Voltage(1.0V).AEA is Voltage Gain of Error amplifier(typ : 60dB),
Gcs is the Trans-conductance of Current Detect(typ : 6A/V), and Rl is the Output Load Resistance value.
There are 2 important balls in the Control Loop of this DC/DC.
The first occurs with/ through the output resistance of Phase compensation Capacitor (CC1) and Error amplifier.
The other one occurs with/through the Output Capacitor and Load Resistor.
These balls appear in the frequency written below.
fp1 
GEA
2π CC1 AEA
fp2 
1
2π COUT  Rl
Here、GEA is the trans-conductance of Error amplifier(typ : 140uA/V).
Here、in this Control Loop, one zero becomes important.
With the zero which occurs because of Phase compensation Capacitor CC1 and Phase compensation Resistor RC, the
Frequency below appears.
fz1 
1
2π CC1 RC
Also, if Output Capacitor is big, and that ESR (RESR) is big, in this Control Loop, there are cases when it has an important,
separate zero (ESR zero).
This ESR zero occurs due to ESR of Output Capacitor and Capacitance, and exists in the Frequency below.
fzESR 
1
2π COUT  RESR
(ESR zero)
In this case, the 3rd ball determined with the 2nd Phase compensation Capacitor (CC2) and Phase Correction Resistor (RC)
is used in order to correct the ESR zero results in Loop Gain.
This ball exists in the frequency shown below.
fp3 
1
2π CC2  RC
(Ball that corrects ESR zero)
The target of Phase compensation design is to create a communication function in order to acquire necessary band and
Phase margin.
Cross-over Frequency (band) at which Loop gain of Return Loop becomes “0” is important.
When Cross-over Frequency becomes low, Power supply Fluctuation Response, Load Response, etc worsens.
On the other hand, when Cross-over Frequency is too high, instability of the Loop can occur.
Tentatively, Cross-over Frequency is targeted to be made 1/20 or below of Switching Frequency.
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11/15
2010.02 - Rev.A
Technical Note
BD9859EFJ
Selection method of Phase Compensation constant is shown below.
1.
Phase Compensation Resistor (RC) is selected in order to set to the desired Cross-over Frequency.
Calculation of RC is done using the formula below.
RC 
2π COUT  fc Vout 2π COUT  0.1 fs Vout

<

GEA  GCS
VFB
GEA  GCS
VFB
Here, fc is the desired Cross-over Frequency. It is made about 1/20 and below of the Normal Switching Frequency (fs).
2.
Phase compensation Capacitor (CC1) is selected in order to achieve the desired phase margin.
In an application that has a representative Inductance value (about several uH~20uH), by matching zero of
compensation to 1/4 and below of the Cross-over Frequency, sufficient Phase margin can be acquired.CC1 can be
calculated using the following formula.
CC1>
4
2π RC  fc
RC is Phase compensation Resistor.
3.
Examination whether the second Phase compensation Capacitor CC2 is necessary or not is done.
If the ESR zero of Output Capacitor exists in a place that is smaller than half of the Switching Frequency, a second
Phase compensation Capacitor is necessary. In other words, it is the case wherein the formula below happens.
1
fs
<
2π COUT  RESR 2
In this case, add the second Phase compensation Capacitor CC2, and match the frequency of the third ball to the
Frequency fp3 of ESR zero.
CC2 is looked for using the following formula.
CC2 
COUT  RESR
RC
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12/15
2010.02 - Rev.A
Technical Note
BD9859EFJ
●I/O Equivalent Schematic
Pin.
No
Pin
Name
1
Lx
2
GND
6
BST
7
VCC
8
VCC
Pin.
No
Pin Equivalent Schematic
Pin
Name
VCC
4
FB
FB
GND
VCC
VCC
VC
3
Pin Equivalent Schematic
VC
5
GND
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○
EN
EN
GND
13/15
2010.02 - Rev.A
Technical Note
BD9859EFJ
~
~
●Cautions for Use
(1)About Absolute Maximum Rating
When the absolute maximum ratings of application voltage, operating temperature range, etc. was exceeded, there is
possibility of deterioration and destruction. Also, the short Mode or open mode, etc. destruction condition cannot be
assumed. When the special mode where absolute maximum rating is exceeded is assumed, please give consideration to
the physical safety countermeasure for the fuse, etc.
(2)About GND Electric Potential
In every state, please make the electric potential of GND Pin into the minimum electrical potential. Also, include the
actual excessive effect, and please do it such that the pins, excluding the GND Pin does not become the voltage below
GND.
(3)About Heat Design
Consider the Power Dissipation (Pd) in actual state of use, and please make Heat Design with sufficient margin.
(4)About short circuit between pins and erroneous mounting
When installing to set board, please be mindful of the direction of the IC, phase difference, etc. If it is not installed
correctly, there is a chance that the IC will be destroyed. Also, if a foreign object enters the middle of output, the middle of
output and power supply GND, etc., even for the case where it is shorted, there is a change of destruction.
(5)About the operation inside a strong electro-magnetic field
When using inside a strong electro-magnetic field, there is a possibility of error, so please be careful.
(6)Temperature Protect Circuit (TSD Circuit)
Temperature Protect Circuit(TSD Circuit) is built-in in this IC. As for the Temperature Protect Circuit (TSD Circuit),
because it a circuit that aims to block the IC from insistent careless runs, it is not aimed for protection and guarantee of
IC. Therefore, please do not assume the continuing use after operation of this circuit and the Temperature Protect Circuit
operation.
(7)About checking with Set boards
When doing examination with the set board, during connection of capacitor to the pin that has low impedance, there is a
possibility of stress in the IC, so for every 1 process, please make sure to do electric discharge. As a countermeasure for
static electricity, in the process of assembly, do grounding, and when transporting or storing please be careful. Also, when
doing connection to the jig in the examination process, please make sure to turn off the power supply, then connect. After
that, turn off the power supply then take it off.
(8)About common impedance
For the power supply and the wire of GND, lower the common impedance, then, as much as possible, make the ripple
smaller (as much as possible make the wire thick and short、and lower the ripple from L・C), etc., then and please
consider it sufficiently.
(9)In the application, when the mode where the VCC and each pin electrical potential becomes reversed exists, there is a
possibility that the internal circuit will become damaged. For example、during cases wherein the condition when charge
was given in the external capacitor、 and the VCC was shorted to GND, it is recommended to insert the bypass diode
to the diode of the back current prevention in the VCC series or the middle of each Pin-VCC.
(10)About High-side NchFET
Please use within 3A containing ripple current, because the absolute maximum rating of high-side NchFET is 3A.
(11)About over current detection
The detecting current is the current flowing through high-side NchFET. Output current containing ripple current,
therefore the detecting current is the current of the output current containing ripple current.
(12)About IC Pin Input
This IC is a Monolithic IC、and between each element, it hasP+isolation for element separation and P board. With the N
layer of each element and this , the P-N junction is formed、and the parasitic element of each type is composed.
For example、like the diagram below、when resistor and transistor is connected to Pin,
○When GND>(PinA) in Resistor、 when GND>(PinA)、when GND>(Pin B) in Transistor (NPN), the P-N
junction will operate as a parasitic diode.
○Also, during GND>(Pin B) in the Transistor (NPN), through the N layer of the other elements connected to the
above-mentioned parasitic diode , the parasitic NPN Transistor will operation.
On the composition of IC, depending on the electrical potential, the parasitic element will become necessary. Through
the operation of the parasitic element interference of circuit operation will arouse, and error, therefore destruction can be
caused. Therefore please be careful about the applying of voltage lower than the GND (P board) in I/O Pin, and the way
of using when parasitic element operating.
Transistor (NPN)
Resistor
B
(Pin B)
E
C
(Pin A)
P+
N
P
N
P Substrate
P+
P+
N
GND
P
N
N
GND
Parasitic Element
Fig.29 Example of simple structure of Bipolar IC
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N
P Substrate
Parasitic Element
c 2010 ROHM Co., Ltd. All rights reserved.
○
(Pin A)
P+
~
~
N
14/15
GND
2010.02 - Rev.A
Technical Note
BD9859EFJ
●ORDER MODEL NAME
B
D
9
Device
8
5
9
E
Debice Name
F
J
Package type
HFN : HTSOP-J8
-
E
2
Taping model name
E2: Reel-shape emboss taping
MSOP8
<Tape and Reel information>
2.8±0.1
4.0±0.2
8 7 6 5
0.6±0.2
+6°
4° −4°
0.29±0.15
2.9±0.1
(MAX 3.25 include BURR)
Tape
Embossed carrier tape
Quantity
3000pcs
Direction
of feed
TR
The direction is the 1pin of product is at the upper right when you hold
( reel on the left hand and you pull out the tape on the right hand
)
1 2 3 4
1PIN MARK
1pin
+0.05
0.145 −0.03
0.475
0.08±0.05
0.75±0.05
0.9MAX
S
+0.05
0.22 −0.04
0.08 S
Direction of feed
0.65
(Unit : mm)
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c 2010 ROHM Co., Ltd. All rights reserved.
○
Reel
15/15
∗ Order quantity needs to be multiple of the minimum quantity.
2010.02 - Rev.A
Notice
Notes
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consent of ROHM Co.,Ltd.
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The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
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However, should you incur any damage arising from any inaccuracy or misprint of such
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© 2010 ROHM Co., Ltd. All rights reserved.
R1010A