Linear LS5907 Low leakage low drift monolithic dual n-channel jfet amplifier Datasheet

LS5905 LS5906 LS5907
LS5908 LS5909
LOW LEAKAGE LOW DRIFT
MONOLITHIC DUAL N-CHANNEL
JFET AMPLIFIER
FEATURES
LOW DRIFT
IΔVGS1-2/ΔT│=5µV/°C max.
ULTRA LOW LEAKAGE
IG=150fA TYP.
LOW PINCHOFF
VP=2V TYP.
Case & Body
ABSOLUTE MAXIMUM RATINGS1
@ 25°C (unless otherwise noted)
Maximum Temperatures
Storage Temperature
-55 to +150°C
Operating Junction Temperature
-55 to +150°C
Maximum Voltage and Current for Each Transistor1
-VGSS
Gate Voltage to Drain or Source 40V
-IG(f)
Gate Forward Current
10mA
-IG
Gate Reverse Current
10µA
Top View
SOIC
Top View
TO-78
Maximum Power Dissipation
Device Dissipation @ TA=25ºC - Total
500mW 2
ELECTRICAL CHARACTERISTICS @ 25ºC (unless otherwise noted)
SYMBOL
CHARACTERISTIC
│∆VGS1-2/∆T│max.
Drift vs. Temperature
LS5906 LS5907 LS5908 LS5909 LS5905 UNITS
5
10
20
40
40
µV/ºC
CONDITIONS
VDG = 10V, ID=30µA
TA = -55ºC to +125ºC
│VGS1-2│max.
Offset Voltage
5
5
10
15
15
mV
-IG Max
Operating
1
1
1
1
3
pA
-IG Max
High Temperature
1
1
1
1
3
nA
TA=+125 ºC
-IGSS Max
Gate Reverse Current
2
2
2
2
5
pA
VDS=0V
-IGSS Max
Gate Reverse Current
5
5
5
5
10
nA
TA=+125 ºC
SYMBOL
CHARACTERISTIC
MIN.
TYP.
MAX.
UNITS
BVGSS
Breakdown Voltage
-40
-60
--
V
VDS= 0
ID= -1µA
BVGGO
Gate-to-Gate Breakdown
±40
--
--
V
IGG= ±1µA
ID= 0
IS= 0
VDG =10V
ID=30µA
VGS=-20V
CONDITIONS
TRANSCONDUCTANCE
Gfss
Full Conduction
70
300
500
µS
VDG= 10V
VGS= 0
f = 1kHz
Gfs
Typical Operation
50
100
200
µS
VDG= 10V
ID= 30µA
f = 1kHz
Transconductance Ratio
--
1
5
%
Full Conduction
60
400
1000
µA
VDG= 10V
VGS= 0
Drain Current Ratio
--
2
5
%
-0.6
-2
-4.5
V
VDS= 10V
ID= 1nA
--
--
-4
V
VDS= 10V
ID= 30µA
--
±1
--
pA
VGG= 20V
│Gfs1/Gfs2 │
3
DRAIN CURRENT
IDSS
│IDSS1/IDSS2
3│
GATE VOLTAGE
VGS(off)
Gate-Source Cutoff Voltage
VGS
Operating Range
GATE CURRENT
IGGO
Gate-to-Gate Leakage
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 201131 05/15/2014 Rev#A9 ECN# LS5905 LS5906 LS5907 LS5908 LS5909
SYMBOL
CHARACTERISTIC
MIN.
TYP.
MAX.
UNITS
CONDITIONS
--
5
µS
VDG= 10V VGS= 0
VDG= 10V ID= 30µA
OUTPUT CONDUCTANCE
goss
Full Conduction
--
gos
Operating
--
0.1
--
µS
│gos1-2│
Differential
--
0.01
0.2
µS
COMMON MODE REJECTION
CMRR
-20 log │ΔVGS1-2/ΔVDS│
--
90
--
dB
ΔVDS= 10 to 20V
ID=30µA
CMRR
-20 log │ΔVGS1-2/ΔVDS│
--
90
--
dB
ΔVDS= 5 to 10V
ID=30µA
--
--
1
dB
VDS= 10V VGS= 0
RG=10MΩ
NOISE
NF
Figure
f= 100Hz NBW=6Hz
en
Voltage
--
20
70
nV/√Hz
VDS= 10V ID= 30µA
f= 10Hz
NBW=1Hz
CAPACITANCE
CISS
Input
--
--
3
pF
VDS= 10V VGS= 0
f= 1MHz
CRSS
Reverse Transfer
--
--
1.5
pF
VDS= 10V VGS= 0
f= 1MHz
CDD
Drain-to-Drain
--
--
0.1
pF
VDG= 20V ID= 30µA f= 1MHz
TO-71
P-DIP
TO-78
S1
G2
D1
SS
SS
D2
G1
S2
SOIC
S1
G2
D1
SS
SS
D2
G1
S2
Note: All Dimensions in inches
NOTES:
1. These ratings are limiting values above which the serviceability of any semiconductor may be impaired.
2. Derate 4mWºC above 25ºC
3. Assume smaller value in the numerator.
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its
use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Linear Integrated Systems.
Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing high-quality
discrete components. Expertise brought to LIS is based on processes and products developed at Amelco, Union Carbide, Intersil
and Micro Power Systems by company President John H. Hall. Hall, a protégé of Silicon Valley legend Dr. Jean Hoerni, was the
director of IC Development at Union Carbide, Co-Founder and Vice President of R&D at Intersil, and Founder/President of Micro
Power Systems.
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 201131 05/15/2014 Rev#A9 ECN# LS5905 LS5906 LS5907 LS5908 LS5909
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