Features • maXTouch™ Touchscreen • • • • • • • • • • • • – True 12-bit multi-touch with independent XY tracking for up to 10 concurrent touches in real time with touch size reporting – Up to 4.3 inch diagonal screen size supported with 10 mm “pinch” separation – Up to 10.1 inch support with correspondingly wider “pinch” Number of Channels – Up to 224 (subject to other configuration limitations) – Electrode grid configurations up to 20 X by 10 Y lines supported (subject to 30 total pins and a maximum of 14 Y lines) maXTouch Touch Key Support – Up to 32 channels can be allocated as fixed keys (subject to other configurations) Zero Additional Part Count – 16 X by 14 Y matrix (224 channels) implementable with power bypass capacitors only Signal Processing – Advanced digital filtering using both hardware engine and firmware – Self-calibration – Auto drift compensation – Adjacent Key Suppression® (AKS™) technology – Grip and face suppression – Reports one-touch and two-touch gestures – Down-scaling and clipping support to match LCD resolution – Ultra-fast start-up and calibration for best user experience – Supports axis flipping and axis switch-over for portrait and landscape modes Scan Speed – Maximum single touch >250Hz, subject to configuration – Configurable to allow power/speed optimization – Programmable timeout for automatic transition from active to idle states Response Times – Initial latency <10 ms for first touch from idle, subject to configuration Sensors – Works with PET or glass sensors – Works with all proprietary sensor patterns recommended by Atmel® – Works with passive stylus Panel Thickness – Glass up to 3 mm, screen size dependent – Plastic up to 1.5 mm, screen size dependent Interface – I2C-compatible slave mode 400 kHz Dual-rail Power – Interface 1.8V to 3.3V nominal, analog 2.7V to 3.3V nominal Power Consumption – Idle 80Hz: <1.8 mW, subject to configuration – One Touch Active 80Hz: 3.9 mW, subject to configuration – Sleep: 4.5 µW Package – 49-ball UFBGA 5 x 5 x 0.6 mm, 0.65 ball pitch – 49-ball VFBGA 5 x 5 x 1 mm, 0.65 ball pitch – 48-pin QFN 6 x 6 x 0.6 mm, 0.4 mm pin pitch maXTouch™ 224-channel Touchscreen Sensor IC mXT224 Summary Note: This is a summary document. A complete document is available under NDA. For more information contact www.atmel.com/touchscreen. 9530BS–AT42–10/09 1. Pinout and Schematic 1.1 1.1.1 Pinout Configuration 49-ball UFBGA/VFBGA Top View 1 2 3 4 Bottom View 5 6 7 7 5 6 3 4 2 1 A A B B C D 1.1.2 C mXT224 QT602240 E E F F G G 48-pin QFN Y1 Y2 Y3 Y4 Y5 Y6 Y8 Y7 Y9 Y10 Y11 Y12 Y13 1 48 47 46 45 44 43 42 41 40 39 38 37 36 GND 2 35 GND AVDD 3 34 AVDD X8 4 33 X7 X9 5 32 X6 X10 6 X11 7 mXT224 Y0 31 X5 30 X4 X12 8 29 X3 X13 9 28 X2 X14 10 27 X1 X15 11 26 X0 GND 25 12 13 14 15 16 17 18 19 20 21 22 23 24 GND CHG ADDR_SEL GPIO3/MOSI GPIO2/SCK VDD GPIO1 GPIO0/SYNC SCL SDA N/C RESET VDD 2 D mXT224 9530BS–AT42–10/09 mXT224 1.2 Pinout Descriptions 1.2.1 49-ball UFBGA/VFBGA Table 1-1. Pin Listing Ball Name Type A1 AVDD P A2 Y12 I/O Y line connection or X line in extended mode Leave open A3 Y10 I/O Y line connection or X line in extended mode Leave open A4 Y8 I Y line connection Leave open A5 Y6 I Y line connection Leave open A6 Y4 I Y line connection Leave open A7 Y2 I Y line connection Leave open B1 X8 O X matrix drive line Leave open B2 GND P Ground B3 Y11 I/O B4 Y9 B5 Comments Analog power If Unused, Connect To... – – Y line connection or X line in extended mode Leave open I Y line connection Leave open Y5 I Y line connection Leave open B6 Y1 I Y line connection Leave open B7 Y0 I Y line connection Leave open C1 X10 O X matrix drive line Leave open C2 X9 O X matrix drive line Leave open C3 Y13 I/O Y line connection or X line in extended mode Leave open C4 Y7 I Y line connection Leave open C5 Y3 I Y line connection Leave open C6 GND P Ground – C7 AVDD P Analog power – D1 X12 O X matrix drive line Leave open D2 X13 O X matrix drive line Leave open D3 X11 O X matrix drive line Leave open D4 GND P Ground D5 X7 O X matrix drive line Leave open D6 X5 O X matrix drive line Leave open D7 X6 O X matrix drive line Leave open E1 X14 O X matrix drive line Leave open E2 X15 O X matrix drive line Leave open E3 RESET I Reset low; has internal 30 k to 60 k pull-up resistor Leave open or Vdd E4 GPIO1 I/O General purpose I/O Input: GND Output: leave open – 3 9530BS–AT42–10/09 Table 1-1. I O P 4 Pin Listing (Continued) Ball Name Type Comments E5 X1 O X matrix drive line Leave open E6 X3 O X matrix drive line Leave open E7 X4 O X matrix drive line Leave open F1 VDD P Digital power – F2 GND P Ground – F3 SCL OD Serial Interface Clock – F4 GPIO3/ MOSI I/O General purpose I/O / Debug data Input: GND Output: leave open F5 GND P F6 CHG OD F7 X2 O X matrix drive line Leave open G1 N/C – No connection Leave open G2 SDA OD Serial Interface Data G3 GPIO0/ SYNC I/O General purpose I/O External synchronization Input: GND Output: leave open G4 GPIO2/ SCK I/O General purpose I/O / Debug clock Input: GND Output: leave open G5 VDD P Ground – State change interrupt – Digital power 2 G6 ADDR_SEL I I C-compatible address select G7 X0 O X matrix drive line Input only Output only, push-pull Ground or power If Unused, Connect To... I/O OD – – – Leave open Input and output Open drain output mXT224 9530BS–AT42–10/09 mXT224 1.2.2 48-pin QFN Table 1-2. Pin Listing Pin Name Type 1 Y13 I/O 2 GND P Ground – 3 AVDD P Analog power – 4 X8 O X matrix drive line Leave open 5 X9 O X matrix drive line Leave open 6 X10 O X matrix drive line Leave open 7 X11 O X matrix drive line Leave open 8 X12 O X matrix drive line Leave open 9 X13 O X matrix drive line Leave open 10 X14 O X matrix drive line Leave open 11 X15 O X matrix drive line Leave open 12 GND P Ground – 13 VDD P Digital power – 14 RESET I Reset low; has internal 30 k to 60 k pull-up resistor 15 N/C – No connection 16 SDA OD Serial Interface Data – 17 SCL OD Serial Interface Clock – 18 GPIO0/ SYNC I/O General purpose I/O External synchronization Input: GND Output: leave open 19 GPIO1 I/O General purpose I/O Input: GND Output: leave open 20 VDD P 21 GPIO2/ SCK I/O General purpose I/O / Debug clock Input: GND Output: leave open 22 GPIO3/ MOSI I/O General purpose I/O / Debug data Input: GND Output: leave open 23 ADDR_SEL I 24 CHG OD 25 GND 26 Comments Y line connection or X line in extended mode Digital power If Unused, Connect To... Leave open Leave open or Vdd Leave open – I2C-compatible address select – State change interrupt – P Ground – X0 O X matrix drive line Leave open 27 X1 O X matrix drive line Leave open 28 X2 O X matrix drive line Leave open 29 X3 O X matrix drive line Leave open 30 X4 O X matrix drive line Leave open 31 X5 O X matrix drive line Leave open 32 X6 O X matrix drive line Leave open 5 9530BS–AT42–10/09 Table 1-2. I O P 6 Pin Listing (Continued) Pin Name Type 33 X7 O X matrix drive line 34 AVDD P Analog power – 35 GND P Ground – 36 Y0 I Y line connection Leave open 37 Y1 I Y line connection Leave open 38 Y2 I Y line connection Leave open 39 Y3 I Y line connection Leave open 40 Y4 I Y line connection Leave open 41 Y5 I Y line connection Leave open 42 Y6 I Y line connection Leave open 43 Y7 I Y line connection Leave open 44 Y8 I Y line connection Leave open 45 Y9 I Y line connection Leave open 46 Y10 I/O Y line connection or X line in extended mode Leave open 47 Y11 I/O Y line connection or X line in extended mode Leave open 48 Y12 I/O Y line connection or X line in extended mode Leave open Input only Output only, push-pull Ground or power Comments I/O OD If Unused, Connect To... Leave open Input and output Open drain output mXT224 9530BS–AT42–10/09 mXT224 Schematic 49-ball UFBGA/VFBGA Regulated Regulated VDD AVDD 1 mF F4 VDD Rp Rp G2 SDA 2 I C-COMPATIBLE F3 SCL G1 VDD E3 G3 Rc CHG 2 I C-COMPATIBLE ADDRESS SELECT F6 G6 B2 C6 D4 F2 F5 C7 AVDD A1 AVDD G5 X0 X1 X2 GPIO1 X3 GPIO2/SCK X4 X5 GPIO3/MOSI X6 X7 X8 mXT224 QT602240 X9 X10 X11 SDA X12 SCL X13 X14 N/C X15 RESET X16/Y13 X17/Y12 GPIO0/SYNC X18/Y11 X19/Y10 CHG ADDR_SEL GND GND GND GND GND Y9 Y8 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 G7 E5 F7 E6 E7 D6 D7 D5 B1 C2 C1 D3 MATRIX X DRIVE G4 VDD VDD E4 1 mF 100 nF F1 100 nF NOTE: Bypass capacitors must be X7R or X5R and placed <5 mm away from chip. D1 D2 E1 E2 C3 A2 B3 A3 MATRIX Y OR X* 1.3.1 B4 A4 C4 A5 B5 A6 C5 A7 B6 MATRIX Y SCAN IN 1.3 B7 * NOTE: Y10 to Y13 scan lines may be used as additional X drive lines in extended mode (a 100W resistor must be added to each additional line). 7 9530BS–AT42–10/09 48-pin QFN Regulated Regulated VDD AVDD 1 mF Rp Rp 16 SDA 2 I C-COMPATIBLE 17 SCL 15 VDD 14 18 Rc CHG 2 I C-COMPATIBLE ADDRESS SELECT 24 23 2 12 25 35 34 AVDD 3 AVDD 20 CHG ADDR_SEL GND GND GND GND Y9 Y8 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 26 27 28 29 30 MATRIX X DRIVE 22 VDD X0 X1 X2 GPIO1 X3 GPIO2/SCK X4 X5 GPIO3/MOSI X6 X7 X8 mXT224 QT602240 X9 X10 X11 SDA X12 SCL X13 X14 N/C X15 RESET X16/Y13 X17/Y12 GPIO0/SYNC X18/Y11 X19/Y10 31 32 33 4 5 6 7 8 9 10 11 1 MATRIX Y OR X* 21 VDD VDD 19 1 mF 100 nF 13 100 nF NOTE: Bypass capacitors must be X7R or X5R and placed <5 mm away from chip. 48 47 46 45 44 MATRIX Y SCAN IN 1.3.2 43 42 41 40 39 38 37 36 * NOTE: Y10 to Y13 scan lines may be used as additional X drive lines in extended mode (a 100W resistor must be added to each additional line). 8 mXT224 9530BS–AT42–10/09 mXT224 2. Overview of the mXT224 2.1 Introduction The mXT224 (AT42QT602240) uses a unique charge-transfer acquisition engine to implement the QMatrix™ capacitive sensing method patented by Atmel®. This allows the measurement of up to 224 mutual capacitance nodes in under 1 ms. Coupled with a state-of-the-art XMEGA™ CPU, the entire touchscreen sensing solution can measure, classify and track a single finger touch every 4 ms if required. The acquisition engine uses an optimal measurement approach to ensure almost complete immunity from parasitic capacitance on the receiver inputs (Y lines). The engine includes sufficient dynamic range to cope with touchscreen mutual capacitances spanning 0.5 pF to 5 pF, allowing great flexibility for use with Atmel’s proprietary ITO pattern designs. One and two layer ITO sensors are possible using glass or PET substrates. The main AVR ® XMEGA CPU has, under its control, two powerful, yet low power, microsequencer coprocessors. These combine to allow the signal acquisition, preprocessing, postprocessing and housekeeping to be partitioned in an efficient and flexible way. This gives ample scope for sensing algorithms, touch tracking or advanced shape-based filtering. An in-circuit reflash can be performed over the chip’s hardware-driven two-wire interface (I2C-compatible). Overall, the mXT224 represents a step improvement over competing technologies, providing a near optimal mix of low power, small size and low part count, while offering unrivalled true multitouch performance. 9 9530BS–AT42–10/09 Revision History 10 Revision Number History Revision AS – September 2009 Initial release for chip revision 1.4 Revision BS – October 2009 QFN package details added mXT224 9530BS–AT42–10/09 mXT224 Notes 11 9530BS–AT42–10/09 Headquarters International Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Asia Unit 01-05 & 16, 19/F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong Kowloon Hong Kong Tel: (852) 2245-6100 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-enYvelines Cedex France Tel: (33) 1-30-60-70-00 Fax: (33) 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Technical Support [email protected] Sales Contact www.atmel.com/contacts Touch Technology Division 1 Mitchell Point Ensign Way Hamble Southampton Hampshire SO31 4RF United Kingdom Tel: (44) 23-8056-5600 Fax: (44) 23-8045-3939 Product Contact Web Site www.atmel.com Literature Requests www.atmel.com/literature Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDITIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2009 Atmel Corporation. All rights reserved. Atmel®, Atmel logo and combinations thereof, AVR ®, Adjacent Key Suppression ® and others are registered trademarks, maXTouch™, AKS ™, QMatrix ™, XMEGA ™ and others are trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be registered trademarks or trademarks of others. 9530BS–AT42–10/09