IDT IDT74FST3257 Quad 2:1 mux/demux bus switch Datasheet

IDT74FST3257
PRELIMINARY
QUAD 2:1 MUX/DEMUX
BUS SWITCH
Integrated Device Technology, Inc.
FEATURES:
The FST3257 belongs to IDT's family of Bus switches. Bus
switch devices perform the function of connecting or isolating
two ports without providing any inherent current sink or source
capability. Thus they generate little or no noise of their own
while providing a low resistance path for an external driver.
These devices connect input and output ports through an nchannel FET. When the gate-to-source junction of this FET is
adequately forward-biased the device conducts or the resistance between input and output ports is small. Without
adequate bias on the gate-to-source junction of the FET, the
FET is turned off, therefore with no VCC applied, the device
has hot insertion capability.
The low on-resistance and simplicity of the connection
between input and output ports reduces the delay in this path
to close to zero.
The FST3257 provides a 4-bit 2:1 multiplexer/demultiplexer.
The S pin controls the mux select and the E pin serves as the
switch enable.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
• Bus switches provide zero delay paths
• Extended commercial range of –40°C to +85°C
• Low switch on-resistance:
FST3xxx – 5Ω
• TTL-compatible input and output levels
• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• Available in QSOP and SOIC
DESCRIPTION:
I0A
ZA
I1A
S
1
16
Vcc
I0A
2
15
E
I1A
3
14
I0C
ZA
4
13
I1C
I0B
5
12
ZC
I1B
6
11
10D
ZB
7
10
I1D
GND
8
9
ZD
I0B-D
ZB-D
I1B-D
3 Channels
SO16-1
SO16-7
S
E
3257 drw 01
SOIC/QSOP
TOP VIEW
3257 drw 02
PIN DESCRIPTION
Pin Names
I0A-I0D
I/O
I/O
Port 0
Description
I1A-I1D
I/O
Port 1
E
I
Switch Enable (Active Low)
S
I
Mux Select
ZA-ZB
I/O
Port Z
3257 tbl 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGES
1996 Integrated Device Technology, Inc.
AUGUST 1996
10.3
DSC-3257/3
1
IDT74FST3257
QUAD 2:1 MUX/DEMUX BUS SWITCH
COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
VTERM(2) Terminal Voltage with Respect
to GND
TSTG
Storage Temperature
I OUT
FUNCTION TABLE(1)
Max.
–0.5 to +7.0
Unit
V
–65 to +150
°C
128
mA
Maximum Continuous Channel
Current
3257 tbl 02
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating condiitions for
extended periods may affect reliability.
E
H
S
X
I0A-D
X
I1A-D
X
ZA-D
Z
L
H
X
L
L
L
H
X
H
H
L
L
L
X
L
L
L
H
X
H
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High Impedance
3257 tbl 03
2. VCC, Control and Switch terminals.
CAPACITANCE(1)
Symbol
Conditions(2) Typ. Unit
Parameter
CIN
Control Input Capacitance
CI/O
Switch Input/Output
Capacitance
4
Switch Off
pF
pF
3257 tbl 04
NOTES:
1. Capacitance is characterized but not tested
2. TA = 25°C, f = 1MHz, VIN = 0V, VOUT = 0V
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 5.0V ±5%
Parameter
Input HIGH Voltage
Test Conditions(1)
Guaranteed Logic HIGH for Control Inputs
Min.
2.0
Typ.(2)
—
Max.
—
Unit
V
VIL
Input LOW Voltage
Guaranteed Logic LOW for Control Inputs
—
—
0.8
V
II H
Input HIGH Current
VCC = Max.
µA
II L
Input LOW Voltage
IOZH
High Impedance Output Current
IOZL
(3-State Output pins)
IOS
Short Circuit Current
VCC = Max., VO = GND (3)
VIK
Clamp Diode Voltage
Symbol
VIH
RON
Switch On
Resistance(4)
VI = VCC
—
—
±1
VI = GND
—
—
±1
VO = VCC
—
—
±1
VO = GND
—
—
±1
—
300
—
mA
VCC = Min., IIN = –18mA
—
–0.7
–1.2
V
—
5
7
Ω
—
10
15
Ω
—
—
±1
µA
—
0.1
3
VCC = Max.
IOFF
Input/Output Power Off Leakage
VCC = Min., VIN = 0.0V,
ION = 30mA
VCC = Min., VIN = 2.4V,
ION = 15mA
VCC = 0V, VIN or VO ≤ 4.5V
ICC
Quiescent Power Supply Current
VCC = Max., VI = GND or VCC
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Measured by voltage drop between ports at indicated current through the switch.
10.3
µA
µA
3257 tbl 05
2
IDT54/74FST3257
QUAD 2:1 MUX/DEMUX BUS SWITCH
COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
∆ICC
ICCD
IC
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current(4)
Total Power Supply Current (6)
Test Conditions(1)
VCC = Max.
VIN = 3.4V(3)
VCC = Max.
Outputs Open
Enable Pin Toggling
50% Duty Cycle
VCC = Max.
Outputs Open
Enable Pin Toggling
(4 Switches Toggling)
fi = 10MHz
50% Duty Cycle
Min.
—
Typ.(2)
0.5
Max.
1.5
Unit
mA
VIN = VCC
VIN = GND
—
30
40
µA/
MHz/
Switch
VIN = VCC
VIN = GND
—
1.2
1.6
mA
VIN = 3.4
VIN = GND
—
1.5
2.4
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fiN)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fi = Input Frequency
N = Number of Switches Toggling at fi
All currents are in milliamps and all frequencies are in megahertz.
3257 tbl 06
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 5.0V ±5%
Symbol
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
|QCI|
Description
Data Propagation Delay
I to Z, Z to I(3,4)
Switch Multiplex Delay
S to I, Z
Switch Turn on Delay
E to I, Z
Switch Turn off Delay
E to I, Z(3)
Charge Injection, Typical(5,6)
|QCDI|
Charge Injection, Typical(6,7)
Condition(1)
CL = 50pF
RL = 500Ω
Min.(2)
—
Typ.
—
Max.
0.25
Unit
ns
1.5
—
5.2
ns
1.5
—
4.8
ns
1.5
—
5.0
ns
—
1.5
—
pC
—
0.5
—
pC
3257 tbl 07
NOTES:
1. See test circuit and waveforms.
2. Minimum limits guaranteed but not tested.
3. This parameter is guaranteed by design but not tested.
4. The bus switch contributes no propagation delay other than the RC delay of the on resistance of the switch and the load capacitance. The time constant
for the switch alone is of the order of 0.25 ns for 50 pF load. Since this time is constant and much smaller than the rise/fall times of typical driving signals,
it adds very little propagation delay to the system. Propagation delay of the bus switch when used in a system is determined by the driving circuit on the
driving side of the switch and its interaction with the load on the driven side.
5. Measured at switch turn off, load = 50 pF in parallel with 10 mΩ scope probe, VIN = 0.0 volts.
6. Measured at switch turn off through bus multiplexer, (e.g.- I0 to Z = > I1 to Z), load = 50 pF in parallel with 10 MΩ scope probe, V IN at A = 0.0 volts. Charge
injection is reduced because the injection from the turn off of the I0 to Z switch is compensated by the turn on of the I1 to Z switch.
7. Characterized parameter. Not 100% tested.
10.3
3
IDT74FST3257
QUAD 2:1 MUX/DEMUX BUS SWITCH
COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V CC
SWITCH POSITION
500Ω
V OUT
VIN
Pulse
Generator
Test
Switch
Open Drain
Disable Low
Closed
7.0V
Enable Low
D.U.T.
Open
All Other Tests
50pF
RT
3257 lnk 08
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
500Ω
CL
3257 lnk 03
SET-UP, HOLD AND RELEASE TIMES
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
tH
tSU
tREM
tSU
PULSE WIDTH
3V
1.5V
0V
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
1.5V
tW
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
3257 lnk 03
3V
1.5V
0V
tH
3257 lnk 04
ENABLE AND DISABLE TIMES
PROPAGATION DELAY
ENABLE
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
OPPOSITE PHASE
INPUT TRANSITION
tPHL
3V
1.5V
0V
VOH
1.5V
VOL
DISABLE
3V
1.5V
0V
CONTROL
INPUT
tPZL
OUTPUT
NORMALLY
LOW
3V
1.5V
0V
SWITCH
CLOSED
tPLZ
tPZH
OUTPUT
NORMALLY
HIGH
3257 lnk 06
SWITCH
OPEN
3.5V
3.5V
1.5V
0.3V
VOL
tPHZ
0.3V
VOH
1.5V
0V
0V
3257 lnk 07
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
10.3
4
IDT54/74FST3257
QUAD 2:1 MUX/DEMUX BUS SWITCH
COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
FST
XX
Temp. Range
Device Type
X
Package
SO
Q
Small Outline IC (SO16-1)
Quarter-size Small Outline Package (SO16-7)
3257
Quad 2:1 Mux/Demux Bus Switch
74
–40°C to +85°C
3257 drw 08
10.3
5
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