NSC CD4010C Hex buffers (inverting) Datasheet

CD4009M/CD4009C Hex Buffers (Inverting)
CD4010M/CD4010C Hex Buffers (Non-Inverting)
General Description
Features
These hex buffers are monolithic complementary MOS
(CMOS) integrated circuits. The N- and P-channel enhancement mode transistors provide a symmetrical circuit with
output swings essentially equal to the supply voltage. This
results in high noise immunity over a wide supply voltage
range. No DC power other than that caused by leakage current is consumed during static conditions. All inputs are protected against static discharge. These gates may be used
as hex buffers, CMOS to DTL or TTL interface or as CMOS
current drivers. Conversion ranges are from 3V to 15V providing VCC s VDD.
Y
Y
Y
Y
Wide supply voltage range
Low power
High noise immunity
High current sinking
capability
3.0V to 15V
100 nW (typ.)
0.45 VDD (typ.)
8 mA (min.) at VO e 0.5V
and VDD e 10V
Applications
Y
Y
Y
Y
Automotive
Data terminals
Instrumentation
Medical electronics
Y
Y
Y
Y
Alarm system
Industrial controls
Remote metering
Computers
Schematic and Connection Diagrams
Dual-In-Line Package
Dual-In-Line Package
TL/F/5945 – 2
TL/F/5945 – 4
Top View
Top View
Order Number CD4009 or CD4010
CD4009M/CD4009C
Hex COS/MOS to DTL or TTL
converter (non-inverting).
CD4010M/CD4010C
TL/F/5945 – 1
Hex COS/MOS to DTL or TTL
converter (inverting).
Connect VCC to DTL or TTL supply.
Connect VCC to DTL or TTL supply.
Connect VDD to COS/MOS supply.
Connect VDD to COS/MOS supply.
C1995 National Semiconductor Corporation
TL/F/5945
TL/F/5945 – 3
RRD-B30M105/Printed in U. S. A.
CD4009M/CD4009C Hex Buffers (Inverting)
CD4010M/CD4010C Hex Buffers (Non-Inverting)
February 1988
Absolute Maximum Ratings
Storage Temperature Range (TS)
Power Dissipation (PD)
Dual-In-Line
Small Outline
Lead Temperature (TL)
(Soldering, 10 seconds)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at Any Pin (Note 1)
VSS b 0.3V to VSS a 15.5V
Operating Temperature Range
CD40XXM
CD40XXC
b 55§ C to a 125§ C
b 45§ C to a 85§ C
b 65§ C to a 150§ C
700 mW
500 mW
260§ C
VSS a 3V to VSS a 15V
Operating Range (VDD)
DC Electrical Characteristics
Symbol
Limits
Test
Conditions
(Volts)
Characteristics
VO
CD40XXM
b 55§ C
CD40XXC
a 25§ C
VDD Min Max Min
a 125§ C
b 40§ C
Units
a 25§ C
a 85§ C
Typ Max Min Max Min Max Min Typ Max Min Max
ICC
Quiescent Device
Current
5
10
0.3
0.5
0.01 0.3
0.01 0.5
20
30
3
5
0.03 3
0.05 5
42
70
PD
Quiescent Device
Dissipation/Package
5
10
1.5
5
0.05 1.5
0.1
5
100
300
15
50
0.15 15
0.5 50
210 mW
700 mW
Output Voltage
Low Level
High Level
5
10
5
10
0.01
0.01
0.05
0.05
0.01
0.01
4.99
9.99
4.99
9.99
0
0
5
10
5
10
5
10
5
10
1
2
1.6
3.2
1.4
2.9
1
2
1.5
3
1.5
3
2.25
4.5
2.25
4.5
2.25
4.5
VOL
VOH
0.01
0.01
mA
mA
0 0.01
0.05
0 0.01
0.05
5
4.95
10
9.95
4.95
9.95
4.99
9.99
4.99
9.99
0.9
1.9
1.4
2.9
1.5
3
1
2
1.6
3.2
1.4
2.9
1 2.25
2
4.5
1.5 2.25
3
4.5
1.5 2.25
3
4.5
2.1
5.6
b 0.9
b 0.4
3.6
9.6
b 1.5
b 0.72
V
V
V
V
Noise Immunity
(All Inputs)
VNL
CD4009M
VNL
CD4010M
VNH
Ð
Ð
IDN
IDP
Output Drive Current
N-Channel (Note 2)
P-Channel (Note 2)
IIN
Input Current
VO t 4.0
VO t 8.0
VO t 1.5
VO t 3.0
VO t 3.5
VO t 7.0
0.4
0.5
2.5
9.5
5 3.75
10
10
5 b1.85
10 b0.9
3
4
8
10
b 1.25 b 1.75
b 0.6 b 0.8
3
8
b 1.25
b 0.6
10
0.9
1.9
1.4
2.9
1.5
3
V
V
V
V
V
V
2.4
6.4
b1
b 0.48
mA
mA
mA
mA
10
pA
Note 1: This device should not be connected to circuits with the power on because high transient voltage may cause permanent damage.
Note 2: IDN and IDP are tested one output at a time.
AC Electrical Characteristics*
TA e 25§ c, CL e 15 pF, unless otherwise noted. Typical Temperature coefficient for all values of VDD e 0.3%/§ C
Test
Conditions
Limits
CD40XXM
Characteristics
Propagation Delay Time:
High-to-Low Level (tPHL)
VCC e VDD
VCC e VDD
Typ
Max
Min
Typ
Max
5
10
Ð
Ð
15
10
55
30
Ð
Ð
15
10
70
40
Ð
10
25
Ð
10
35
Ð
Ð
50
25
80
55
Ð
Ð
50
25
100
70
Ð
15
30
Ð
15
40
Ð
Ð
Ð
Ð
Ð
20
16
80
50
5
45
40
125
100
Ð
Ð
Ð
Ð
Ð
Ð
20
16
80
50
5
60
50
160
120
Ð
5
10
VDD e 10V
VCC e 5V
Transition Time:
High-to-Low Level (tTHL)
VCC e VDD
Low-to-High Level (tTLH)
VCC e VDD
Input Capacitance (CI)
Any Input
Units
Min
VDD e 10V
VCC e 5V
Low-to-High Level (tPLH)
CD40XXC
VDD
(Volts)
5
10
5
10
*AC Parameters are guaranteed by DC correlated testing.
2
ns
ns
ns
ns
pF
Typical Application
TL/F/5945 – 5
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number CD4009MJ, CD4009CJ, CD4010MJ or CD4010CJ
NS Package Number J16A
3
CD4009M/CD4009C Hex Buffers (Inverting)
CD4010M/CD4010C Hex Buffers (Non-Inverting)
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Number CD4009MN, CD4009CN, CD4010MN or CD4010CN
NS Package Number N16E
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