IDT IDT54FCT299CTE Fast cmos 8-input universal shift register Datasheet

FAST CMOS
8-INPUT UNIVERSAL
SHIFT REGISTER
IDT54/74FCT299T/AT/CT
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
•
•
•
•
The IDT54/74FCT299T/AT/CT are built using an advanced
dual metal CMOS technology. The IDT54/74FCT299T/AT/
CT are 8-input universal shift/storage registers with 3-state
outputs. Four modes of operation are possible: hold (store),
shift left, shift right and load data. The parallel load inputs and
flip-flop outputs are multiplexed to reduce the total number of
package pins. Additional outputs are provided for flip-flops Q0
and Q7 to allow easy serial cascading. A separate active LOW
Master Reset is used to reset the register.
•
•
•
•
•
•
Std., A and C speed grades
Low input and output leakage ≤1µA (max.)
CMOS power levels
True TTL input and output compatibility
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
High drive outputs (-15mA IOH, 48mA IOL)
Power off disable outputs permit “live insertion”
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
Available in DIP, SOIC, QSOP, CERPACK and LCC
packages
FUNCTIONAL BLOCK DIAGRAM
S1
S0
DS 7
DS 0
CP
CD
D
CP
Q
CD
D
Q
CP
CD
D
Q
CP
CD
D
CP
Q
CD
D
Q
CP
CD
D
Q
CP
CD
D
Q
CP
CD
D
CP
Q
Q0
Q7
MR
OE 1
OE 2
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
2632 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1995 Integrated Device Technology, Inc.
6.11
APRIL 1995
DSC-4205/4
1
IDT54/74FCT299T/AT/CT
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
OE 2
OE 1
S0
Vcc
S1
PIN CONFIGURATIONS
INDEX
20
2
19
3
4
5
6
7
P20-1
D20-1
SO20-2
SO20-8
&
E20-1
18
17
16
15
14
8
13
9
12
10
11
Vcc
S1
DS 7
Q7
I/O 7
I/O 5
I/O 3
I/O 1
CP
DS 0
3 2
I/O 6
I/O 4
I/O 2
I/O 0
Q0
4
1
20 19
18
5
L20-2
6
16
7
15
8
14
9 10 11 12 13
2632 drw 02
2632 drw 03
LCC
TOP VIEW
DIP/SOIC/QSOP/CERPACK
TOP VIEW
FUNCTION TABLE(1)
PIN DESCRIPTION
Pin Names
DS 7
Q7
I/O 7
I/O 5
I/O 3
17
MR
GND
DS 0
CP
I/O 1
S0
OE 1
OE 2
I/O 6
I/O 4
I/O 2
I/O 0
Q0
MR
GND
1
Description
Inputs
MR S1
CP
Clock Pulse Input (Active Edge Rising)
S0
CP
Response
DS0
Serial Data Input for Right Shift
L
X
X
X
Asynchronous Reset Q0–Q7 = LOW
DS7
Serial Data Input for Left Shift
H
H
H
↑
Parallel Load; I/On → Qn
S0, S1
Mode Select Inputs
H
L
H
↑
Shift Right; DS0 → Q0, Q0 → Q1, etc.
MR
OE1, OE2
Asynchronous Master Reset Input (Active LOW)
H
H
L
↑
Shift Left; DS7 → Q7, Q7→ Q6, etc.
3-State Output Enable Inputs (Active LOW)
H
L
L
X
Hold
I/O0–I/O7
Parallel Data Inputs or 3-State Parallel Outputs
O0, O7
Serial Outputs
2632 tbl 01
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
Commercial
VTERM(2) Terminal Voltage
–0.5 to +7.0
with Respect to
GND
VTERM(3) Terminal Voltage
–0.5 to
with Respect to
VCC +0.5
GND
TA
Operating
0 to +70
Temperature
TBIAS
Temperature
–55 to +125
Under Bias
TSTG
Storage
–55 to +125
Temperature
PT
Power Dissipation
0.5
I OUT
DC Output
Current
–60 to +120
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑ = LOW-to-HIGH clock transition
2632 tbl 02
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Military
–0.5 to +7.0
Unit
V
–0.5 to
VCC +0.5
V
–55 to +125
°C
–65 to +135
°C
–65 to +150
°C
0.5
W
–60 to +120
mA
Symbol
Parameter(1)
CIN
Input
Capacitance
COUT
Output
Capacitance
Conditions
VIN = 0V
Typ.
6
VOUT = 0V
8
Max. Unit
10
pF
12
NOTE:
1. This parameter is measured at characterization but not tested.
pF
2632 lnk 04
2632 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage
may exceed VCC by +0.5V unless otherwise noted.
2. Input and VCC terminals only.
3. Outputs and I/O terminals only.
6.11
2
IDT54/74FCT299T/AT/CT
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
Test Conditions(1)
Parameter
Min.
Typ.(2)
Max.
Unit
2.0
—
—
V
VIH
Input HIGH Level
VIL
Input LOW Level
Guaranteed Logic LOW Level
—
—
0.8
V
IIH
Input HIGH Current(4)
VCC = Max., VI = 2.7V
—
—
±1
µA
IIL
Input LOW Current(4)
VCC = Max., VI = 0.5V
—
—
±1
µA
II
Input HIGH Current(4)
VCC = Max., VI = Vcc (Max.)
—
—
±1
µA
VIK
Clamp Diode Voltage
VCC = Min., IN = –18mA
—
–0.7
–1.2
V
–60
–120
–225
mA
2.4
3.3
—
V
2.0
3.0
—
V
—
0.3
0.5
V
—
—
±1
µA
—
200
—
mV
—
0.01
1
mA
Guaranteed Logic HIGH Level
(3)
IOS
Short Circuit Current
VCC = Max.,
VOH
Output HIGH Voltage
VCC = Min.
VO = GND
IOH = –6mA MIL.
VIN = VIH or VIL
IOH = –8mA COM'L.
IOH = –12mA MIL.
IOH= –15mA COM'L.
VOL
IOFF
Output LOW Voltage
Input/Output Power Off
Leakage
VCC = Min.
IOL = 32mA MIL.
VIN = VIH or VIL
IOL = 48mA COM'L.
VCC = 0V, VIN or VO ≤ 4.5V
(5)
VH
Input Hysteresis
ICC
Quiescent Power
Supply Current
—
VCC = Max.
VIN = GND or VCC
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = -55°C.
5. This parameter is guaranteed but not tested.
6.11
2632 tbl 05
3
IDT54/74FCT299T/AT/CT
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
Test Conditions(1)
Parameter
Min.
Typ.(2)
Max.
Unit
—
0.5
2.0
mA
∆ICC
Quiescent Power Supply
Current TTL Inputs HIGH
Vcc = Max.
VIN = 3.4V(3)
ICCD
Dynamic Power Supply
Current (4)
Vcc = Max.
Outputs Open
OE1 = OE2 = GND
MR = VCC
S0 = S1 = VCC
DS0 = DS1 = GND
One Input Toggling
50% Duty Cycle
VIN = VCC
VIN = GND
—
0.15
0.25
mA/MHz
IC
Total Power Supply
Current (6)
Vcc = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OE1 = OE2 = GND
MR = VCC
S0 = S1 = VCC
DS0 = DS7 = GND
One Bit Toggling
at fi = 5MHz
50% Duty Cycle
VIN = VCC
VIN = GND
—
1.5
3.5
mA
VIN = 3.4V
VIN = GND
—
2.0
5.5
Vcc = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OE1 = OE2 = GND
MR = VCC
S0 = S1 = VCC
DS0 = DS7 = GND
Eight Bits Toggling
at fi = 2.5MHz
50% Duty Cycle
VIN = VCC
VIN = GND
—
3.8
7.3(5)
VIN = 3.4V
VIN = GND
—
6.0
16.3(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
6.11
2632 tbl 06
4
IDT54/74FCT299T/AT/CT
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Symbol
Parameter
(1)
Condition
IDT54/74FCT299AT
IDT54/74FCT299CT
Com’l.
Com’l.
Com’l.
(2)
Min.
Mil.
(2)
(2)
Mil.
(2)
Max. Min.
Max.
(2)
Min.
Mil.
Max. Min.
(2)
Max. Unit
Max. Min.
Max. Min.
2.0
10.0
2.0
14.0
2.0
7.2
2.0
9.5
2.0
6.5
2.0
7.5
ns
tPLH
tPHL
Propagation Delay
CP to Q0 or Q7
tPLH
tPHL
Propagation Delay
CP to I/On
2.0
12.0
2.0
12.0
2.0
7.2
2.0
9.5
2.0
6.5
2.0
7.5
ns
tPHL
Propagation Delay
MR to Q0 or Q7
2.0
10.0
2.0
10.5
2.0
7.2
2.0
9.5
2.0
6.5
2.0
7.5
ns
tPHL
Propagation Delay
MR to I/On
2.0
15.0
2.0
15.0
2.0
8.7
2.0
11.5
2.0
6.5
2.0
7.5
ns
tPZH
tPZL
Output Enable Time
OEn to I/On
1.5
11.0
1.5
15.0
1.5
6.5
1.5
7.5
1.5
6.5
1.5
7.5
ns
tPHZ
tPLZ
Output Disable Time
OEn to I/On
1.5
7.0
1.5
9.0
1.5
6.0
1.5
6.5
1.5
6.0
1.5
6.5
ns
tSU
Set-up Time HIGH
or LOW
S0 or S1 to CP
7.5
—
7.5
—
3.5
—
4.0
—
3.5
—
4.0
—
ns
tSU
Set-up Time HIGH
or LOW I/On,
DS0 or DS7 to CP
5.5
—
5.5
—
4.0
—
4.5
—
4.0
—
4.5
—
ns
tH
Hold Time HIGH
or LOW
S0 or S1 to CP
1.0
—
1.0
—
1.0
—
1.0
—
1.0
—
1.0
—
ns
tH
Hold Time HIGH
or LOW I/On,
DS0 or DS7 to CP
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
ns
tW
CP Pulse Width
HIGH or LOW
7.0
—
7.0
—
5.0
—
6.0
—
5.0
—
6.0
—
ns
tw
MR Pulse Width
7.0
—
7.0
—
5.0
—
6.0
—
5.0
—
6.0
—
ns
LOW
Recovery Time
7.0
—
7.0
—
5.0
—
6.0
—
5.0
—
6.0
—
ns
tREM
CL = 50pF
RL = 500Ω
IDT54/74FCT299T
NOTES:
1. See test circuit and waveforms.
2. Minimum units are guaranteed but not tested on Propagation Delays.
2619 tbl 07
6.11
5
IDT54/74FCT299T/AT/CT
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
SWITCH POSITION
V CC
7.0V
500Ω
Pulse
Generator
Switch
Open Drain
Disable Low
Closed
Enable Low
V OUT
VIN
Test
Open
All Other Tests
D.U.T.
50pF
RT
DEFINITIONS:
2632 lnk 08
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
500Ω
CL
2632 drw 04
SET-UP, HOLD AND RELEASE TIMES
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
tH
tSU
tREM
tSU
PULSE WIDTH
3V
1.5V
0V
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
1.5V
tW
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
3V
1.5V
0V
tH
2632 drw 06
2632 drw 05
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
OPPOSITE PHASE
INPUT TRANSITION
tPHL
3V
1.5V
0V
VOH
1.5V
VOL
DISABLE
3V
1.5V
0V
CONTROL
INPUT
tPZL
OUTPUT
NORMALLY
LOW
3V
1.5V
0V
SWITCH
CLOSED
tPLZ
tPZH
OUTPUT
NORMALLY
HIGH
2632 drw 07
SWITCH
OPEN
3.5V
3.5V
1.5V
0.3V
VOL
tPHZ
0.3V
1.5V
0V
VOH
0V
2632 drw 08
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
6.11
6
IDT54/74FCT299T/AT/CT
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
Temperature
Range
FCT
X
XXXX
X
X
Family
Device Type
Package
Process
Blank
B
Commercial
MIL-STD-883, Class B
P
D
SO
L
E
Q
Plastic DIP
CERDIP
Small Outline IC
Leadless Chip Carrier
CERPACK
Quarter-size Small Outline Package
299T 8-Input Universal Shift Register
299AT
299CT
Blank
High Drive
54
74
–55°C to +125°C
0°C to +70°C
2632 drw 09
6.11
7
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