Sony ICX285AL Diagonal 11 mm (type 2/3) progressive scan ccd image sensor with square pixel for b/w camera Datasheet

ICX285AL
Diagonal 11 mm (Type 2/3) Progressive Scan CCD Image
Sensor with Square Pixel for B/W Cameras
Description
The ICX285AL is a diagonal 11 mm (Type 2/3)
interline CCD solid-state image sensor with a square
pixel array. High sensitivity and low smear are
achieved through the adoption of EXview HAD CCD
technology. Progressive scan allows all pixel’s signals
to be output independently within approximately
1/15 second. Also, the adoption of high frame rate
readout mode supports 60 frames per second. This
chip features an electronic shutter with variable
charge-storage time which makes it possible to realize
full-frame still images without a mechanical shutter.
This chip is suitable for image input applications
such as still cameras which require high resolution,
etc.
20 pin DIP (Ceramic)
Features
• Progressive scan allows individual readout of the image signals from all pixels.
• High horizontal and vertical resolution (both approximately 1024 TV-lines) still images without a mechanical
shutter
• Supports high frame rate readout mode (effective 256 lines output, 60 frame/s)
• Square pixel
• Aspect ratio: 4:3
Pin 1
• Horizontal drive frequency: 28.64 MHz
2
• High sensitivity, low smear
• Low dark current, excellent anti-blooming characteristics
• Continuous variable-speed shutter
V
• Horizontal register: 5.0 V drive
Device Structure
2
• Interline CCD image sensor
40
H
Pin 11
• Image size:
Diagonal 11 mm (Type 2/3)
• Total number of pixels:
1434 (H) × 1050 (V) approx. 1.50M pixels
Optical black position
• Number of effective pixels: 1392 (H) × 1040 (V) approx. 1.45M pixels
(Top View)
• Number of active pixels: 1360 (H) × 1024 (V) approx. 1.40M pixels
• Chip size:
10.2 mm (H) × 8.3 mm (V)
• Unit cell size:
6.45 µm (H) × 6.45 µm (V)
• Optical black:
Horizontal (H) direction: Front 2 pixels, rear 40 pixels
Vertical (V) direction: Front 8 pixels, rear 2 pixels
• Number of dummy bits:
Horizontal 20
Vertical 3
• Substrate material:
Silicon
8
* EXview HAD CCD is a trademark of Sony Corporation.
EXview HAD CCD is a CCD that drastically improves light efficiency by including near infrared light region as a basic structure of
HAD (Hole-Accumulation-Diode) sensor.
Sony reserves the right to change products and specifications without prior notice. This information does not convery any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E00Y42A27
ICX285AL
GND
Vφ3
Vφ4
NC
NC
Vφ2B
NC
Vφ2A
Vφ1
10
9
8
7
6
5
4
3
2
1
Vertical register
GND
Block Diagram and Pin Configuration (Top View)
Note)
Note)
13
14
15
16
17
18
VDD
φRG
Hφ2
Hφ1
φSUB
CSUB
VL
19
20
Hφ2
12
Hφ1
11
VOUT
Horizontal register
: Photo sensor
Pin Description
Pin No.
*1
Description
Symbol
Pin No.
Symbol
Description
1
Vφ1
Vertical register transfer clock
11
VOUT
Signal output
2
Vφ2A
Vertical register transfer clock
12
VDD
Supply voltage
3
NC
13
φRG
Reset gate clock
4
Vφ2B
14
Hφ2
Horizontal register transfer clock
5
NC
15
Hφ1
Horizontal register transfer clock
6
NC
16
φSUB
Substrate clock
7
Vφ4
Vertical register transfer clock
17
CSUB
Substrate bias*1
8
Vφ3
Vertical register transfer clock
18
VL
Protective transistor bias
9
GND
GND
19
Hφ1
Horizontal register transfer clock
10
GND
GND
20
Hφ2
Horizontal register transfer clock
Vertical register transfer clock
DC bias is generated within the CCD, so that this pin should be grounded externally through a capacitance of
0.1µF.
–2–
ICX285AL
Absolute Maximum Ratings
Ratings
Unit
VDD, VOUT, φRG – φSUB
–40 to +12
V
Vφ2A, Vφ2B – φSUB
–50 to +15
V
Vφ1, Vφ3, Vφ4, VL – φSUB
–50 to +0.3
V
Hφ1, Hφ2, GND – φSUB
–40 to +0.3
V
CSUB – φSUB
–25 to
V
VDD, VOUT, φRG, CSUB – GND
–0.3 to +22
V
Vφ1, Vφ2A, Vφ2B, Vφ3, Vφ4 – GND
–10 to +18
V
Hφ1, Hφ2 – GND
–10 to +6.5
V
Vφ2A, Vφ2B – VL
–0.3 to +28
V
Vφ1, Vφ3, Vφ4, Hφ1, Hφ2, GND – VL
–0.3 to +15
V
to +15
V
Hφ1 – Hφ2
–6.5 to +6.5
V
Hφ1, Hφ2 – Vφ4
–10 to +16
V
Storage temperature
–30 to +80
°C
Performance guarantee temperature
–10 to +60
°C
Operating temperature
–10 to +75
°C
Item
Against φSUB
Against GND
Against VL
Voltage difference between vertical clock input pins
Between input
clock pins
*1
Remarks
*1
+24 V (Max.) when clock width < 10 µs, clock duty factor < 0.1%.
+16 V (Max.) is guaranteed for power-on and power-off.
Bias Conditions
Item
Symbol
Min.
Typ.
Max.
Unit
14.55
15.0
15.45
V
Typ.
Max.
Unit
9
11
mA
Supply voltage
VDD
Protective transistor bias
VL
*2
Substrate clock
φSUB
*3
Reset gate clock
φRG
*3
Remarks
DC characteristics
Item
Supply current
*2
*3
Symbol
Min.
IDD
Remarks
VL setting is the VVL voltage of the vertical clock waveform, or the same voltage as the VL power supply for the
V driver should be used.
Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated within
the CCD.
–3–
ICX285AL
Clock Voltage Conditions
Item
Min.
Typ.
Max.
Unit
Waveform
diagram
14.55
15.0
15.45
V
1
VVH1, VVH2
–0.05
0
0.05
V
2
VVH3, VVH4
–0.2
0
0.05
V
2
VVL1, VVL2,
VVL3, VVL4
–7.3
–7.0
–6.7
V
2
VVL = (VVL3 + VVL4)/2
VφV
6.5
7.0
7.35
V
2
Vφ V = VVHn – VVLn (n = 1 to 4)
Symbol
Readout clock voltage VVT
Vertical transfer
clock voltage
Horizontal transfer
clock voltage
Reset gate
clock voltage
Remarks
VVH = (VVH1 + VVH2)/2
VVH3 – VVH
–0.25
0.1
V
2
VVH4 – VVH
–0.25
0.1
V
2
VVHH
1.4
V
2
High-level coupling
VVHL
1.3
V
2
High-level coupling
VVLH
1.4
V
2
Low-level coupling
VVLL
0.8
V
2
Low-level coupling
VφH
4.75
5.0
5.25
V
3
VHL
–0.05
0
0.05
V
3
VCR
VφH/2
V
3
VφRG
3.0
5.5
V
4
VRGLH – VRGLL
0.4
V
4
Low-level coupling
VRGL – VRGLm
0.5
V
4
Low-level coupling
22.75
V
5
Substrate clock voltage VφSUB
21.25
3.3
22.0
–4–
Cross-point voltage
ICX285AL
Clock Equivalent Circuit Constants
Item
Symbol
Typ.
Min.
Max.
Unit Remarks
CφV1
5600
pF
CφV2A
6800
pF
CφV2B
22000
pF
CφV3
8200
pF
CφV4
22000
pF
CφV12A
150
pF
CφV12B
390
pF
CφV2A3
270
pF
CφV2B3
470
pF
CφV14
2200
pF
CφV34
330
pF
CφV2A4
390
pF
CφV2B4
560
pF
CφH1
47
pF
CφH2
39
pF
Capacitance between horizontal transfer clocks
CφHH
74
pF
Capacitance between reset gate clock and GND
CφRG
4
pF
Capacitance between substrate clock and GND
CφSUB
1300
pF
R1, R3
30
Ω
R2A, R2B
32
Ω
R4
20
Ω
Vertical transfer clock ground resistor
RGND
60
Ω
Horizontal transfer clock series resistor
RφH
7.5
Ω
Reset gate clock ground resistor
RφRG
24
Ω
Capacitance between vertical transfer clock and GND
Capacitance between vertical transfer clocks
Capacitance between horizontal transfer clock and GND
Vertical transfer clock series resistor
Vφ4
RφH
RφH
Hφ1
CφV4
R4
CφV41
RφH
Hφ1
CφV2B4
CφV2B
R2B
R1
Vφ1
CφHH
RφH
CφV34
CφV12B
Hφ2
Hφ2
CφH1
CφH2
Vφ2B
CφV1
Horizontal transfer clock equivalent circuit
CφV12A
CφV2B3
RφRG
RGND
CφV2A4
CφV3
CφV2A3
R2A
Vφ2A
RGφ
CφV2A
R3
CφRG
Vφ3
Vertical transfer clock equivalent circuit
–5–
Reset gate clock equivalent circuit
ICX285AL
Drive Clock Waveform Conditions
(1) Readout clock waveform
100%
90%
φM
VVT
φM
2
10%
0%
tr
twh
0V
tf
(2) Vertical transfer clock waveform
Vφ3
Vφ1
VVHH
VVHH
VVH
VVHH
VVHH
VVH
VVHL
VVHL
VVH1
VVH3 VVHL
VVHL
VVL3VVLH
VVLH
VVLL
VVLL
VVL1
VVL
VVL
Vφ4
Vφ2A, Vφ2B
VVH2
VVHH
VVH
VVHH
VVHL
VVHL
VVHL
VVL2
VVHH
VVHH
VVH4
VVHL
VVL4
VVLH
VVLH
VVLL
VVLL
VVL
VVH = (VVH1 + VVH2)/2
VVL = (VVL3 + VVL4)/2
VφV = VVHn – VVLn (n = 1 to 4)
VVH
VVL
–6–
ICX285AL
(3) Horizontal transfer clock waveform
tr
tf
twh
Hφ2
90%
VCR
VφH
twl
VφH
2
10%
Hφ1
VHL
two
Cross-point voltage for the Hφ1 rising side of the horizontal transfer clocks Hφ1 and Hφ2 waveforms is VCR.
The overlap period for twh and twl of horizontal transfer clocks Hφ1 and Hφ2 is two.
(4) Reset gate clock waveform
tr
twh
tf
VRGH
RG waveform
twl
VφRG
Point A
VRGLH
VRGL
VRGLL
VRGLm
VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from
Point A in the above diagram until the rising edge of RG.
In addition, VRGL is the average value of VRGLH and VRGLL.
VRGL = (VRGLH + VRGLL)/2
Assuming VRGH is the minimum value during the interval twh, then:
VφRG = VRGH – VRGL
Negative overshoot level during the falling edge of RG is VRGLm.
(5) Substrate clock waveform
100%
90%
φM
VφSUB
φM
2
10%
VSUB
0%
tr
twh
(A bias generated within the CCD)
–7–
tf
ICX285AL
Clock Switching Characteristics (Horizontal drive frequency: 28.64 MHz)
Item
Symbol
VT
Vertical transfer clock
Vφ1, Vφ2,
Vφ3, Vφ4
Horizontal
transfer clock
Readout clock
During imaging
twh
twl
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
2.8 3.0
0.5
10 12.5
10 12.5
5
7.5
5
7.5
Hφ2
10 12.5
10 12.5
5
7.5
5
7.5
φRG
Substrate clock
φSUB
Symbol
4
8
24
0.01
0.01
0.01
0.01
2
2
3.5 3.9
0.5
two
Min. Typ. Max.
Hφ1, Hφ2 8
Unit
10
Unit
Remarks
µs
During readout
250 ns
Hφ1
Reset gate clock
Horizontal transfer
clock
0.5
15
During parallel- Hφ1
serial conversion Hφ2
Item
tf
tr
ns
When using
CXD3400N
rf ≥ rf – 2ns
µs
ns
0.5
µs
During drain
charge
Remarks
ns
Spectral Sensitivity Characteristics (excludes lens characteristics and light source characteristics)
1.0
0.9
Relative Response
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
400
500
600
700
Wave Length [nm]
–8–
800
900
1000
ICX285AL
Image Sensor Characteristics
Item
*1
(Ta = 25°C)
Unit
Measurement
method
1300
mV
1
1/30 s accumulation
4000
mV
2
1/30 s accumulation
mV
3
Ta = 60°C
dB
4
%
5
11
mV
6
Ta = 60°C, 15 frame/s
∆Vdt
4
mV
7
Ta = 60°C, 15 frame/s, *1
Lag
0.5
%
8
Symbol
Min.
Typ.
Sensitivity 1
S1
1040
Sensitivity 2
S2
Saturation signal
Vsat
Smear
Sm
Video signal shading
SH
Dark signal
Vdt
Dark signal shading
Lag
Max.
850
–110
–100
–98
–88
20
25
Remarks
Progressive scan mode
High frame rate readout mode
Zone 0 and I
Zone 0 to II'
Excludes vertical dark signal shading caused by vertical register high-speed transfer.
Zone Definition of Video Signal Shading
1392 (H)
16
16
8
V
10
H
8
H
8
Zone 0, I
Zone II, II'
V
10
1040 (V)
8
Ignored region
Effective pixel region
Measurement System
CCD signal output [*A]
CCD
C.D.S
AMP
S/H
Signal output [*B]
Note) Adjust the amplifier gain so that the gain between [*A] and [*B] equals 1.
–9–
ICX285AL
Image Sensor Characteristics Measurement Method
• Readout modes
The diagram below shows the output methods for the following two readout modes.
Progressive scan mode
VOUT
High frame rate readout mode
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
VOUT
Note) Blacked out portions in the diagram indicate pixels which are not read out.
Output starts from line 1 in high frame rate readout mode.
1. Progressive scan mode
In this mode, all pixel signals are output in non-interlace format in 1/15 s.
All pixel signals within the same exposure period are read out simultaneously, making this mode suitable for
high resolution image capturing.
2. High frame rate readout mode
All effective areas are scanned in approximately 1/60 s by reading out two out of eight lines (1st and 4th lines,
9th and 12th lines, and so on). The vertical resolution is approximately 256 TV-lines.
This readout mode emphasizes processing speed over vertical resolution.
– 10 –
ICX285AL
• Measurement conditions
(1) In the following measurements, the substrate voltage is set to the value indicated on the device, and the
device drive conditions are at the typical values of the progressive scan mode, bias and clock voltage conditions.
(2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical
black level (OB) is used as the reference for the signal output, which is taken as the value measured at point
[*B] of the measurement system.
• Definition of standard imaging conditions
(1) Standard imaging condition I:
Use a pattern box (luminance: 706 cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern
for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0 mm) as an IR cut filter and
image at F8. The luminous intensity to the sensor receiving surface at this point is defined as the standard
sensitivity testing luminous intensity.
(2) Standard imaging condition II:
This indicates the standard imaging condition I with the IR cut filter removed.
(3) Standard imaging condition III:
Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use
a testing standard lens with CM500S (t = 1.0 mm) as an IR cut filter. The luminous intensity is adjusted to the
value indicated in each testing item by the lens diaphragm.
1. Sensitivity 1
Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of
1/100 s, measure the signal output (VS1) at the center of the screen, and substitute the value into the following
formula.
S1 = VS1 ×
100
[mV]
30
2. Sensitivity 2
Set to standard imaging condition II. After selecting the electronic shutter mode with a shutter speed of
1/500 s, measure the signal output (VS2) at the center of the screen, and substitute the value into the following
formula.
S2 = VS2 ×
500
[mV]
30
3. Saturation signal
Set to standard imaging condition III. After adjusting the luminous intensity to 20 times the intensity with the
average value of the signal output, 200 mV, measure the minimum value of the signal output.
4. Smear
Set to standard imaging condition III. With the lens diaphragm at F5.6 to F8, first adjust the luminous intensity
to 500 times the intensity with the average value of signal output, 200 mV. Then after the readout clock is
stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the
maximum value (Vsm [mV]) of the signal output and substitute the value into the following formula.
Sm = 20 × log
Vsm
1
1
×
×
200
500 10
[dB] (1/10 V method conversion value)
– 11 –
ICX285AL
5. Video signal shading
Set to standard imaging condition III. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so
that the average value of the signal output is 200 mV. Then measure the maximum (Vmax [mV]) and minimum
(Vmin [mV]) values of the signal output and substitute the values into the following formula.
SH = (Vmax – Vmin)/200 × 100 [%]
6. Dark signal
Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature 60°C and the
device in the light-obstructed state, using the horizontal idle transfer level as a reference.
7. Dark signal shading
After measuring 6, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark
signal output and substitute the values into the following formula.
∆Vdt = Vdmax – Vdmin [mV]
8. Lag
Adjust the signal output generated by strobe light to 200 mV. After setting the strobe light so that it strobes
with the following timing, measure the residual signal (Vlag). Substitute the value into the following formula.
Lag = (Vlag/200) × 100 [%]
VD
Light
Strobe light timing
Signal output 200 mV
Output
– 12 –
Vlag (lag)
– 13 –
13
12
11
8
9
10
XSG2A
XV3
XV1
φRG
Hφ1
Hφ2
XSUB
14
7
XSG2B
15
16
5
6
17
4
XV2
18
3
XV4
CXD3400N
(TOP VIEW)
19
2
20
0.1
1/35V
0.1
0.1
3.3/
16V
19
20
18
16
0.1 1MΩ
17
ICX285
(BOTTOM VIEW)
10
9
8
7
6
5
4
3
2
1
Vφ1
VL
1
0.1
Vφ2A
φSUB
XSUB
0.1
100k
NC
15
Hφ1
–7V
Vφ2B
14
Hφ2
15V
NC
13
φRG
5.0V
NC
Hφ2
Vφ4
Hφ1
Vφ3
CSUB
GND
12
VDD
GND
1/20V
11
VOUT
Drive Circuit
4.7k
2SC4250
3.3/20V
CCD OUT
0.01
ICX285AL
– 14 –
CCD
OUT
V4
V3
V2B
V2A
V1
HD
VD
"a"
1068
1
2
3
4
5
6
7
8
9
10
11
12
13
Drive Timing Chart (Vertical Sync) Progressive Scan Mode
1040
1
2
1063
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
9
10
21
1031
1032
1044
1040
1
2
1052
1063
1068
1
1
2
ICX285AL
– 15 –
V4
V3
V2B
V2A
V1
HD
H1
1
98
1
1
140
182
1
126
126
210
126
27.9 µ sec (800 bits)
392
56
1790
1
Drive Timing Chart (Vertical Sync "a" Enlarged) Progressive Scan Mode
3.5 µ sec (100 bits)
70 nsec (2 bits)
ICX285AL
392
56
1790
1
– 16 –
SUB
Vφ4
Vφ3
Vφ2B
Vφ2A
Vφ1
SHD
SHP
RGφ
Hφ2
Hφ1
CLK
56
1790
1
1
1
1
1
1
42
42
1
1
84
1
105
1
Drive Timing Chart (Horizontal Sync) Progressive Scan Mode
126
1
126
1
1
210
126
1
126
1
210
1
42
392
105
126
84
168
168
ICX285AL
430
412
– 17 –
CCD
OUT
V4
V3
V2B
V2A
V1
HD
VD
"a"
1
2
3
4
5
6
7
8
9
10
11
12
13
"a"
260
261
262
263
264
265
266
267
1
2
3
4
5
6
7
8
9
10
11
12
13
Drive Timing Chart (Vertical Sync) High Frame Rate Readout Mode
1020
1025
1028
1033
1036
260
261
262
263
264
265
266
267
1
4
1
4
9
12
17
20
25
1020
1025
1028
1033
1036
1
4
1
4
9
12
17
20
25
1020
1025
1028
1033
1036
260
261
262
263
264
265
266
267
1
2
3
4
5
6
7
8
1
4
1
4
9
12
17
ICX285AL
– 18 –
V4
V3
V2B
V2A
V1
HD
H1
27.9 µ sec (800 bits)
392
56
1790
1
84
10 10 10 10 10 10 10 10
3.5 µ sec (100 bits)
70 nsec (2 bits)
Drive Timing Chart (Vertical Sync "a" Enlarged) High Frame Rate Readout Mode
ICX285AL
392
56
1790
1
– 19 –
SUB
Vφ4
Vφ3
Vφ2B
Vφ2A
Vφ1
SHD
SHP
RGφ
Hφ2
Hφ1
CLK
56
1790
1
1
1
1 10
1 10
1
1
1
20
1
30
1
30
30
1
1
50
1
30
1
50
1
30
1
50
50
1
1
105
30
1
1
50
1
30
30
1
1
50
1
Drive Timing Chart (Horizontal Sync) High Frame Rate Readout Mode
30
1
50
1
30
1
50
50
1
1
30
1
50
1
30
30
1
1
50
126
1
30
1
1
50
1
30
1
50
50
1
1
30
1
50
1
30
30
50
30
50
ICX285AL
430
412
392
ICX285AL
Notes on Handling
1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following
protective measures.
a) Either handle bare handed or use non-chargeable gloves, clothes or material.
Also use conductive shoes.
b) When handling directly use an earth band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) Ionized air is recommended for discharge when handling CCD image sensor.
e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges.
2) Soldering
a) Make sure the package temperature does not exceed 80°C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W
soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently.
c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering
tool, use a thermal controller of the zero cross On/Off type and connect it to ground.
3) Dust and dirt protection
Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and
dirt. Clean glass plates with the following operation as required, and use them.
a) Perform all assembly operations in a clean room (class 1000 or less).
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should
dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air
is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving
to a room with great temperature differences.
e) When a protective tape is applied before shipping, just before use remove the tape applied for electrostatic
protection. Do not reuse the tape.
4) Do not expose to strong light (sun rays) for long periods. For continuous using under cruel condition exceeding
the normal using condition, consult our company.
5) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in
such conditions.
6) CCD image sensors are precise optical equipment that should not be subject to too much mechanical shocks.
– 20 –
– 21 –
+ 0.25
0.35
1
20
31.0 ± 0.4
27.0 ± 0.3
AS-A11(E)
DRAWING NUMBER
42 ALLOY
LEAD MATERIAL
5.90g
GOLD PLATING
LEAD TREATMENT
PACKAGE MASS
Ceramic
11
10
0.5
1.27
0.46
A
PACKAGE MATERIAL
0.3 M
26.0 ± 0.25
13.15
PACKAGE STRUCTURE
2.54
1Pin Index
B
+ 0.15
φ2.00 – 0
(Reference Hole)
2-φ2.50 – 0
5.0
C
+ 0.15
20 pin DIP (800mil)
~
D
2-
26.0
~
R
3.
0
9. The thickness of the cover glass is 0.75mm and the refractive index is 1.5.
8. The tilt of the effective image area relative to the bottom “D” is less than 60µm.
7. The height from the bottom “D” to the effective image area is 1.46 ± 0.15mm.
6. The angle of rotation relative to the reference line “B” is less than ± 1˚
5. The center of the effective image area specified relative to the reference hole
is (H, V) = (13.15, 5.0) ± 0.15mm.
4. The bottom “D” is the height reference.(Two points are specified.)
3. The straight line “C” which passes through the center of the reference hole at right angle to vertical
reference line “B” is the reference axis of horizontal direction (H).
2. The straight line “B” which passes through the center of the reference hole and the elongated
hole is the reference axis of vertical direction (V).
1. "A" is the center of the effective image area.
×2.5
2.00 – 0
(Elongated Hole)
20.2 ± 0.3
1.0
0˚ to 9˚
0.25
Unit: mm
3.2 ± 0.3
5.5 ± 0.2
20.32
(AT STAND OFF)
Package Outline
ICX285AL
Sony Corporation
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