LINER LTC4088EDE High effi ciency battery charger/usb power manager Datasheet

LTC4088
High Efficiency Battery
Charger/USB Power Manager
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FEATURES
DESCRIPTIO
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The LTC®4088 is a high efficiency USB PowerPathTM
controller and Li-Ion/Polymer battery charger. It includes
a synchronous switching input regulator, a full-featured
battery charger and an ideal diode. Designed specifically for
USB applications, the LTC4088’s switching regulator automatically limits its input current to either 100mA, 500mA
or 1A for wall-powered applications via logic control.
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Switching Regulator Makes Optimal Use of Limited
Power Available from USB Port to Charge Battery
and Power Application
180mΩ Internal Ideal Diode Plus Optional External
Ideal Diode Controller Seamlessly Provides Low
Loss Power Path When Input Power is Limited or
Unavailable
Full Featured Li-Ion/Polymer Battery Charger
VBUS Operating Range: 4.25V to 5.5V (7V Absolute
Maximum—Transient)
1.2A Maximum Input Current Limit
1.5A Maximum Charge Current with Thermal Limiting
Bat-TrackTM Adaptive Output Control
Slew Control Reduces Switching EMI
Low Profile (0.75mm) 14-Lead 4mm × 3mm DFN
Package
The switching input stage provides power to VOUT where
power sharing between the application circuit and the
battery charger is managed. Unlike linear PowerPath
controllers, the LTC4088’s switching input stage can use
nearly all of the 0.5W or 2.5W available from the USB port
with minimal power dissipation. This feature allows the
LTC4088 to provide more power to the application and
eases thermal issues in space-constrained applications.
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APPLICATIO S
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Media Players
Digital Cameras
GPS
PDAs
Smart Phones
The LTC4088 is available in the low profile 14-Lead 4mm
× 3mm × 0.75mm DFN surface mount package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
PowerPath and Bat-Track are trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 6522118
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An ideal diode ensures that system power is available
from the battery when the input current limit is reached
or if the USB or wall supply is removed.
TYPICAL APPLICATIO
Switching Regulator Efficiency to
System Load (POUT/PBUS)
High Efficiency Battery Charger/USB Power Manager
100
WALL
3.3µH
SYSTEM
LOAD
VBUS
SW VOUT
D0
D1
GATE
LTC4088
D2
BAT
CHRG
LDO3V3
CLPROG
PROG C/X GND NTC
10µF
3.3V
1µF
8.2Ω
0.1µF
2.94k
499Ω
Li-Ion
10µF
80
EFFICIENCY (%)
USB
90
70
BAT = 4.2V
60
BAT = 3.3V
50
40
30
20
+
10
4088 TA01a
VBUS = 5V
IBAT = 0mA
10x MODE
0
0.01
0.1
IOUT (A)
1
4088 TA01b
4088f
1
LTC4088
U
W W
W
ABSOLUTE
AXI U RATI GS
U
W
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PACKAGE/ORDER I FOR ATIO
(Note 1)
VBUS (Transient) t < 1ms, Duty Cycle < 1% .. –0.3V to 7V
VBUS (Static), BAT, ⎯C⎯H⎯R⎯G, NTC, D0,
D1, D2.......................................................... –0.3V to 6V
ICLPROG ....................................................................3mA
IPROG, IC/X ................................................................2mA
ILDO3V3 ...................................................................30mA
I⎯C⎯H⎯R⎯G ......................................................................75mA
IOUT .............................................................................2A
ISW ..............................................................................2A
IBAT .............................................................................2A
Maximum Operating Junction Temperature .......... 125°C
Operating Temperature Range ................. –40°C to 85°C
Storage Temperature Range................... –65°C to 125°C
TOP VIEW
NTC
1
14 D1
CLPROG
2
13 D0
LDO3V3
3
D2
4
C/X
5
10 VOUT
PROG
6
9 BAT
CHRG
7
8 GATE
12 SW
15
11 VBUS
DE PACKAGE
14-LEAD (4mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 37°C/W
EXPOSED PAD (PIN 15) IS GND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER
DE PART MARKING
LTC4088EDE
4088
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, RCLPROG = 2.94k, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Power Supply
●
4.35
●
●
●
●
●
92
445
815
0.32
1.6
VBUS
Input Supply Voltage
IBUS(LIM)
Total Input Current
1x Mode
5x Mode
10x Mode
Low Power Suspend Mode
High Power Suspend Mode
IBUSQ (Note 4)
Input Quiescent Current
1x Mode
5x Mode
10x Mode
Low Power Suspend Mode
High Power Suspend Mode
6
14
14
0.038
0.038
mA
mA
mA
mA
mA
hCLPROG (Note 4) Ratio of Measured VBUS Current to
CLPROG Program Current
1x Mode
5x Mode
10x Mode
Low Power Suspend Mode
High Power Suspend Mode
224
1133
2140
11.3
59.4
mA/mA
mA/mA
mA/mA
mA/mA
mA/mA
IOUT
1x Mode, BAT = 3.3V
5x Mode, BAT = 3.3V
10x Mode, BAT = 3.3V
Low Power Suspend Mode
High Power Suspend Mode
135
672
1251
0.4
2.04
mA
mA
mA
mA
mA
VCLPROG
VOUT Current Available Before
Discharging Battery
CLPROG Servo Voltage in Current Limit
1x, 5x, 10x Modes
Suspend Modes
0.26
1.6
5.5
97
470
877
0.39
2.05
1.188
100
100
500
1000
0.50
2.5
0.41
2.46
V
mA
mA
mA
mA
mA
V
mV
4088f
2
LTC4088
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, RCLPROG = 2.94k, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VUVLO
VBUS Undervoltage Lockout
Rising Threshold
Falling Threshold
MIN
TYP
MAX
UNITS
4.35
3.95
4.30
4.00
V
V
VDUVLO
VBUS to BAT Differential Undervoltage
Lockout
Rising Threshold
Falling Threshold
200
50
mV
mV
VOUT
VOUT Voltage
1x, 5x, 10x Modes, 0V < BAT ≤ 4.2V,
IOUT = 0mA, Battery Charger Off
3.5
USB Suspend Modes, IOUT = 250µA
fOSC
Switching Frequency
RPMOS
PMOS On Resistance
0.18
Ω
RNMOS
NMOS On Resistance
0.30
Ω
IPEAK
Peak Inductor Current Clamp
2
3
A
A
RSUSP
Suspend LDO Output Resistance
15
Ω
BAT + 0.3
4.7
4.5
4.6
4.7
V
1.8
2.25
2.7
MHz
1x, 5x Modes
10x Mode
V
Battery Charger
VFLOAT
BAT Regulated Output Voltage
0°C ≤ TA ≤ 85°C
4.179
4.165
4.200
4.200
4.221
4.235
V
V
980
192
1030
206
1080
220
mA
mA
ICHG
Constant-Current Mode Charge Current
RPROG = 1k
RPROG = 5k
IBAT
Battery Drain Current
VBUS > VUVLO, PowerPath Switching
Regulator On, Battery Charger Off,
IOUT = 0µA
3.5
5
µA
VBUS = 0V, IOUT = 0µA (Ideal Diode Mode)
23
35
µA
VPROG
PROG Pin Servo Voltage
VPROG,TRKL
PROG Pin Servo Voltage in Trickle
Charge
hPROG
Ratio of IBAT to PROG Pin Current
VTRKL
Trickle Charge Threshold Voltage
ΔVTRKL
Trickle Charge Hystersis Voltage
BAT < VTRKL
BAT Rising
2.7
1.000
V
0.100
V
1031
mA/mA
2.85
3.0
135
V
mV
VRECHRG
Recharge Battery Threshold Voltage
Threshold Voltage Relative to VFLOAT
–80
–100
–120
mV
tTERM
Safety Timer Termination Period
Timer Starts when VBAT = VFLOAT
3.2
4.0
4.8
Hour
tBADBAT
Bad Battery Termination Time
BAT < VTRKL
0.4
0.5
0.6
Hour
IC/X
Battery Charge Current at Programmed
End of Charge Indication
RC/X = 1k
RC/X = 5k
85
100
20
115
mA
mA
VC/X
C/X Threshold Voltage
100
mV
hC/X
Battery Charge Current Ratio to C/X
1031
mA/mA
VCHRG
CHRG Pin Output Low Voltage
ICHRG = 5mA
65
100
mV
ICHRG
CHRG Pin Input Current
BAT = 4.5V, VCHRG = 5V
0
1
µA
RON_CHG
Battery Charger Power FET
On-Resistance (Between VOUT and BAT)
IBAT = 200mA
TLIM
Junction Temperature in Constant
Temperature Mode
0.18
Ω
110
°C
4088f
3
LTC4088
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, RCLPROG = 2.94k, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VCOLD
Cold Temperature Fault Threshold
Voltage
Rising Threshold
Hysteresis
75.0
76.5
1.5
78.0
%VBUS
%VBUS
VHOT
Hot Temperature Fault Threshold
Voltage
Falling Threshold
Hysteresis
33.4
34.9
1.5
36.4
%VBUS
%VBUS
VDIS
NTC Disable Threshold Voltage
Falling Threshold
Hysteresis
0.7
1.7
50
2.7
%VBUS
mV
INTC
NTC Leakage Current
VNTC = VBUS = 5V
–50
50
nA
VFWD
Forward Voltage Detection
IOUT = 10mA
VBUS = 0V, IOUT = 10mA
RDROPOUT
Internal Diode On Resistance, Dropout
IOUT = 200mA
IMAX
Diode Current Limit
NTC
Ideal Diode
15
2
mV
mV
0.18
Ω
2
A
Always On 3.3V Supply
VLDO3V3
Regulated Output Voltage
0mA < ILDO3V3 < 25mA
3.1
3.3
3.4
V
ROL3V3
Open-Loop Output Resistance
25
Ω
RCL3V3
Closed-Loop Output Resistance
3.6
Ω
Logic (D0, D1, D2)
VIL
Input Low Voltage
VIH
Input High Voltage
IPD
Static Pull-Down Current
0.4
1.2
VPIN = 1V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC4088E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the – 40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
V
V
2
µA
Note 3: The LTC4088E includes overtemperature protection that is
intended to protect the device during momentary overload conditions.
Junction temperature will exceed 125°C when overtemperature protection
is active. Continuous operation above the specified maximum operating
junction temperature may impair device reliability.
Note 4: Total input current is the sum of quiescent current, IBUSQ, and
measured current given by VCLPROG/RCLPROG • (hCLPROG + 1)
4088f
4
LTC4088
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TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C unless otherwise noted.
Ideal Diode Resistance
vs Battery Voltage
Ideal Diode V-I Characteristics
1.0
4.50
0.20
INTERNAL IDEAL
DIODE ONLY
0.4
0.2
4.25
INTERNAL IDEAL
DIODE
0.15
0.10
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
0.05
VBUS = 0V
VBUS = 5V
0.04
0.12
0.16
0.08
FORWARD VOLTAGE (V)
0
2.7
0.20
3.0
3.6
3.9
3.3
BATTERY VOLTAGE (V)
4088 G01
600
125
VBUS = 5V
RPROG = 1k
RCLPROG = 2.94k
CHARGE CURRENT (mA)
400
300
200
25
VBUS = 5V
RPROG = 1k
RCLPROG = 2.94k
100
75
50
1x USB SETTING,
BATTERY CHARGER SET FOR 1A
2.7
90
90
5x, 10x MODE
88
EFFICIENCY (%)
70
60
3.0
10
1
4088 G07
VBUS = 5V
(SUSPEND MODE)
0
2.7
4.2
3.3
3.6
3.9
BATTERY VOLTAGE (V)
3.0
3.6
3.9
3.3
BATTERY VOLTAGE (V)
4088 G06
50
RCLPROG = 2.94k
RPROG = 1k
IOUT = 0mA
86
80
2.7
IOUT = 0mA
40
5x CHARGING
EFFICIENCY
1x CHARGING
EFFICIENCY
84
4.2
VBUS Current vs VBUS Voltage
(Suspend)
30
20
10
82
50
0.1
OUTPUT CURRENT (A)
15
Battery Charging Efficiency vs
Battery Voltage with No External
Load (PBAT/PBUS)
80
40
0.01
20
4088 G05
PowerPath Switching Regulator
Efficiency vs Output Current
1x MODE
IOUT = 0µA
5
0
4.2
1000
VBUS = 0V
4088 G04
VBAT = 3.8V
600
800
400
OUTPUT CURRENT (mA)
Battery Drain Current
vs Battery Voltage
25
5x USB SETTING,
BATTERY CHARGER SET FOR 1A
0
3.0
3.3
3.6
3.9
2.7
BATTERY VOLTAGE (V)
200
0
4088 G03
VBUS CURRENT (µA)
CHARGE CURRENT (mA)
150
100
EFFICIENCY (%)
3.25
4.2
USB Limited Battery Charge
Current vs Battery Voltage
700
100
VBAT = 3.4V
3.75
4088 G02
USB Limited Battery Charge
Current vs Battery Voltage
500
4.00
3.50
BATTERY CURRENT (µA)
0
OUTPUT VOLTAGE (V)
0.6
0
VBUS = 5V
5x MODE
VBAT = 4V
RESISTANCE (Ω)
CURRENT (A)
0.25
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
0.8
Output Voltage vs Output Current
(Battery Charger Disabled)
3.0
3.6
3.9
3.3
BATTERY VOLTAGE (V)
4.2
4088 G08
0
1
2
4
3
VBUS VOLTAGE (V)
5
6
4088 G09
4088f
5
LTC4088
U W
TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C unless otherwise noted.
VBUS Current vs Output Current in
Suspend
5.0
2.5
VBUS CURRENT (mA)
OUTPUT VOLTAGE (V)
2.0
4.0
3.5
1x MODE
3.0
2.5
0.5
VBAT = 3.9V, 4.2V
5x MODE
1.5
1.0
0
2.5
0.5
1.5
2
1
OUTPUT LOAD CURRENT (mA)
0
4088 G10
5
0
15
20
10
LOAD CURRENT (mA)
4088 G11
Battery Charge Current vs
Temperature
25
4088 G12
Battery Charger Float Voltage vs
Temperature
Low-Battery (Instant-On) Output
Voltage vs Temperature
4.21
600
3.68
VBAT = 2.7V
IOUT = 100mA
5x MODE
500
400
THERMAL REGULATION
300
200
OUTPUT VOLTAGE (V)
4.20
FLOAT VOLTAGE (V)
CHARGE CURRENT (mA)
VBAT = 3.6V
VBAT = 3V
VBAT = 3.1V
VBAT = 3.2V
VBAT = 3.3V
2.8
2.6
2.5
VBAT = 3.5V
3.0
1x MODE
1.5
2
1
OUTPUT CURRENT (mA)
VBAT = 3.4V
3.2
0.5
VBUS = 5V
VBAT = 3.3V
RCLPROG = 2.94k
0
3.4
VBUS = 5V
VBAT = 3.3V
RCLPROG = 2.94k
5x MODE
4.5
3.3V LDO Output Voltage
vs Load Current, VBUS = 0V
OUTPUT VOLTAGE (V)
Output Voltage vs Output Current
in Suspend
4.19
4.18
3.66
3.64
3.62
100
0
–40 –20
0
20 40 60 80
TEMPERATURE (°C)
4.17
–40
100 120
–15
35
10
TEMPERATURE (°C)
60
Oscillator Frequency vs
Temperature
15
VBUS = 5V
IOUT = 0µA
46
5x MODE
2.20
2.15
QUIESCENT CURRENT (mA)
QUIESCENT CURRENT (mA)
2.25
35
10
TEMPERATURE (°C)
60
85
Quiescent Current in Suspend vs
Temperature
44
2.30
–15
4088 G15
VBUS Quiescent Current vs
Temperature
2.35
FREQUENCY (MHz)
3.60
–40
4088 G14
4088 G13
2.10
–40
85
12
9
1x MODE
6
VBUS = 5V
IOUT = 0mA
SUSP HI
42
40
38
36
–15
35
10
TEMPERATURE (°C)
60
85
4088 G16
3
–40
–15
35
10
TEMPERATURE (°C)
60
85
4088 G17
34
–40
–15
10
35
TEMPERATURE (°C)
60
85
4088 G18
4088f
6
LTC4088
U W
TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C unless otherwise noted.
CHRG Pin Current vs Voltage
(Pull-Down State)
CHRG PIN CURRENT (mA)
100
3.3V LDO Transient Response
(5mA to 15mA)
Suspend LDO Transient Response
(500µA to 1mA)
VBUS = 5V
VBAT = 3.8V
80
ILDO3V3
5mA/DIV
IOUT
500µA/DIV
60
0mA
0mA
40
VLDO3V3
20mV/DIV
AC COUPLED
VOUT
20mV/DIV
AC COUPLED
20
VBAT = 3.8V
0
0
1
3
4
2
CHRG PIN VOLTAGE (V)
20µs/DIV
4088 G20
500µs/DIV
4088 G21
5
4088 G19
U
U
U
PI FU CTIO S
NTC (Pin 1): Input to the NTC Thermistor Monitoring
Circuits. The NTC pin connects to a negative temperature
coefficient thermistor which is typically co-packaged with
the battery pack to determine if the battery is too hot or
too cold to charge. If the battery’s temperature is out of
range, charging is paused until the battery temperature reenters the valid range. A low drift bias resistor is required
from VBUS to NTC and a thermistor is required from NTC
to ground. If the NTC function is not desired, the NTC pin
should be grounded.
CLPROG (Pin 2): USB Current Limit Program and Monitor
Pin. A 1% resistor from CLPROG to ground determines
the upper limit of the current drawn from the VBUS pin.
A precise fraction of the input current, hCLPROG, is sent
to the CLPROG pin when the high side switch is on. The
switching regulator delivers power until the CLPROG
pin reaches 1.188V. Therefore, the current drawn from
VBUS will be limited to an amount given by hCLPROG and
RCLPROG. There are several ratios for hCLPROG available,
two of which correspond to the 500mA and 100mA USB
specifications. A multilayer ceramic averaging capacitor
is also required at CLPROG for filtering.
LDO3V3 (Pin 3): LDO Output. The LDO3V3 pin provides
a regulated, always-on 3.3V supply voltage. This pin gets
its power from VOUT. It may be used for light loads such
as a real-time clock or housekeeping microprocessor. A
1µF capacitor is required from LDO3V3 to ground if it will
be called upon to deliver current. If the LDO3V3 output is
not used it should be disabled by connecting it to VOUT.
D2 (Pin 4): Mode Select Input Pin. D2, in combination
with the D0 pin and D1 pin, controls the current limit and
battery charger functions of the LTC4088 (see Table 1).
This pin is pulled low by a weak current sink.
C/X (Pin 5): End of Charge Indication Program Pin. This pin
is used to program the current level at which a completed
charge cycle is indicated by the ⎯C⎯H⎯R⎯G pin.
PROG (Pin 6): Charge Current Program and Charge Current Monitor Pin. Connecting a 1% resistor from PROG
to ground programs the charge current. If sufficient input
power is available in constant-current mode, this pin servos
to 1V. The voltage on this pin always represents the actual
charge current by using the following formula:
IBAT =
VPROG
• 1031
RPROG
4088f
7
LTC4088
U
U
U
PI FU CTIO S
⎯C⎯H⎯R⎯G (Pin 7): Open-Drain Charge Status Output. The
⎯C⎯H⎯R⎯G pin indicates the status of the battery charger. Four
possible states are represented by ⎯C⎯H⎯R⎯G: charging, not
charging (or float charge current less than programmed
end of charge indication current), unresponsive battery and
battery temperature out of range. ⎯C⎯H⎯R⎯G is modulated at
35kHz and switches between a low and a high duty cycle
for easy recognition by either humans or microprocessors.
⎯C⎯H⎯R⎯G requires a pull-up resistor and/or LED to provide
indication.
GATE (Pin 8): Ideal Diode Amplifier Output. This pin controls the gate of an optional external P-channel MOSFET
transistor used to supplement the internal ideal diode. The
source of the P-channel MOSFET should be connected to
VOUT and the drain should be connected to BAT.
BAT (Pin 9): Single Cell Li-Ion Battery Pin. Depending on
available power and load, a Li-Ion battery on BAT will either
deliver system power to VOUT through the ideal diode or
be charged from the battery charger.
VOUT (Pin 10): Output voltage of the switching PowerPath controller and input voltage of the battery charger.
The majority of the portable product should be powered
from VOUT. The LTC4088 will partition the available power
between the external load on VOUT and the internal battery
charger. Priority is given to the external load and any extra
power is used to charge the battery. An ideal diode from
BAT to VOUT ensures that VOUT is powered even if the load
exceeds the allotted power from VBUS or if the VBUS power
source is removed. VOUT should be bypassed with a low
impedance multilayer ceramic capacitor.
VBUS (Pin 11): Input voltage for the switching PowerPath
controller. VBUS will usually be connected to the USB port
of a computer or a DC output wall adapter. VBUS should
be bypassed with a low impedance multilayer ceramic
capacitor.
SW (Pin 12): The SW pin delivers power from VBUS to
VOUT via the step-down switching regulator. An inductor
should be connected from SW to VOUT. See the Applications Information section for a discussion of inductance
value and current rating.
D0 (Pin 13): Mode Select Input Pin. D0, in combination
with the D1 pin and the D2 pin, controls the current limit
and battery charger functions of the LTC4088 (see Table 1).
This pin is pulled low by a weak current sink.
D1 (Pin 14): Mode Select Input Pin. D1, in combination
with the D0 pin and the D2 pin, controls the current limit
and battery charger functions of the LTC4088 (see Table 1).
This pin is pulled low by a weak current sink.
Exposed Pad (Pin 15): GND. Must be soldered to the
PCB to provide a low electrical and thermal impedance
connection to ground.
4088f
8
T NTC
1
2
0.1V
NTC
VBUS
1.188V
CLPROG
+
–
+
–
+
–
+
–
ISWITCH/N ILDO/M
+
–
NTC ENABLE
OVERTEMP
UNDERTEMP
AVERAGE INPUT
CURRENT LIMIT
CONTROLLER
SUSPEND
LDO
100mV
NTC FAULT
OSC
4.6V
– +
Q
D0
13
D1
14
LOGIC
AVERAGE OUTPUT
VOLTAGE LIMIT
CONTROLLER
PWM
R
S
4
D2
NONOVERLAP
AND DRIVE
LOGIC
3.6V
GND
15
+–
0.3V
1V
6
PROG
IBAT/1031
CONSTANT CURRENT
CONSTANT VOLTAGE
BATTERY CHARGER
+
–
VBUS
5
C/X
BAD
CELL
NTC
IBAT/1031
100mV
15mV
0V
PWM
+
–
ALWAYS ON
3.3V LDO
IDEAL
DIODE
–
+
+
+
–
11
+
–
TO USB
OR WALL
ADPAPTER
7
9
8
10
3
12
4088 BD
CHRG
BAT
GATE
VOUT
LDO3V3
SW
SINGLE
CELL
Li-Ion
+
OPTIONAL
EXTERNAL
IDEAL DIODE
PMOS
TO 3.3V
LOAD
TO SYSTEM
LOAD
LTC4088
BLOCK DIAGRA
4088f
9
W
LTC4088
U
OPERATIO
Introduction
Input Current Limited Step Down Switching Regulator
The LTC4088 includes a PowerPath controller, battery
charger, internal ideal diode, optional external ideal diode
controller, SUSPEND LDO and an always-on 3.3V LDO.
Designed specifically for USB applications, the PowerPath
controller incorporates a precision average input current
limited step-down switching regulator to make maximum
use of the allowable USB power. Because power is conserved, the LTC4088 allows the load current on VOUT to
exceed the current drawn by the USB port without exceeding the USB load specifications.
The power delivered from VBUS to VOUT is controlled
by a 2.25MHz constant frequency step-down switching
regulator. To meet the USB maximum load specification,
the switching regulator contains a measurement and
control system that ensures that the average input current remains below the level programmed at CLPROG.
VOUT drives the combination of the external load and the
battery charger.
The switching regulator and battery charger communicate
to ensure that the average input current never exceeds the
USB specifications.
The ideal diodes from BAT to VOUT guarantee that ample
power is always available to VOUT even if there is insufficient or absent power at VBUS.
To prevent battery drain when a device is connected to a
suspended USB port, an LDO from VBUS to VOUT provides
either low power or high power suspend current to the
application.
Finally, an “always on” LDO provides a regulated 3.3V from
VOUT. This LDO will be on at all times and can be used to
supply up to 25mA to a system microprocessor.
TO USB
OR WALL
ADAPTER
11
If the combined load does not cause the switching power
supply to reach the programmed input current limit, VOUT
will track approximately 0.3V above the battery voltage.
By keeping the voltage across the battery charger at this
low level, power lost to the battery charger is minimized.
Figure 1 shows the power path components.
If the combined external load plus battery charge current is
large enough to cause the switching power supply to reach
the programmed input current limit, the battery charger
will reduce its charge current by precisely the amount
necessary to enable the external load to be satisfied. Even
if the battery charge current is programmed to exceed the
allowable USB current, the USB specification for average
input current will not be violated; the battery charger will
reduce its current as needed. Furthermore, if the load current at VOUT exceeds the programmed power from VBUS,
VBUS
SW
ISWITCH/N
VOUT
PWM AND
GATE DRIVE
IDEAL
DIODE
CONSTANT CURRENT
CONSTANT VOLTAGE
BATTERY CHARGER
OV
15mV
CLPROG
1.188V
–
+
AVERAGE INPUT
CURRENT LIMIT
CONTROLLER
+
+
–
2
–
+
+
–
GATE
SYSTEM LOAD
3.5V TO
(BAT + 0.3V)
12
10
OPTIONAL
EXTERNAL
IDEAL DIODE
PMOS
8
0.3V
3.6V
+–
BAT
9
AVERAGE OUTPUT
VOLTAGE LIMIT
CONTROLLER
+
SINGLE CELL
Li-Ion
4088 F01
Figure 1
4088f
10
LTC4088
U
OPERATIO
The current at CLPROG is a precise fraction of the VBUS
current. When a programming resistor and an averaging
capacitor are connected from CLPROG to GND, the voltage
on CLPROG represents the average input current of the
switching regulator. As the input current approaches the
programmed limit, CLPROG reaches 1.188V and power
delivered by the switching regulator is held constant.
Several ratios of current are available which can be set
to correspond to USB low and high power modes with a
single programming resistor.
The input current limit is programmed by various combinations of the D0, D1 and D2 pins as shown in Table 1.
The switching input regulator can also be deactivated
(USB Suspend).
The average input current will be limited by the CLPROG programming resistor according to the following expression:
IVBUS = IBUSQ +
VCLPROG
• (hCLPROG + 1)
RCLPROG
where IBUSQ is the quiescent current of the LTC4088,
VCLPROG is the CLPROG servo voltage in current limit,
RCLPROG is the value of the programming resistor and
hCLPROG is the ratio of the measured current at VBUS to
the sample current delivered to CLPROG. Refer to the
Electrical Characteristics table for values of hCLPROG,
VCLPROG and IBUSQ. Given worst-case circuit tolerances,
the USB specification for the average input current of 1x
or 5x mode will not be violated, provided that RCLPROG is
2.94k or greater.
Table 1 shows the available settings for the D0, D1 and
D2 pins.
Notice that when D0 is high and D1 is low, the switching
regulator is set to a higher current limit for increased
charging and power availability at VOUT. These modes
will typically be used when there is line power available
from a wall adapter.
While not in current limit, the switching regulator’s BatTrack feature will set VOUT to approximately 300mV above
Table 1. Controlled Input Current Limit
D0
D1
D2
CHARGER
STATUS
IBUS(LIM)
0
0
0
On
100mA (1x)
0
0
1
Off
100mA (1x)
0
1
0
On
500mA (5x)
0
1
1
Off
500mA (5x)
1
0
0
On
1A (10x)
1
0
1
Off
1A (10x)
1
1
0
Off
500µA (Susp Low)
1
1
1
Off
2.5mA (Susp High)
the voltage at BAT. However, if the voltage at BAT is below
3.3V, and the load requirement does not cause the switching
regulator to exceed its current limit, VOUT will regulate at a
fixed 3.6V as shown in Figure 2. This will allow a portable
product to run immediately when power is applied without
waiting for the battery to charge.
If the load does exceed the current limit at VBUS, VOUT will
range between the no-load voltage and slighly below the
battery voltage, indicated by the shaded region of Figure 2.
If there is no battery present when this happens, VOUT may
collapse to ground.
The voltage regulation loop compensation is controlled by
the capacitance on VOUT. An MLCC capacitor of 10µF is
required for loop stability. Additional capacitance beyond
this value will improve transient response.
4.5
4.2
3.9
VOUT (V)
load current will be drawn from the battery via the ideal
diodes even when the battery charger is enabled.
NO LOAD
3.6
300mV
3.3
3.0
2.7
2.4
2.4
2.7
3.0
3.6
3.3
BAT (V)
3.9
4.2
4088 F02
Figure 2. VOUT vs BAT
4088f
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LTC4088
U
OPERATIO
Ideal Diode from BAT to VOUT
The LTC4088 has an internal ideal diode as well as a
controller for an optional external ideal diode. Both the
internal and the external ideal diodes are always on and
will respond quickly whenever VOUT drops below BAT.
If the load current increases beyond the power allowed
from the switching regulator, additional power will be pulled
from the battery via the ideal diodes. Furthermore, if power
to VBUS (USB or wall power) is removed, then all of the
application power will be provided by the battery via the
ideal diodes. The ideal diodes will be fast enough to keep
VOUT from drooping with only the storage capacitance
required for the switching regulator. The internal ideal
diode consists of a precision amplifier that activates a
large on-chip MOSFET transistor whenever the voltage at
VOUT is approximately 15mV (VFWD) below the voltage at
BAT. Within the amplifier’s linear range, the small-signal
resistance of the ideal diode will be quite low, keeping
the forward drop near 15mV. At higher current levels, the
MOSFET will be in full conduction. The on-resistance in
this case is approximately 180mΩ. If this is sufficient for
the application, then no external components are necessary. However, if more conductance is needed, an external
P-channel MOSFET transistor can be added from BAT to
VOUT. The GATE pin of the LTC4088 drives the gate of the
P-channel MOSFET transistor for automatic ideal diode
control. The source of the external P-channel MOSFET
should be connected to VOUT and the drain should be
2200
VISHAY Si2333
OPTIONAL EXTERNAL
IDEAL DIODE
2000
1800
CURRENT (mA)
1600
1400
LTC4088
IDEAL DIODE
1200
1000
connected to BAT. Capable of driving a 1nF load, the GATE
pin can control an external P-channel MOSFET transistor
having an on-resistance of 30mΩ or lower. When VBUS is
unavailable, the forward voltage of the ideal diode amplifier
will be reduced from 15mV to nearly zero.
Suspend LDO
The LTC4088 provides a small amount of power to VOUT in
SUSPEND mode by including an LDO from VBUS to VOUT.
This LDO will prevent the battery from running down when
the portable product has access to a suspended USB port.
Regulating at 4.6V, this LDO only becomes active when
the switching converter is disabled. To remain compliant
with the USB specification, the input to the LDO is current
limited so that it will not exceed the low power or high
power suspend specification. If the load on VOUT exceeds
the suspend current limit, the additional current will come
from the battery via the ideal diodes. The suspend LDO
sends a scaled copy of the VBUS current to the CLPROG
pin, which will servo to approximately 100mV in this mode.
Thus, the high power and low power suspend settings are
related to the levels programmed by the same resistor for
1x and 5x modes.
3.3V Always-On Supply
The LTC4088 includes an ultralow quiescent current low
dropout regulator that is always powered. This LDO can be
used to provide power to a system pushbutton controller or
standby microcontroller. Designed to deliver up to 25mA,
the always-on LDO requires a 1µF MLCC bypass capacitor
for compensation. The LDO is powered from VOUT, and
therefore will enter dropout at loads less than 25mA as
VOUT falls near 3.3V. If the LDO3V3 output is not used, it
should be disabled by connecting it to VOUT.
VBUS Undervoltage Lockout (UVLO)
800
600
ON
SEMICONDUCTOR
MBRM120LT3
400
200
VBUS = 5V
0
0
60 120 180 240 300 360 420 480
FORWARD VOLTAGE (mV) (BAT – VOUT)
4088 F03
Figure 3. Ideal Diode V-I Characteristics
An internal undervoltage lockout circuit monitors VBUS and
keeps the switching regulator off until VBUS rises above the
rising UVLO threshold (4.3V). If VBUS falls below the falling
UVLO threshold (4V), system power at VOUT will be drawn
from the battery via the ideal diodes. The voltage at VBUS
must also be higher than the voltage at BAT by approximately 170mV for the switching regulator to operate.
4088f
12
LTC4088
U
OPERATIO
Battery Charger
The LTC4088 includes a constant-current/constant-voltage battery charger with automatic recharge, automatic
termination by safety timer, low voltage trickle charging,
bad cell detection and thermistor sensor input for out of
temperature charge pausing.
When a battery charge cycle begins, the battery charger
first determines if the battery is deeply discharged. If the
battery voltage is below VTRKL, typically 2.85V, an automatic
trickle charge feature sets the battery charge current to
10% of the programmed value. If the low voltage persists
for more than 1/2 hour, the battery charger automatically
terminates and indicates, via the ⎯C⎯H⎯R⎯G pin, that the battery was unresponsive.
Once the battery voltage is above VTRKL, the charger begins
charging in full power constant-current mode. The current
delivered to the battery will try to reach 1031V/RPROG.
Depending on available input power and external load
conditions, the battery charger may or may not be able to
charge at the full programmed rate. The external load will
always be prioritized over the battery charge current. The
USB current limit programming will always be observed
and only additional power will be available to charge the
battery. When system loads are light, battery charge current will be maximized.
VRECHRG (typically 4.1V). In the event that the safety timer
is running when the battery voltage falls below VRECHRG, it
will reset back to zero. To prevent brief excursions below
VRECHRG from resetting the safety timer, the battery voltage
must be below VRECHRG for more than 1.5ms. The charge
cycle and safety timer will also restart if the VBUS UVLO
cycles low and then high (e.g., VBUS is removed and then
replaced) or if the charger is momentarily disabled using
the D2 pin.
Charge Current
The charge current is programmed using a single resistor
from PROG to ground. 1/1031th of the battery charge current is delivered to PROG, which will attempt to servo to
1.000V. Thus, the battery charge current will try to reach
1031 times the current in the PROG pin. The program
resistor and the charge current are calculated using the
following equations:
RPROG =
In either the constant-current or constant-voltage charging
modes, the voltage at the PROG pin will be proportional
to the actual charge current delivered to the battery. The
charge current can be determined at any time by monitoring
the PROG pin voltage and using the following equation:
Charge Termination
The battery charger has a built-in safety timer. Once the
voltage on the battery reaches the pre-programmed float
voltage of 4.200V, the charger will regulate the battery
voltage there and the charge current will decrease naturally.
Once the charger detects that the battery has reached
4.200V, the 4-hour safety timer is started. After the safety
timer expires, charging of the battery will discontinue and
no more current will be delivered.
Automatic Recharge
Once the battery charger terminates, it will remain off
drawing only microamperes of current from the battery.
If the portable product remains in this state long enough,
the battery will eventually self discharge. To ensure that
the battery is always topped off, a charge cycle will automatically begin when the battery voltage falls below
1031V
1031V
, ICHG =
ICHG
RPROG
IBAT =
VPROG
• 1031
RPROG
In many cases, the actual battery charge current, IBAT, will
be lower than the programmed current, ICHG, due to limited
input power available and prioritization to the system load
drawn from VOUT.
Charge Status Indication
The ⎯C⎯H⎯R⎯G pin indicates the status of the battery charger.
⎯ H
⎯ R
⎯ G
⎯ which include
Four possible states are represented by C
charging, not charging (or float charge current less than
programmed end of charge indication current), unresponsive battery and battery temperature out of range.
The signal at the ⎯C⎯H⎯R⎯G pin can be easily recognized
as one of the above four states by either a human or a
4088f
13
LTC4088
U
OPERATIO
microprocessor. An open-drain output, the ⎯C⎯H⎯R⎯G pin can
drive an indicator LED through a current limiting resistor for human interfacing or simply a pull-up resistor for
microprocessor interfacing.
To make the ⎯C⎯H⎯R⎯G pin easily recognized by both humans
and microprocessors, the pin is either a DC signal of ON
for charging, OFF for not charging or it is switched at high
frequency (35kHz) to indicate the two possible faults. While
switching at 35kHz, its duty cycle is modulated at a slow
rate that can be recognized by a human.
⎯ H
⎯ R
⎯ G
⎯ is pulled low and remains low
When charging begins, C
for the duration of a normal charge cycle. When charging
is complete, as determined by the criteria set by the C/X
pin, the ⎯C⎯H⎯R⎯G pin is released (Hi-Z). The ⎯C⎯H⎯R⎯G pin does
not respond to the C/X threshold if the LTC4088 is in VBUS
current limit. This prevents false end of charge indications
due to insufficient power available to the battery charger. If
a fault occurs while charging, the pin is switched at 35kHz.
While switching, its duty cycle is modulated between a high
and low value at a very low frequency. The low and high
duty cycles are disparate enough to make an LED appear
to be on or off thus giving the appearance of “blinking”.
Each of the two faults has its own unique “blink” rate for
human recognition as well as two unique duty cycles for
machine recognition.
Table 2 illustrates the four possible states of the ⎯C⎯H⎯R⎯G
pin when the battery charger is active.
Table 2. ⎯C⎯H⎯R⎯G Signal
STATUS
FREQUENCY
MODULATION
(BLINK) FREQUENCY
DUTY
CYCLES
Charging
0Hz
0Hz (Low Z)
100%
IBAT < C/X
0Hz
0Hz (Hi-Z)
0%
NTC Fault
35kHz
1.5Hz at 50%
6.25% or 93.75%
Bad Battery
35kHz
6.1Hz at 50%
12.5% or 87.5%
Notice that an NTC fault is represented by a 35kHz pulse
train whose duty cycle toggles between 6.25% and 93.75%
at a 1.5Hz rate. A human will easily recognize the 1.5Hz
rate as a “slow” blinking which indicates the out of range
battery temperature while a microprocessor will be able
to decode either the 6.25% or 93.75% duty cycles as an
NTC fault.
If a battery is found to be unresponsive to charging (i.e.,
its voltage remains below 2.85V for 1/2 hour), the ⎯C⎯H⎯R⎯G
pin gives the battery fault indication. For this fault, a human
would easily recognize the frantic 6.1Hz “fast” blink of the
LED while a microprocessor would be able to decode either
the 12.5% or 87.5% duty cycles as a bad cell fault.
Because the LTC4088 is a 3-terminal PowerPath product,
system load is always prioritized over battery charging.
Due to excessive system load, there may not be sufficient
power to charge the battery beyond the bad cell threshold
voltage within the bad cell timeout period. In this case the
battery charger will falsely indicate a bad cell. System
software may then reduce the load and reset the battery
charger to try again.
Although very improbable, it is possible that a duty cycle
reading could be taken at the bright-dim transition (low
duty cycle to high duty cycle). When this happens the
duty cycle reading will be precisely 50%. If the duty cycle
reading is 50%, system software should disqualify it and
take a new duty cycle reading.
C/X Determination
The current exiting the C/X pin represents 1/1031th of
the battery charge current. With a resistor from C/X to
ground that is X/10 times the resistor at the PROG pin,
the ⎯C⎯H⎯R⎯G pin releases when the battery current drops to
C/X. For example, if C/10 detection is desired, RC/X should
be made equal to RPROG. For C/20, RC/X would be twice
RPROG. The current threshold at which ⎯C⎯H⎯R⎯G will change
state is given by:
IBAT =
VC / X
• 1031
RC / X
With this design, C/10 detection can be achieved with only
one resistor rather than a resistor for both the C/X pin and
the PROG pin. Since both of these pins have 1/1031 of the
battery charge current in them, their voltages will be equal
when they have the same resistor value. Therefore, rather
than using two resistors, the C/X pin and the PROG pin can
be connected together and the resistors can be paralleled
to a single resistor of 1/2 of the program resistor.
4088f
14
LTC4088
U
OPERATIO
NTC Thermistor
Thermal Regulation
The battery temperature is measured by placing a negative temperature coefficient (NTC) thermistor close to
the battery pack. The NTC circuitry is shown in the Block
Diagram.
To prevent thermal damage to the IC or surrounding components, an internal thermal feedback loop will automatically
decrease the programmed charge current if the die temperature rises to approximately 110°C. Thermal regulation
protects the LTC4088 from excessive temperature due to
high power operation or high ambient thermal conditions,
and allows the user to push the limits of the power handling capability with a given circuit board design without
risk of damaging the LTC4088 or external components.
The benefit of the LTC4088 thermal regulation loop is that
charge current can be set according to actual conditions
rather than worst-case conditions for a given application
with the assurance that the charger will automatically
reduce the current in worst-case conditions.
To use this feature, connect the NTC thermistor, RNTC,
between the NTC pin and ground and a bias resistor, RNOM,
from VBUS to NTC. RNOM should be a 1% resistor with
a value equal to the value of the chosen NTC thermistor
at 25°C (R25). A 100k thermistor is recommended since
thermistor current is not measured by the LTC4088 and
will have to be considered for USB compliance.
The LTC4088 will pause charging when the resistance of
the NTC thermistor drops to 0.54 times the value of R25 or
approximately 54k (for a Vishay “Curve 1” thermistor, this
corresponds to approximately 40°C). If the battery charger
is in constant voltage (float) mode, the safety timer also
pauses until the thermistor indicates a return to a valid
temperature. As the temperature drops, the resistance of
the NTC thermistor rises. The LTC4088 is also designed
to pause charging when the value of the NTC thermistor
increases to 3.25 times the value of R25. For a Vishay
“Curve 1” thermistor, this resistance, 325k, corresponds
to approximately 0°C. The hot and cold comparators each
have approximately 3°C of hysteresis to prevent oscillation
about the trip point. Grounding the NTC pin disables all
NTC functionality.
Shutdown Mode
For autonomous battery charger operation, D2 should
be permanently grounded. However, for more control
via software the LTC4088’s battery charger can be independently disabled by bringing the D2 pin above VIH. D2
must also be brought high to enable high power (2.5mA)
suspend mode.
The input switching regulator is enabled whenever VBUS
is above the UVLO voltage and the LTC4088 is not in one
of the two USB suspend modes (500µA or 2.5mA).
The ideal diode is enabled at all times and cannot be
disabled.
4088f
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LTC4088
U
W
U
U
APPLICATIO S I FOR ATIO
CLPROG Resistor and Capacitor
As described in the Step-Down Input Regulator section,
the resistor on the CLPROG pin determines the average
input current limit in each of the six current limit modes.
The input current will be comprised of two components,
the current that is used to drive VOUT and the quiescent
current of the switching regulator. To ensure that the USB
specification is strictly met, both components of input current should be considered. The Electrical Characteristics
table gives the typical values for quiescent currents in all
settings as well as current limit programming accuracy.
To get as close to the 500mA or 100mA specifications as
possible, a precision resistor should be used.
An averaging capacitor is required in parallel with the
resistor so that the switching regulator can determine
the average input current. This capacitor also provides
the dominant pole for the feedback loop when current
limit is reached. To ensure stability, the capacitor on
CLPROG should be 0.47µF or larger. Alternatively, faster
transient response may be achieved with 0.1µF in series
with 8.2Ω.
Choosing the Inductor
Because the average input current circuit does not measure
reverse current (i.e., current from VOUT to VBUS), current reversal in the inductor at light loads will contribute
an error to the VBUS current measurement. The error is
conservative in that if the current reverses, the voltage
at CLPROG will be higher than what would represent the
actual average input current drawn. The current available
for charging and the system load is thus reduced. The
USB specification will not be violated.
This reduction in available VBUS current will happen when
the peak-peak inductor ripple is greater than twice the
average current limit setting. For example, if the average
current limit is set to 100mA, the peak-peak ripple should
not exceed 200mA. If the input current is less than 100mA,
the measurement accuracy may be reduced, but it does
not affect the average current loop since it will not be in
regulation.
The LTC4088 includes a current-reversal comparator which
monitors inductor current and disables the synchronous
rectifier as current approaches zero. This comparator will
minimize the effect of current reversal on the average input
current measurement. For some low inductance values,
however, the inductor current may reverse slightly. This
value depends on the speed of the comparator in relation
to the slope of the current waveform, given by VL/L, where
VL is the voltage across the inductor (approximately –VOUT)
and L is the inductance value.
An inductance value of 3.3µH is a good starting value. The
ripple will be small enough for the regulator to remain in
continuous conduction at 100mA average VBUS current. At
lighter loads the current-reversal comparator will disable
the synchronous rectifier at a current slightly above 0mA. As
the inductance is reduced from this value, the part will enter
discontinuous conduction mode at progressively higher
loads. Ripple at VOUT will increase, directly proportionally
to the magnitude of inductor ripple. Transient response,
however, will be improved. The current mode controller
controls inductor current to exactly the amount required
by the load to keep VOUT in regulation. A transient load
step requires the inductor current to change to a new level.
Since inductor current cannot change instantaneously, the
capacitance on VOUT delivers or absorbs the difference in
current until the inductor current can change to meet the
new load demand. A smaller inductor changes its current
more quickly for a given voltage drive than a larger inductor,
resulting in faster transient response. A larger inductor will
reduce output ripple and current ripple, but at the expense
of reduced transient performance (or more CVOUT required)
and a physically larger inductor package size.
The input regulator has an instantaneous peak current
clamp to prevent the inductor from saturating during transient load or start-up conditions. The clamp is designed
so that it does not interfere with normal operation at
high loads with reasonable inductor ripple. It will prevent
inductor current runaway in case of a shorted output.
The DC winding resistance and AC core losses of the
inductor will affect efficiency, and therefore available
output power. These effects are difficult to characterize
and vary by application. Some inductors which may be
suitable for this application are listed in Table 3.
4088f
16
LTC4088
U
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APPLICATIO S I FOR ATIO
Table 3. Recommended Inductors for the LTC4088
INDUCTOR TYPE
L
(µH)
MAX IDC MAX DCR
(A)
(Ω)
LPS4018
3.3
2.2
0.08
3.9 × 3.9 × 1.7
Coilcraft
www.coilcraft.com
D53LC
DB318C
3.3
3.3
2.26
1.55
0.034
0.070
5×5×3
3.8 × 3.8 × 1.8
Toko
www.toko.com
WE-TPC Type M1
3.3
1.95
0.065
4.8 × 4.8 × 1.8
Wurth Elektronik
www.we-online.com
CDRH6D12
CDRH6D38
3.3
3.3
2.2
3.5
0.0625
0.020
6.7 × 6.7 × 1.5
7×7×4
Sumida
www.sumida.com
VBUS and VOUT Bypass Capacitors
The style and value of capacitors used with the LTC4088
determine several important parameters such as regulator control-loop stability and input voltage ripple. Because
the LTC4088 uses a step-down switching power supply
from VBUS to VOUT, its input current waveform contains
high frequency components. It is strongly recommended
that a low equivalent series resistance (ESR) multilayer
ceramic capacitor be used to bypass VBUS. Tantalum and
aluminum capacitors are not recommended because
of their high ESR. The value of the capacitor on VBUS
directly controls the amount of input ripple for a given
load current. Increasing the size of this capacitor will
reduce the input ripple. The USB specification allows a
maximum of 10µF to be connected directly across the
USB power bus. If additional capacitance is required
for noise performance, a soft-connect circuit may be
required to limit inrush current and avoid excessive
transient voltage drops on the bus (see Figure 5).
To prevent large VOUT voltage steps during transient
load conditions, it is also recommended that a ceramic
capacitor be used to bypass VOUT. The output capacitor is
used in the compensation of the switching regulator. At
least 10µF with low ESR are required on VOUT. Additional
capacitance will improve load transient performance
and stability.
Multilayer ceramic chip capacitors typically have exceptional ESR performance. MLCCs combined with a tight
board layout and an unbroken ground plane will yield very
good performance and low EMI emissions.
There are several types of ceramic capacitors available each having considerably different characteristics.
SIZE IN mm
(L × W × H)
MANUFACTURER
For example, X7R ceramic capacitors have the best voltage
and temperature stability. X5R ceramic capacitors have
apparently higher packing density but poorer performance
over their rated voltage and temperature ranges. Y5V
ceramic capacitors have the highest packing density,
but must be used with caution, because of their extreme
nonlinear characteristic of capacitance versus voltage. The
actual in-circuit capacitance of a ceramic capacitor should
be measured with a small AC signal and DC bias as is
expected in-circuit. Many vendors specify the capacitance
verse voltage with a 1VRMS AC test signal and, as a result,
over state the capacitance that the capacitor will present
in the application. Using similar operating conditions as
the application, the user must measure or request from
the vendor the actual capacitance to determine if the
selected capacitor meets the minimum capacitance that
the application requires.
Overprogramming the Battery Charger
The USB high power specification allows for up to 2.5W
to be drawn from the USB port. The switching regulator
transforms the voltage at VBUS to just above the voltage
at BAT with high efficiency, while limiting power to less
than the amount programmed at CLPROG. The charger
should be programmed (with the PROG pin) to deliver the
maximum safe charging current without regard to the USB
specifications. If there is insufficient current available to
charge the battery at the programmed rate, it will reduce
charge current until the system load on VOUT is satisfied
and the VBUS current limit is satisfied. Programming the
charger for more current than is available will not cause
the average input current limit to be violated. It will merely
allow the battery charger to make use of all available
4088f
17
LTC4088
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APPLICATIO S I FOR ATIO
power to charge the battery as quickly as possible, and
with minimal power dissipation within the charger.
Alternate NTC Thermistors and Biasing
The LTC4088 provides temperature qualified charging if
a grounded thermistor and a bias resistor are connected
to NTC. By using a bias resistor whose value is equal to
the room temperature resistance of the thermistor (R25)
the upper and lower temperatures are pre-programmed
to approximately 40°C and 0°C, respectively (assuming
a Vishay “Curve 1” thermistor).
The upper and lower temperature thresholds can be adjusted by either a modification of the bias resistor value
or by adding a second adjustment resistor to the circuit.
If only the bias resistor is adjusted, then either the upper
or the lower threshold can be modified but not both. The
other trip point will be determined by the characteristics
of the thermistor. Using the bias resistor in addition to an
adjustment resistor, both the upper and the lower temperature trip points can be independently programmed with
the constraint that the difference between the upper and
lower temperature thresholds cannot decrease. Examples
of each technique are given below.
NTC thermistors have temperature characteristics which
are indicated on resistance-temperature conversion tables.
The Vishay-Dale thermistor NTHS0603N011-N1003F, used
in the following examples, has a nominal value of 100k
and follows the Vishay “Curve 1” resistance-temperature
characteristic.
In the explanation below, the following notation is used.
The trip points for the LTC4088’s temperature qualification are internally programmed at 0.349 • VBUS for the hot
threshold and 0.765 • VBUS for the cold threshold.
Therefore, the hot trip point is set when:
RNTCHOT
|
RNOM + RNTCHOT
|
• VBUS = 0.349 • VBUS
and the cold trip point is set when:
RNTC|COLD
RNOM + RNTC|COLD
• VBUS = 0.765 • VBUS
Solving these equations for RNTC|COLD and RNTC|HOT
results in the following:
RNTC|HOT = 0.536 • RNOM
and
RNTC|COLD = 3.25 • RNOM
By setting RNOM equal to R25, the above equations result
in rHOT = 0.536 and rCOLD = 3.25. Referencing these ratios
to the Vishay Resistance-Temperature Curve 1 chart gives
a hot trip point of about 40°C and a cold trip point of about
0°C. The difference between the hot and cold trip points
is approximately 40°C.
By using a bias resistor, RNOM, different in value from R25,
the hot and cold trip points can be moved in either direction. The temperature span will change somewhat due to
the non-linear behavior of the thermistor. The following
equations can be used to easily calculate a new value for
the bias resistor:
R25 = Value of the Thermistor at 25°C
RNTC|COLD = Value of thermistor at the cold trip point
RNOM =
rHOT
• R25
0.536
RNTC|HOT = Value of the thermistor at the hot trip
point
RNOM =
rCOLD
• R25
3.25
rCOLD = Ratio of RNTC|COLD to R25
rHOT = Ratio of RNTC|COLD to R25
RNOM = Primary thermistor bias resistor (see Figure 2)
R1 = Optional temperature range adjustment resistor
(see Figure 3)
where rHOT and rCOLD are the resistance ratios at the
desired hot and cold trip points. Note that these equations
are linked. Therefore, only one of the two trip points can
be chosen, the other is determined by the default ratios
designed in the IC. Consider an example where a 60°C
hot trip point is desired.
4088f
18
LTC4088
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APPLICATIO S I FOR ATIO
From the Vishay Curve 1 R-T characteristics, rHOT is 0.2488
at 60°C. Using the above equation, RNOM should be set
to 46.4k. With this value of RNOM, the cold trip point is
about 16°C. Notice that the span is now 44°C rather than
the previous 40°C. This is due to the decrease in “temperature gain” of the thermistor as absolute temperature
increases.
The upper and lower temperature trip points can be independently programmed by using an additional bias resistor
as shown in Figure 4b. The following formulas can be used
to compute the values of RNOM and R1:
r
–r
RNOM = COLD HOT • R25
2.714
R1 = 0.536 • RNOM – rHOT • R25
the nearest 1% value is 12.7k. The final solution is shown
in Figure 4b and results in an upper trip point of 45°C and
a lower trip point of 0°C.
USB Inrush Limiting
The USB specification allows at most 10µF of downstream
capacitance to be hot-plugged into a USB hub. In most
LTC4088 applications, 10µF should be enough to provide
adequate filtering on VBUS. If more capacitance is required,
the following circuit can be used to soft-connect additional
capacitance.
In this circuit, capacitor C1 holds MP1 off when the cable
is first connected. Eventually the bottom plate of C1 discharges to GND, applying increasing gate support to MP1.
MP1
Si2333
For example, to set the trip points to 0°C and 45°C with
a Vishay Curve 1 thermistor choose:
VBUS
5V USB
INPUT
3.266 – 0.4368
RNOM =
• 100k = 104.2k
2.714
C1
100nF
USB CABLE
LTC4088
C2
R1
40k
GND
the nearest 1% value is 105k:
4088 F05
R1 = 0.536 • 105k – 0.4368 • 100k = 12.6k
VBUS
LTC4088
NTC BLOCK
VBUS
RNOM
100k
NTC
0.765 • VBUS
VBUS
–
TOO_COLD
1
T
Figure 5. USB Soft-Connect Circuit
RNTC
100k
VBUS
RNOM
105k
NTC
LTC4088
NTC BLOCK
0.765 • VBUS
–
TOO_COLD
+
1
+
–
R1
12.7k
–
TOO_HOT
TOO_HOT
0.349 • VBUS
0.349 • VBUS
+
T
RNTC
100k
+
+
+
NTC_ENABLE
NTC_ENABLE
0.1V
–
0.1V
–
4088 F04b
4088 F04a
(4a)
(4b)
Figure 4. NTC Circuits
4088f
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APPLICATIO S I FOR ATIO
The long time constant of R1 and C1 prevent the current
from building up in the cable too fast, thus dampening
out any resonant overshoot.
Voltage overshoot on VBUS may sometimes be observed
when connecting the LTC4088 to a lab power supply. This
overshoot is caused by long leads from the power supply
to VBUS. Twisting the wires together from the supply to
VBUS can greatly reduce the parasitic inductance of these
long leads, and keep the voltage at VBUS to safe levels. USB
cables are generally manufactured with the power leads in
close proximity, and thus fairly low parasitic inductance.
Board Layout Considerations
The Exposed Pad on the backside of the LTC4088 package must be securely soldered to the PC board ground.
This is the only ground pin in the package, and it serves
as the return path for both the control circuitry and the
synchronous rectifier.
Furthermore, due to its high frequency switching circuitry,
it is imperative that the input capacitor, inductor, and output
capacitor be as close to the LTC4088 as possible and that
there be an unbroken ground plane under the LTC4088
and all of its external high frequency components. High
frequency currents, such as the input current on the
LTC4088, tend to find their way on the ground plane along
a mirror path directly beneath the incident path on the top
of the board. If there are slits or cuts in the ground plane
due to other traces on that layer, the current will be forced
to go around the slits. If high frequency currents are not
allowed to flow back through their natural least-area path,
excessive voltage will build up and radiated emissions will
occur (see Figure 6). There should be a group of vias directly
under the grounded backside leading directly down to an
internal ground plane. To minimize parasitic inductance,
the ground plane should be as close as possible to the
top plane of the PC board (layer 2).
The GATE pin for the external ideal diode controller has
extremely limited drive current. Care must be taken to
minimize leakage to adjacent PC board traces. 100nA of
leakage from this pin will introduce an additional offset
to the ideal diode of approximately 10mV. To minimize
leakage, the trace can be guarded on the PC board by
surrounding it with VOUT connected metal, which should
generally be less than one volt higher than GATE.
4088 F06
Figure 6. Ground Currents Follow Their Incident Path
at High Speed. Slices in the Ground Plane Cause High
Voltage and Increased Emissions
4088f
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Battery Charger Stability Considerations
The LTC4088’s battery charger contains both a constant-voltage and a constant-current control loop. The
constant-voltage loop is stable without any compensation
when a battery is connected with low impedance leads.
Excessive lead length, however, may add enough series
inductance to require a bypass capacitor of at least 1µF
from BAT to GND.
High value, low ESR multilayer ceramic chip capacitors
reduce the constant-voltage loop phase margin, possibly
resulting in instability. Ceramic capacitors up to 22µF may
be used in parallel with a battery, but larger ceramics should
be decoupled with 0.2Ω to 1Ω of series resistance.
Furthermore, a 4.7µF capacitor in series with a 0.2Ω to 1Ω
resistor from BAT to GND is required to prevent oscillation
when the battery is disconnected.
In constant-current mode, the PROG pin is in the feedback loop rather than the battery voltage. Because of the
additional pole created by any PROG pin capacitance,
capacitance on this pin must be kept to a minimum. With
no additional capacitance on the PROG pin, the charger
is stable with program resistor values as high as 25k.
However, additional capacitance on this node reduces the
maximum allowed program resistor. The pole frequency at
the PROG pin should be kept above 100kHz. Therefore, if
the PROG pin has a parasitic capacitance, CPROG, the following equation should be used to calculate the maximum
resistance value for RPROG:
RPROG ≤
1
2π • 100kHz • CPROG
4088f
21
LTC4088
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TYPICAL APPLICATIO S
High Efficiency Battery Charger/USB Power Manager
with NTC Qualified Charging and Reverse Input Protection
L1
3.3µH
WALL
USB
M2
VBUS
R1
100k
SW
D0
D1
D2
CHRG
µC
C1
10µF
0805
LOAD
VOUT
LDO3V3
GATE
LTC4088
M1
C3
10µF
0805
BAT
NTC
CLPROG
R2
T
100k
R5
8.2Ω
C2
0.1µF
0603
PROG C/X GND
R3
2.94k
+
Li-Ion
R4
499Ω
4088 TA02
C1, C3: MURATA GRM21BR61A106KE19
C2: MURATA GRM188R71C104KA01
L1: COILCRAFT LPS4018-332MLC
M1, M2: SILICONIX Si2333
R2: VISHAY-DALE NTHS0603N011-N1003F
USB Compliant Switching Charger
L1
3.3µH
WALL
USB
VBUS
R1
100k
SW
D0
D1
D2
CHRG
µC
C1
10µF
0805
VOUT
C3
10µF
0805
LDO3V3
GATE
LTC4088
LOAD
BAT
NTC
CLPROG
R2
T
100k
C2
0.1µF
0603
R5
8.2Ω
PROG C/X GND
R3
2.94k
+
Li-Ion
R4
499Ω
4088 TA03a
C1, C3: MURATA GRM21BR61A106KE19
C2: MURATA GRM188R71C104KA01
L1: COILCRAFT LPS4018-332MLC
R2: VISHAY-DALE NTHS0603N011-N1003F
700
IBAT
CHARGE CURRENT (mA)
600
500
IBUS
400
300
200
100
5x USB SETTING,
BATTERY CHARGER SET FOR 1A
0
3.0
3.3
3.6
2.7
3.9
BATTERY VOLTAGE (V)
4.2
4088 TA03b
4088f
22
LTC4088
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PACKAGE DESCRIPTIO
DE Package
14-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1708 Rev B)
0.70 ±0.05
3.30 ±0.05
3.60 ±0.05
2.20 ±0.05
1.70 ± 0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
3.00 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.115
TYP
4.00 ±0.10
(2 SIDES)
R = 0.05
TYP
3.00 ±0.10
(2 SIDES)
0.40 ± 0.10
8
14
3.30 ±0.10
1.70 ± 0.10
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
PIN 1
TOP MARK
(SEE NOTE 6)
(DE14) DFN 0806 REV B
7
0.200 REF
1
0.25 ± 0.05
0.50 BSC
0.75 ±0.05
3.00 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
4088f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC4088
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC4057
Lithium-Ion Linear Battery Charger
Up to 800mA Charge Current, Thermal Regulation, ThinSOTTM Package
LTC4058
Standalone 950mA Lithium-Ion Charger in DFN
C/10 Charge Termination, Battery Kelvin Sensing, ±7% Charge
Accuracy
LTC4065/LTC4065A
750mA Linear Lithium-Ion Battery Charger
2mm × 2mm DFN Package, Thermal Regulation, Standalone Operation
LTC4411/LTC4412
Low Loss Single PowerPath Controllers in
ThinSOT
Automatic Switching Between DC Sources, Load Sharing,
Replaces ORing Diodes
LTC4413
Dual Ideal Diodes
3mm × 3mm DFN Package, Low Loss Replacement for ORing Diodes
LTC3406/LTC3406A
600mA (IOUT), 1.5MHz, Synchronous
Step-Down DC/DC Converter
95% Efficiency, VIN = 2.5V to 5.5V, VOUT = 0.6V, IQ = 20µA, ISD < 1µA,
ThinSOT Package
LTC3411
1.25A (IOUT), 4MHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN = 2.5V to 5.5V, VOUT = 0.8V, IQ = 60µA, ISD < 1µA,
MS10 Package
LTC3455
Dual DC/DC Converter with USB Power Manager Seamless Transition Between Power Sources: USB, Wall Adapter and
and Li-Ion Battery Charger
Battery; 95% Efficient DC/DC Conversion
LTC4055
USB Power Controller and Battery Charger
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal
Regulation, 200mΩ Ideal Diode, 4mm × 4mm QFN16 Package
LTC4066
USB Power Controller and Battery Charger
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal
Regulation, 50mΩ Ideal Diode, 4mm × 4mm QFN24 Package
LTC4085
USB Power Manager with Ideal Diode Controller
and Li-Ion Charger
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal
Regulation, 200mΩ Ideal Diode with <50mΩ Option, 4mm × 3mm
DFN14 Package
LTC4088-1
High Efficiency USB Power Manager and Battery
Charger with Regulated Output Voltage
Maximizes Available Power from USB Port, Bat-Track, “Instant-On”
Operation, 1.5A Max Charge Current, 180mΩ Ideal Diode with <50mΩ
Option, Automatic Charge Current Reduction Maintains 3.6V Minimum
VOUT, 4mm × 3mm DFN14 Package
LTC4089/LTC4089-5
USB Power Manager with Ideal Diode Controller
and High Efficiency Li-Ion Battery Charger
High Efficiency 1.2A Charger from 6V to 36V (40V Max) Input. Charges
Single Cell Li-Ion/Polymer Batteries Directly from a USB Port, Thermal
Regulation, 200mΩ Ideal Diode with <50mΩ Option, 4mm × 3mm
DFN14 Package. Bat-Track Adaptive Output Control (LTC4089), Fixed
5V Output (LTC4089-5)
Battery Chargers
Power Management
ThinSOT is a trademark of Linear Technology Corporation.
4088f
24 Linear Technology Corporation
LT 0307 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2007
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