TI CD74FCT574M Bicmos fct interface logic, octal d-type flip-flops, three-state Datasheet

CD74FCT564,
CD74FCT574
Data sheet acquired from Harris Semiconductor
SCHS259
D
ENDE
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M
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EC
IGN
NOT R NEW DES ology
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Tech
FOR
January 1997
Features
MOS
Use C
• Buffered Inputs
• Typical Propagation Delay: 5.6ns at VCC = 5V,
TA = 25oC
• Positive Edge Triggered
• CD74FCT564
- Inverting
• CD74FCT574
- Noninverting
• SCR Latchup Resistant BiCMOS Process and
Circuit Design
• Speed of Bipolar FAST™/AS/S
• 48mA Output Sink Current
• Output Voltage Swing Limited to 3.7V at VCC = 5V
• Controlled Output Edge Rates
BiCMOS FCT Interface Logic,
Octal D-Type Flip-Flops, Three-State
Description
The CD74FCT564 and CD74FCT574 are octal D-Type,
three-state, positive edge triggered flip-flops which use a
small geometry BiCMOS technology. The output stage is a
combination of bipolar and CMOS transistors that limits the
output HIGH level to two diode drops below VCC. This resultant lowering of output swing (0V to 3.7V) reduces power bus
ringing (a source of EMI) and minimizes VCC bounce and
ground bounce and their effects during simultaneous output
switching. The output configuration also enhances switching
speed and is capable of sinking 48 milliamperes.
The eight flip-flops enter data into their registers on the LOW
to HIGH transition of the clock (CP). The Output Enable (OE)
controls the three state outputs and is independent of the
register operation. When the Output Enable (OE) is HIGH,
the outputs are in the high impedance state. The
CD74FCT564 and CD74FCT574 share the same configurations; the CD74FCT564, however, has inverted outputs and
the CD74FCT574 has noninverted outputs.
Ordering Information
• Input/Output Isolation to VCC
• BiCMOS Technology with Low Quiescent Power
TEMP.
RANGE (oC)
PART NUMBER
PKG.
NO.
PACKAGE
CD74FCT564E
0 to 70
20 Ld PDIP
E20.3
CD74FCT574E
0 to 70
20 Ld PDIP
E20.3
CD74FCT564M
0 to 70
20 Ld SOIC
M20.3
CD74FCT574M
0 to 70
20 Ld SOIC
M20.3
CD74FCT574SM
0 to 70
20 Ld SSOP
M20.209
NOTE: When ordering the suffix M and SM packages, use the entire
part number. Add the suffix 96 to obtain the variant in the tape and reel.
Pinouts
CD74FCT564
(PDIP, SOIC, SSOP)
TOP VIEW
CD74FCT574
(PDIP, SOIC, SSOP)
TOP VIEW
OE
1
20 VCC
OE
1
D0
2
19 Q0
D0
2
19 Q0
D1
3
18 Q1
D1
3
18 Q1
D2
4
17 Q2
D2
4
17 Q2
D3
5
16 Q3
D3
5
16 Q3
D4
6
15 Q4
D4
6
15 Q4
D5
7
14 Q5
D5
7
14 Q5
D6
8
13 Q6
D6
8
13 Q6
D7
9
12 Q7
D7
9
12 Q7
GND 10
11 CP
GND 10
11 CP
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a trademark of Fairchild Semiconductor.
Copyright © Harris Corporation 1997
8-1
20 VCC
File Number
2295.2
CD74FCT564, CD74FCT574
Functional Diagram
TRUTH TABLE (NOTE 1)
D0
D1
D2
D3
D4
D5
D6
D7
OE
CP
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
CD74FCT574
CD74FCT564
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
Q4
Q4
Q5
Q5
Q6
Q6
Q7
Q7
OUTPUTS
INPUTS
CD74FCT574
OE
CP
DN
QN
QN
L
↑
H
L
H
L
↑
L
H
L
L
L
X
Qo
Qo
H
X
X
Z
Z
NOTE:
1. H = High Level (Steady State)
L = Low Level (Steady State)
X = Don't Care
↑ = Transition from low to high level
Qo = The level of Q before the indicated steady state input
conditions were established.
Z = HIGH Impedance
11
1
CD74FCT564
GND = PIN 10
VCC = PIN 20
IEC Logic Symbols
CD74FCT564
1
11
2
CD74FCT574
1
11
EN
>C1
EN
>C1
19
2
3
18
3
18
4
17
4
17
5
16
5
16
6
15
6
15
7
14
7
14
8
13
8
13
9
12
9
12
1D
8-2
1D
19
CD74FCT564, CD74FCT574
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V
DC Diode Current, IIK (For VI < -0.5V) . . . . . . . . . . . . . . . . . . -20mA
DC Output Diode Current, IOK (for VO < -0.5V) . . . . . . . . . . . -50mA
DC Output Sink Current per Output Pin, IO . . . . . . . . . . . . . . . 70mA
DC Output Source Current per Output Pin, IO . . . . . . . . . . . . -30mA
DC VCC Current (ICC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140mA
DC Ground Current (IGND). . . . . . . . . . . . . . . . . . . . . . . . . . . 400mA
Thermal Resistance (Typical, Note 2)
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
135
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
125
SSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
130
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(SOIC and SSOP-Lead Tips Only)
Operating Conditions
Operating Temperature Range, TA . . . . . . . . . . . . . . . . .0oC to 70oC
Supply Voltage Range, VCC . . . . . . . . . . . . . . . . . . . .4.75V to 5.25V
DC Input Voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VCC
DC Output Voltage, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to ≤ VCC
Input Rise and Fall Slew Rate, dt/dv. . . . . . . . . . . . . . . . 0 to 10ns/V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Temperature Range 0oC to 70oC, VCC Max = 5.25V, VCC Min = 4.75V
AMBIENT TEMPERATURE (TA)
25oC
TEST CONDITIONS
PARAMETER
SYMBOL
VI (V)
IO (mA)
0oC TO 70oC
VCC (V)
MIN
MAX
MIN
MAX
UNITS
High Level Input Voltage
VIH
4.5 to 5.5
2
-
2
-
V
Low Level Input Voltage
VIL
4.5 to 5.5
-
0.8
-
0.8
V
High Level Output Voltage
VOH
VIH or
VIL
-15
Min
2.4
-
2.4
-
V
Low Level Output Voltage
VOL
VIH or
VIL
48
Min
-
0.55
-
0.55
V
High Level Input Current
IIH
VCC
Max
-
0.1
-
1
µA
Low Level Input Current
IIL
GND
Max
-
-0.1
-
-1
µA
IOZH
VCC
Max
-
0.5
-
10
µA
IOZL
GND
Max
-
-0.5
-
-10
µA
Input Clamp Voltage
VIK
VCC or
GND
Min
-
-1.2
-
-1.2
V
Short Circuit Output Current
(Note 3)
IOS
VCC = 0
VCC or
GND
Max
-60
-
-60
-
mA
Quiescent Supply Current, MSI
ICC
VCC or
GND
Max
-
8
-
80
µA
∆ICC
3.4V
(Note 4)
MAX
-
1.6
-
1.6
mA
Three-State Leakage Current
Additional Quiescent Supply
Current per Input Pin
TTL Inputs High, 1 Unit Load
-18
0
NOTES:
3. Not more than one output should be shorted at one time. Test duration should not exceed 100ms.
4. Inputs that are not measured are at VCC or GND.
5. FCT Input Loading: All inputs are 1 unit load. Unit load is ∆ICC limit specified in Static Characteristics Chart, e.g., 1.6mA Max at 70oC.
8-3
CD74FCT564, CD74FCT574
Switching Specifications Over Operating Range tr, tf = 2.5ns, CL = 50pF, RL - See Figure 4
AMBIENT TEMPERATURE (TA)
25oC
PARAMETER
0oC TO 70oC
SYMBOL
VCC (V)
TYP
MIN
MAX
UNITS
Propagation Delays
Clock to Q
CD74FCT574
tPLH, tPHL
5
6.6
2
10
ns
Clock to Q
CD74FCT564
tPLH, tPHL
5
6.6
1.5
10
ns
Output Disable to Q
CD74FCT574
tPLZ, tPHZ
5
6
1.5
8
ns
Output Enable to Q
CD74FCT574
tPZL, tPZH
5
9
1.5
12.5
ns
Output Disable to Q
CD74FCT564
tPLZ, tPHZ
5
6
1.5
8
ns
Output Enable to Q
CD74FCT564
tPZL, tPZH
5
9
1.5
12.5
ns
CPD
(Note 6)
-
Minimum (Valley) VOHV During Switching of
Other Outputs (Output Under Test Not Switching)
VOHV
(Figure 1)
5
0.5
-
-
V
Maximum (Peak) VOLP During Switching of
Other Outputs (Output Under Test Not Switching)
VOLP
(Figure 1)
5
1
-
-
V
Input Capacitance
CI
-
-
-
10
pF
Three State Output Capacitance
CO
-
-
-
15
pF
Power Dissipation Capacitance
34 Typical
pF
NOTE:
6. CPD, measured per flip-flop, is used to determine the dynamic power consumption.
PD (per package) = VCC ICC + Σ(VCC2 fI CPD + VO2 to CL + VCC ∆ICC D) where:
VCC = supply voltage
∆ICC = flow through current x unit load
CL = output load capacitance
D = duty cycle of input high
fO = output frequency
fI = input frequency
Prerequisite For Switching
AMBIENT TEMPERATURE (TA)
25oC
MIN
MAX
UNITS
5 (Note 7)
7
-
ns
tW
5
7
-
ns
tSU
5
2
-
ns
CD74FCT574
tH
5
2
-
ns
CD74FCT564
tH
5
2
-
ns
fMAX
5
70
-
MHz
PARAMETER
SYMBOL
VCC (V)
CD74FCT574
tW
CD74FCT564
TYP
0oC TO 70oC
Clock Pulse Width
Setup Time Data to Clock
Data to Clock Hold Time
Maximum Clock Frequency
NOTE:
7. 5V: minimum is at 4.5V.
5V: minimum is at 4.75V for 0oC to 70oC.
Typical is at 5V.
8-4
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