Renesas HD74LS373FPEL Octal d-type transparent latches (with three-state outputs) Datasheet

HD74LS373
Octal D-type Transparent Latches (with three-state outputs)
REJ03D0482–0200
Rev.2.00
Feb.18.2005
The HD74LS373, 8-bit register features totem-pole three-state outputs designed specifically for driving highlycapacitive or relatively low-impedance loads. The high-impedance third state and increased high-logic-level drive
provide this register with the capacity of being connected directly to and driving the bus lines in a bus-organized system
without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working registers.
The eight latches are transparent D-type latches meaning that while the enable (G) is high the Q outputs will follow the
data (D) inputs. When the enable is taken low the output will be latched at the level of the data that was setup.
Features
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LS373P
DILP-20 pin
PRDP0020AC-B
(DP-20NEV)
P
—
HD74LS373FPEL
SOP-20 pin (JEITA)
PRSP0020DD-B
(FP-20DAV)
FP
EL (2,000 pcs/reel)
PRSP0020DC-A
RP
(FP-20DBV)
Note: Please consult the sales office for the above package availability.
HD74LS373RPEL
SOP-20 pin (JEDEC)
EL (1,000 pcs/reel)
Pin Arrangement
Output
Control
1
1Q
2
1D
3
2D
4
2Q
5
3Q
6
3D
7
4D
8
4Q
9
GND
10
OE
G
G
OE
OE
G
G
OE
Q
D
D
Q
Q
D
D
Q
20
VCC
OE Q
G D
19
8Q
18
8D
G D
OE
Q
17
7D
16
7Q
Q
OE
G D
15
6Q
14
6D
G D
OE
Q
13
5D
12
5Q
11
Enable G
(Top view)
Rev.2.00, Feb.18.2005, page 1 of 7
HD74LS373
Function Table
Inputs
Enable G
H
H
L
X
Output control
L
L
L
H
Output
Q
H
L
Q0
Z
D
H
L
X
X
Notes: H; high level, L; low level, X; irrelevant
Q0; level of Q before the indicated steady-state input conditions were established
Z; off (high-impedance) state of a three-state output
Block Diagram
Output
Control
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
Q
Q
Q
Q
Q
Q
Q
Q
D G
D G
D G
D G
D G
D G
D G
D G
1D
2D
3D
4D
5D
6D
7D
8D
Enable
G
Absolute Maximum Ratings
Symbol
Ratings
Unit
Supply voltage
Item
VCC
7
V
Input voltage
VIN
7
V
Power dissipation
PT
400
mW
Tstg
–65 to +150
°C
Storage temperature
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Symbol
Min
Typ
Max
Unit
Supply voltage
Item
VCC
4.75
5.00
5.25
V
Output voltage
VOH
—
—
5.5
V
IOH
—
—
–2.6
mA
Output current
Operating temperature
Enable pulse width
“H” Level
“L” Level
IOL
—
—
24
mA
Topr
–20
25
75
°C
tw
15
—
—
ns
15
—
—
ns
Data setup time
tsu
5↓
—
—
ns
Data hold time
th
20↓
—
—
ns
Rev.2.00, Feb.18.2005, page 2 of 7
HD74LS373
Electrical Characteristics
(Ta = –20 to +75 °C)
Item
Symbol
VIH
Input voltage
VIL
min.
2.0
—
—
typ.*
—
—
—
max.
—
0.7
0.8
Unit
V
2.4
—
—
V
—
—
—
—
—
—
—
—
0.4
0.5
20
–20
20
–0.4
0.1
–130
µA
mA
mA
mA
VOH
Output voltage
V
Input current
IOZH
IOZL
IIH
IIL
Short-circuit output current
II
IOS
—
—
—
—
—
—
—
–30
Supply current
ICC
—
24
40
mA
Input clamp voltage
Note: * VCC = 5 V, Ta = 25°C
VIK
—
—
–1.5
V
VOL
Output current
V
µA
Condition
Data inputs
G, Output control inputs
VCC = 4.75 V, VIH = 2 V, VIL = VIL max
IOH = –2.6 mA
IOL = 12 mA
VCC = 4.75 V,
VIH = 2 V, VIL = VIL max
IOL = 24 mA
VO = 2.7 V
VCC = 5.25 V,
VIH = 2 V
VO = 0.4 V
VCC = 5.25 V, VI = 2.7 V
VCC = 5.25 V, VI = 0.4 V
VCC = 5.25 V, VI = 7 V
VCC = 5.25 V
VCC = 5.25 V,
VI = 4.5 V (Output control)
VCC = 4.75 V, IIN = –18 mA
Switching Characteristics
(VCC = 5 V, Ta = 25°C)
Item
Propagation delay time
Symbol
tPLH
tPHL
tPLH
tPHL
Input
Output
D
Q
G
Q
Output enable time
tZH
tZL
OC
Q
Output disable time
tHZ
tLZ
OC
Q
Rev.2.00, Feb.18.2005, page 3 of 7
min.
—
—
—
—
—
—
—
—
typ.
12
12
20
18
15
25
12
15
max.
18
18
30
30
28
36
20
25
Unit
ns
Condition
CL = 45 pF,
RL = 667 Ω
CL = 5 pF,
RL = 667 Ω
HD74LS373
Testing Method
Test Circuit
VCC
Output
RL
Load circuit 1
S1
4.5V
1Q
5kΩ
OC
Input
CL
Output
1D
P.G.
Zout = 50Ω
S2
2Q
2D
Same as Load Circuit 1.
See Function Table
Output
Input
P.G.
Zout = 50Ω
3D
3Q
Same as Load Circuit 1.
Output
4D
4Q
5D
Same as Load Circuit 1.
Output
6D
5Q
Same as Load Circuit 1.
Output
7D
6Q
8D
Same as Load Circuit 1.
Output
G
7Q
Same as Load Circuit 1.
Output
8Q
Notes:
Same as Load Circuit 1.
1. CL includes probe and jig capacitance.
2. All diodes are 1S2074(H).
Waveforms 1
tTLH
tTHL
90 %
1.3 V
Data
3V
90 %
1.3 V
10 %
10 %
tPLH
0V
tPHL
VOH
Q
S1, S2 Closed
1.3 V
1.3 V
VOL
Note:
Input pulse; tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz, duty cycle 50%
Rev.2.00, Feb.18.2005, page 4 of 7
HD74LS373
Waveforms 2
tTHL
tTLH
Data
3V
90%
90%
1.3V
10%
1.3V
tsu
th
1.3V
10%
0V
tsu
th
3V
Enable
G
1.3V
tPLH
1.3V
tPLH
Q
S1, S2 Closed
1.3V
tPHL
1.3V
0V
tPHL
1.3V
VOH
1.3V
VOL
Note:
Enable input pulse; tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz
Data input pulse; tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz, G input is high
Waveforms 3
tTLH
tTHL
Output
Control
90%
1.3V
10%
10%
3V
90%
1.3V
0V
tZL
4.5V
Waveform A
S1 closed,
S2 open
tLZ
S1, S2 closed
1.5V
1.3V
VOL
tZH
tHZ
0.5V
VOH
Waveform B
S1 open,
S2 closed
1.5V
1.3V
0V
Notes:
0.5V
S1, S2 closed
1. Input pulse; tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz, duty cycle 50%
2. Waveform A if for an output with internal conditions such that the output is low except when
disabled by the output control. Waveform B is for an output with internal conditions such that
the output is high except when disabled by the output control.
Rev.2.00, Feb.18.2005, page 5 of 7
HD74LS373
Package Dimensions
JEITA Package Code
P-DIP20-6.3x24.5-2.54
RENESAS Code
PRDP0020AC-B
Previous Code
DP-20NEV
MASS[Typ.]
1.26g
D
11
E
20
1
10
b3
0.89
Z
Dimension in Millimeters
Min
Nom
Max
A
Reference
Symbol
A1
e
D
24.50
E
6.30
L
θ
c
e1
A1
0.51
b
p
0.40
b
3
JEITA Package Code
P-SOP20-5.5x12.6-1.27
RENESAS Code
PRSP0020DD-B
*1
Previous Code
FP-20DAV
0.48
0.56
c
0.19
θ
0°
e
2.29
0.25
0.31
2.54
2.79
15°
1.27
L
2.54
MASS[Typ.]
0.31g
D
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
F
20
7.00
1.30
Z
( Ni/Pd/Au plating )
25.40
5.08
A
bp
e
7.62
1
11
c
HE
*2
E
bp
Index mark
Reference
Symbol
Terminal cross section
( Ni/Pd/Au plating )
Z
e
*3
bp
Nom
Max
D
12.60
13.0
E
5.50
A2
10
1
A1
x
Dimension in Millimeters
Min
M
0.00
0.10
0.20
0.34
0.40
0.46
0.15
0.20
0.25
7.80
8.00
2.20
A
L1
bp
b1
c
A
c
1
θ
0°
HE
A1
θ
y
L
Detail F
e
8°
1.27
x
0.12
y
0.15
0.80
Z
0.50
L
L
Rev.2.00, Feb.18.2005, page 6 of 7
7.50
1
0.70
1.15
0.90
HD74LS373
JEITA Package Code
P-SOP20-7.5x12.8-1.27
RENESAS Code
PRSP0020DC-A
*1
Previous Code
FP-20DBV
MASS[Typ.]
0.52g
D
F
20
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
@ DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
@ INCLUDE TRIM OFFSET.
11
HE
c
*2
E
bp
Index mark
Reference
Symbol
Terminal cross section
( Ni/Pd/Au plating )
Dimension in Millimeters
Min
Nom
Max
D
12.80
13.2
E
7.50
A2
10
1
Z
e
*3
bp
x
A1
M
0.10
0.20
0.30
0.34
0.40
0.46
0.20
0.25
0.30
10.40
10.65
A
L1
2.65
bp
b1
c
A
c
A1
θ
L
y
1
θ
0°
HE
10.00
8°
1.27
e
x
0.12
y
0.15
0.935
Z
Detail F
L
L
Rev.2.00, Feb.18.2005, page 7 of 7
0.40
1
0.70
1.45
1.27
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