TI CY74FCT2573TQSOP 8-bit latch Datasheet

1CY74FCT2573T
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY74FCT2373T
CY74FCT2573T
SCCS039 - September 1994 - Revised March 2000
8-Bit Latches
Features
Functional Description
• Function and pinout compatible with the fastest bipolar
logic
• 25Ω output series resistors to reduce transmission line
refelection noise
• FCT-C speed at 4.7 ns max.
• Reduced VOH (typically=3.3V) versions of equivalent
FCT functions
• Edge-rate control circuitry for significantly improved
noise characteristics
• Power-off disable feature
• Matched rise and fall times
• ESD > 2000V
• Fully compatible with TTL input and output logic levels
• Sink current
12 mA
Source current
15 mA
• Extended commercial temp. range of –40˚C to +85˚C
The FCT2373T and FCT2573T are 8-bit, high-speed CMOS
TTL-compatible buffered latches with three-state outputs that
are ideal for driving high-capacitance loads, such as memory
and address buffers. On-chip 25Ω termination resistors have
been added to the outputs to reduce system noise caused by
reflections. FCT2373T can be used to replace FCT373T, and
FCT2573T to replace FCT573T to reduce noise in an existing
design.
When latch enable (LE) is HIGH, the flip-flops appear transparent to the data. Data that meets the required set-up times
are latched when LE transitions from HIGH to LOW. Data
appears on the bus when the output enable (OE) is LOW.
When output enable is HIGH, the bus output is in the high
impedance state. In this mode, data can still be entered into
the latches.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Logic Symbol
Pin Configurations
SOIC/QSOP
Top View
D0
LE
OE
O0
D1
O1
D2
O2
D3
O3
D4
O4
D5
O5
D6
O6
D7
O7
OE
1
20
O0
2
19
VCC
O7
D0
3
18
D7
D1
4
17
D6
O1
5
O6
D2
16
6 FCT2373T15
14
7
D3
8
13
D4
O3
9
12
O4
GND
10
11
O2
FCT2373T-1
O5
D5
LE
FCT2373T-4
Logic Block Diagram
D0
D1
D2
D3
D4
D5
D6
LE
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
OE
O0
O1
O2
O3
O4
O5
O6
SOIC/QSOP
Top View
D7
O7
OE
1
20
D0
2
19
VCC
O0
D1
3
18
O1
D2
4
17
O2
D3
5
16
O3
D4
6
O4
D5
7
15
14
D6
8
13
O6
D7
9
12
O7
GND
10
11
LE
FCT2373T-2
O5
FCT2373T-6
Copyright
© 2000, Texas Instruments Incorporated
CY74FCT2373T
CY74FCT2573T
Supply Voltage to Ground Potential ............... –0.5V to +7.0V
Function Table[1]
Inputs
DC Input Voltage ........................................... –0.5V to +7.0V
Outputs
OE
LE
D
O
L
H
H
H
L
H
L
L
L
L
X
Q0
H
X
X
Z
DC Output Voltage......................................... –0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ...... 120 mA
Power Dissipation .......................................................... 0.5W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Operating Range
Maximum Ratings[2, 3]
Range
(Above which the useful life may be impaired. For user guidelines, not tested.)
Commercial
Ambient
Temperature
VCC
–40°C to +85°C
5V ± 5%
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied .............................................–65°C to +135°C
Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
Min.
Typ.[5]
2.4
3.3
VOH
Output HIGH Voltage
VCC=Min., IOH=–15 mA
VOL
Output LOW Voltage
VCC=Min., IOL=12 mA
ROUT
Output Resistance
VCC=Min., IOL=12 mA
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VH
Hysteresis[6]
All inputs
0.2
VIK
Input Clamp Diode Voltage
VCC=Min., IIN=–18 mA
–0.7
II
Input HIGH Current
IIH
IIL
20
Max.
Unit
V
0.3
0.55
V
28
40
Ω
2.0
V
0.8
V
V
–1.2
V
VCC=Max., VIN=VCC
5
µA
Input HIGH Current
VCC=Max., VIN=2.7V
±1
µA
Input LOW Current
VCC=Max., VIN=0.5V
±1
µA
IOZH
Off State HIGH-Level Output
Current
VCC=Max., VOUT=2.7V
10
µA
IOZL
Off State LOW-Level
Output Current
VCC=Max., VOUT=0.5V
–10
µA
IOS
Output Short Circuit Current[7]
VCC=Max., VOUT=0.0V
–225
mA
IOFF
Power-Off Disable
VCC=0V, VOUT=4.5V
±1
µA
–60
–120
Notes:
1. H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Don’t Care
Z
= HIGH Impedance
Qn = Previous state of flip flops (Qn–1)
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
4. TA is the “instant on” case temperature.
5. Typical values are at VCC=5.0V, TA=+25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
2
CY74FCT2373T
CY74FCT2573T
Capacitance[6]
Parameter
Description
Typ.[5]
Max.
Unit
CIN
Input Capacitance
6
10
pF
COUT
Output Capacitance
8
12
pF
Power Supply Characteristics
Parameter
Description
Test Conditions
Typ.[5]
Max.
Unit
ICC
Quiescent Power Supply Current
VCC=Max., VIN ≤ 0.2V,
VIN ≥ VCC–0.2V
0.1
0.2
mA
∆ICC
Quiescent Power Supply Current
(TTL inputs)
VCC=Max., VIN=3.4V,[8]
f1=0, Outputs Open
0.5
2.0
mA
ICCD
Dynamic Power Supply
Current[9]
VCC=Max., One Input Toggling,
50% Duty Cycle, Outputs Open, OE=GND,
VIN ≤ 0.2V or VIN ≥ VCC–0.2V
0.06
0.12
mA/
MHz
IC
Total Power Supply Current[10]
VCC=Max., 50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=10 MHz,
OE=GND, LE=VCC,
VIN ≤ 0.2V or VIN ≥ VCC–0.2V
0.7
1.4
mA
VCC=Max., 50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=10 MHz,
OE=GND, LE=VCC,VIN=3.4V or VIN=GND
1.0
2.4
mA
VCC=Max., 50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1=2.5 MHz,
OE=GND, LE=VCC,
VIN ≤ 0.2V or VIN ≥ VCC–0.2V
1.3
2.6[11]
mA
VCC=Max., 50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1=2.5 MHz,
OE=GND, LE=VCC, VIN=3.4V or VIN=GND
3.3
10.6[11]
mA
Notes:
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
= IQUIESCENT + IINPUTS + IDYNAMIC
10. IC
IC
= ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
ICC = Quiescent Current with CMOS input levels
∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V)
DH = Duty Cycle for TTL inputs HIGH
= Number of TTL inputs at DH
NT
ICCD = Dynamic Current caused by an input transition pair (HLH or LHL)
= Clock frequency for registered devices, otherwise zero
f0
= Input signal frequency
f1
= Number of inputs changing at f1
N1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
3
CY74FCT2373T
CY74FCT2573T
Switching Characteristics Over the Operating Range[12]
CY74FCT2373T
CY74FCT2573T
CY74FCT2373AT
CY74FCT2573AT
CY74FCT2373CT
CY74FCT2573CT
Description
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Fig.
No.[13]
tPLH
tPHL
Propagation Delay D to O
1.5
8.0
1.5
5.2
1.5
4.2
ns
1, 3
tPLH
tPHL
Propagation Delay LE to O
2.0
13.0
2.0
8.5
2.0
5.5
ns
1, 5
tPZH
tPZL
Output Enable Time
1.5
11.0
1.5
6.5
1.5
5.5
ns
1, 7, 8
tPHZ
tPLZ
Output Disable Time
1.5
7.0
1.5
5.5
1.5
5.0
ns
1, 7, 8
tS
Set-Up Time, HIGH to LOW
D to LE
2.0
2.0
2.0
ns
9
tH
Hold Time, HIGH to LOW
D to LE
1.5
1.5
1.5
ns
9
tW
LE Pulse Width HIGH
6.0
5.0
5.0
ns
5
Parameter
12. Minimum limits are specified but not tested on Propagation Delays.
13. See “Parameter Measurement Information” in the General Information section.
Ordering Information
Speed
(ns)
4.2
5.2
8.0
Ordering Code
CY74FCT2373CTQCT
Package
Name
Package Type
Q5
20-Lead (150-Mil) QSOP
CY74FCT2373CTSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
CY74FCT2373ATQCT
Q5
20-Lead (150-Mil) QSOP
CY74FCT2373ATSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
CY74FCT2373TQCT
Q5
20-Lead (150-Mil) QSOP
Operating
Range
Commercial
Commercial
Commercial
Ordering Information
Speed
(ns)
4.2
Ordering Code
Package
Name
Package Type
Operating
Range
CY74FCT2573CTQCT
Q5
20-Lead (150-Mil) QSOP
CY74FCT2573CTSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
5.2
CY74FCT2573ATQCT
Q5
20-Lead (150-Mil) QSOP
Commercial
8.0
CY74FCT2573TSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
Commercial
Document #: 38–00338–B
4
Commercial
CY74FCT2373T
CY74FCT2573T
Package Diagrams
20-Lead Quarter Size Outline Q5
20-Lead (300-Mil) Molded SOIC S5
5
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