NSC LMC6464AIMX Micropower, rail-to-rail input and output cmos operational amplifier Datasheet

LMC6462 Dual/LMC6464 Quad
Micropower, Rail-to-Rail Input and Output CMOS
Operational Amplifier
General Description
Features
The LMC6462/4 is a micropower version of the popular
LMC6482/4, combining Rail-to-Rail Input and Output Range
with very low power consumption.
(Typical unless otherwise noted)
n Ultra Low Supply Current 20 µA/Amplifier
n Guaranteed Characteristics at 3V and 5V
n Rail-to-Rail Input Common-Mode Voltage Range
n Rail-to-Rail Output Swing
(within 10 mV of rail, VS = 5V and RL = 25 kΩ)
n Low Input Current 150 fA
n Low Input Offset Voltage 0.25 mV
The LMC6462/4 provides an input common-mode voltage
range that exceeds both rails. The rail-to-rail output swing of
the amplifier, guaranteed for loads down to 25 kΩ, assures
maximum dynamic sigal range. This rail-to-rail performance
of the amplifier, combined with its high voltage gain makes it
unique among rail-to-rail amplifiers. The LMC6462/4 is an
excellent upgrade for circuits using limited common-mode
range amplifiers.
The LMC6462/4, with guaranteed specifications at 3V and
5V, is especially well-suited for low voltage applications. A
quiescent power consumption of 60 µW per amplifier (at VS
= 3V) can extend the useful life of battery operated systems.
The amplifier’s 150 fA input current, low offset voltage of
0.25 mV, and 85 dB CMRR maintain accuracy in
battery-powered systems.
8-Pin DIP/SO
Applications
n
n
n
n
n
Battery Operated Circuits
Transducer Interface Circuits
Portable Communication Devices
Medical Applications
Battery Monitoring
14-Pin DIP/SO
DS012051-1
Top View
DS012051-2
Top View
© 1999 National Semiconductor Corporation
DS012051
www.national.com
LMC6462 Dual/LMC6464 Quad Micropower, Rail-to-Rail Input and Output CMOS Operational
Amplifier
May 1999
Ordering Information
Package
8-Pin Molded DIP
Temperature Range
Military
Industrial
−55˚C to +125˚C
−40˚C to +85˚C
LMC6462AMN
8-Pin SO-8
14-Pin Molded DIP
LMC6464AMN
14-Pin SO-14
NSC
Transport
Drawing
Media
LMC6462AIN, LMC6462BIN
N08E
Rails
LMC6462AIM, LMC6462BIM
M08A
Rails
LMC6462AIMX, LMC6462BIMX
M08A
Tape and Reel
LMC6464AIN, LMC6464BIN
N14A
Rails
LMC6464AIM, LMC6464BIM
M14A
Rails
LMC6464AIMX, LMC6464BIMX
M14A
Tape and Reel
8-Pin Ceramic DIP
LMC6462AMJ-QML
J08A
Rails
14-Pin Ceramic DIP
LMC6464AMJ-QML
J14A
Rails
LMC6464AMWG-QML
WG14A
Trays
14-Pin Ceramic SOIC
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2
Absolute Maximum Ratings (Note 1)
Operating Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
Junction Temperature Range
LMC6462AM, LMC6464AM
LMC6462AI, LMC6464AI
LMC6462BI, LMC6464BI
Thermal Resistance (θJA)
N Package, 8-Pin Molded DIP
M Package, 8-Pin Surface Mount
N Package, 14-Pin Molded DIP
M Package, 14-Pin
Surface Mount
ESD Tolerance (Note 2)
Differential Input Voltage
Voltage at Input/Output Pin
Supply Voltage (V+ − V−)
Current at Input Pin (Note 12)
Current at Output Pin
(Notes 3, 8)
Current at Power Supply Pin
Lead Temp. (Soldering, 10 sec.)
Storage Temperature Range
Junction Temperature (Note 4)
2.0 kV
± Supply Voltage
(V+) + 0.3V, (V−) − 0.3V
16V
± 5 mA
± 30 mA
40 mA
260˚C
−65˚C to +150˚C
150˚C
(Note 1)
3.0V ≤ V+ ≤ 15.5V
−55˚C ≤ TJ ≤ +125˚C
−40˚C ≤ TJ ≤ +85˚C
−40˚C ≤ TJ ≤ +85˚C
115˚C/W
193˚C/W
81˚C/W
126˚C/W
5V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2 and RL > 1M. Boldface
limits apply at the temperature extremes.
Symbol
VOS
TCVOS
Parameter
Conditions
Input Offset Voltage
LMC6462AI
LMC6462BI
LMC6462AM
Typ
LMC6464AI
LMC6464BI
LMC6464AM
(Note 5)
Limit
Limit
Limit
(Note 6)
(Note 6)
(Note 6)
0.5
3.0
0.5
mV
1.2
3.7
1.5
max
0.25
Input Offset Voltage
1.5
Units
µV/˚C
Average Drift
IB
Input Current
(Note 13)
0.15
10
10
200
pA max
IOS
Input Offset Current
(Note 13)
0.075
5
5
100
pA max
CIN
Common-Mode
3
pF
Input Capacitance
RIN
Input Resistance
CMRR
Common Mode
85
0V ≤ VCM ≤ 5.0V
V+ = 5V
85
5V ≤ V+ ≤ 15V,
V− = 0V, VO = 2.5V
85
−5V ≤ V− ≤ −15V,
V+ = 0V, VO = −2.5V
85
Rejection Ratio
Input Common-Mode
V+ = 5V
Voltage Range
For CMRR ≥ 50 dB
Rejection Ratio
+PSRR
Positive Power Supply
Rejection Ratio
−PSRR
VCM
Negative Power Supply
Tera Ω
> 10
0V ≤ VCM ≤ 15.0V,
V+ = 15V
−0.2
5.30
V+ = 15V
−0.2
For CMRR ≥ 50 dB
15.30
3
70
65
70
67
62
65
dB
min
70
65
70
67
62
65
70
65
70
dB
67
62
65
min
70
65
70
dB
67
62
65
min
−0.10
−0.10
−0.10
V
0.00
0.00
0.00
max
5.25
5.25
5.25
V
5.00
5.00
5.00
min
−0.15
−0.15
−0.15
V
0.00
0.00
0.00
max
15.25
15.25
15.25
V
15.00
15.00
15.00
min
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5V DC Electrical Characteristics
(Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2 and RL > 1M. Boldface
limits apply at the temperature extremes.
Symbol
AV
Parameter
Conditions
Large Signal
RL = 100 kΩ
Voltage Gain
(Note 7)
LMC6462AI
LMC6462BI
LMC6462AM
Typ
LMC6464AI
LMC6464BI
LMC6464AM
(Note 5)
Limit
Limit
Limit
(Note 6)
(Note 6)
(Note 6)
Units
Sourcing
3000
V/mV
Sinking
400
V/mV
Sourcing
2500
V/mV
Sinking
200
V/mV
min
min
RL = 25 kΩ
(Note 7)
min
min
VO
Output Swing
V+ = 5V
RL = 100 kΩ to V+/2
4.995
0.005
V+ = 5V
RL = 25 kΩ to V+/2
4.990
0.010
V+ = 15V
RL = 100 kΩ to V+/2
14.990
0.010
V+ = 15V
RL = 25 kΩ to V+/2
14.965
0.025
ISC
Output Short Circuit
Current
V+ = 5V
ISC
Output Short Circuit
Current
V+ = 15V
Sourcing, VO = 0V
27
Sinking, VO = 5V
27
Sourcing, VO = 0V
38
Sinking, VO = 12V
75
(Note 8)
IS
Supply Current
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Dual, LMC6462
V+ = +5V, VO = V+/2
40
Quad, LMC6464
V+ = +5V, VO = V+/2
80
Dual, LMC6462
V+ = +15V, VO = V+/2
50
Quad, LMC6464
V+ = +15V, VO = V+/2
90
4
4.990
4.950
4.990
V
4.980
4.925
4.970
min
0.010
0.050
0.010
V
0.020
0.075
0.030
max
4.975
4.950
4.975
V
4.965
4.850
4.955
min
0.020
0.050
0.020
V
0.035
0.150
0.045
max
14.975
14.950
14.975
V
14.965
14.925
14.955
min
0.025
0.050
0.025
V
0.035
0.075
0.050
max
14.900
14.850
14.900
V
14.850
14.800
14.800
min
0.050
0.100
0.050
V
0.150
0.200
0.200
max
19
19
19
mA
15
15
15
min
22
22
22
mA
17
17
17
min
24
24
24
mA
17
17
17
min
55
55
55
mA
45
45
45
min
55
55
55
µA
70
70
75
max
110
110
110
µA
140
140
150
max
60
60
60
µA
70
70
75
max
120
120
120
µA
140
140
150
max
5V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2 and RL > 1M. Boldface
limits apply at the temperature extremes.
Symbol
SR
Parameter
Slew Rate
LMC6462AM
LMC6464BI
LMC6464AM
(Note 5)
Limit
Limit
Limit
(Note 6)
(Note 6)
(Note 6)
15
15
15
8
8
8
V+ = 15V
28
Units
V/ms
min
50
kHz
Phase Margin
50
Deg
Gain Margin
15
dB
130
dB
Gain-Bandwidth Product
φm
Gm
Amp-to-Amp Isolation
Input-Referred
Voltage Noise
in
LMC6462BI
LMC6464AI
(Note 9)
GBW
en
LMC6462AI
Typ
Conditions
Input-Referred
(Note 10)
f = 1 kHz
VCM = 1V
f = 1 kHz
80
0.03
Current Noise
3V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 3V, V− = 0V, VCM = VO = V+/2 and RL > 1M. Boldface
limits apply at the temperature extremes.
Symbol
VOS
TCVOS
Parameter
Conditions
Input Offset Voltage
LMC6462AI
LMC6462BI
LMC6462AM
Typ
LMC6464AI
LMC6464BI
LMC6464AM
(Note 5)
Limit
Limit
Limit
(Note 6)
(Note 6)
(Note 6)
2.0
3.0
2.0
mV
2.7
3.7
3.0
max
0.9
Input Offset Voltage
2.0
Units
µV/˚C
Average Drift
IB
Input Current
(Note 13)
0.15
10
10
200
IOS
Input Offset Current
(Note 13)
0.075
5
5
100
pA
CMRR
Common Mode
0V ≤ VCM ≤ 3V
74
60
60
60
dB
PSRR
Power Supply
3V ≤ V+ ≤ 15V, V− = 0V
80
60
60
60
Rejection Ratio
min
Rejection Ratio
VCM
Input Common-Mode
pA
dB
min
For CMRR ≥ 50 dB
−0.10
0.0
0.0
0.0
Voltage Range
V
max
3.0
3.0
3.0
3.0
V
min
VO
Output Swing
RL = 25 kΩ to V+/2
2.95
2.9
2.9
2.9
V
min
0.15
0.1
0.1
0.1
V
max
IS
Supply Current
Dual, LMC6462
VO = V+/2
40
Quad, LMC6464
VO = V+/2
80
5
55
55
55
70
70
70
µA
110
110
110
µA
140
140
140
max
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3V AC Electrical Characteristics
Unless otherwise specified, V+ = 3V, V− = 0V, VCM = VO = V+/2 and RL > 1M. Boldface limits apply at the temperature extremes.
Symbol
Parameter
LMC6462AI
LMC6462BI
LMC6462AM
Typ
LMC6464AI
LMC6464BI
LMC6464AM
(Note 5)
Limit
Limit
Limit
(Note 6)
(Note 6)
(Note 6)
Conditions
SR
Slew Rate
(Note 11)
GBW
Gain-Bandwidth Product
Units
23
V/ms
50
kHz
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5 kΩ in series with 100 pF. All pins rated per method 3015.6 of MIL-STD-883. This is a class 2 device rating.
Note 3: Applies to both single supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150˚C. Output currents in excess of ± 30 mA over long term may adversely affect reliability.
Note 4: The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max)
− TA)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: V+ = 15V, VCM = 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V ≤ VO ≤ 11.5V. For Sinking tests, 3.5V ≤ VO ≤ 7.5V.
Note 8: Do not short circuit output to V+, when V+ is greater than 13V or reliability will be adversely affected.
Note 9: V+ = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of either the positive or negative slew rates.
Note 10: Input referred, V+ = 15V and RL = 100 kΩ connected to 7.5V. Each amp excited in turn with 1 kHz to produce VO = 12 VPP.
Note 11: Connected as Voltage Follower with 2V step input. Number specified is the slower of either the positive or negative slew rates.
Note 12: Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings.
Note 13: Guaranteed limits are dictated by tester limitations and not device performance. Actual performance is reflected in the typical value.
Note 14: For guaranteed Military Temperature Range parameters see RETSMC6462/4X.
Typical Performance Characteristics
Supply Current vs
Supply Voltage
VS = +5V, Single Supply, TA = 25˚C unless otherwise specified
Sourcing Current vs
Output Voltage
DS012051-30
Sourcing Current vs
Output Voltage
DS012051-31
Sinking Current vs
Output Voltage
6
DS012051-32
Sinking Current vs
Output Voltage
DS012051-34
DS012051-33
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Sourcing Current vs
Output Voltage
DS012051-35
Typical Performance Characteristics
VS = +5V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Sinking Current vs
Output Voltage
Input Voltage
Noise vs Frequency
DS012051-37
DS012051-36
Input Voltage Noise
vs Input Voltage
Input Voltage Noise
vs Input Voltage
DS012051-38
∆VOS vs CMR
Input Voltage Noise
vs Input Voltage
DS012051-41
DS012051-39
Input Voltage vs
Output Voltage
DS012051-40
Open Loop
Frequency Response
Open Loop Frequency
Response vs Temperature
DS012051-43
DS012051-42
DS012051-44
7
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Typical Performance Characteristics
VS = +5V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Gain and Phase vs
Capacitive Load
Slew Rate vs
Supply Voltage
Non-Inverting Large
Signal Pulse Response
Non-Inverting Large
Signal Pulse Response
Non-Inverting Large
Signal Pulse Response
DS012051-48
Non-Inverting Small
Signal Pulse Response
Non-Inverting Small
Signal Pulse Response
DS012051-49
Non-Inverting Small
Signal Pulse Response
DS012051-51
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DS012051-47
DS012051-46
DS012051-45
Inverting Large
Signal Pulse Response
DS012051-52
8
DS012051-50
DS012051-53
Typical Performance Characteristics
VS = +5V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Inverting Large Signal
Pulse Response
Inverting Large Signal
Pulse Response
DS012051-54
Inverting Small Signal
Pulse Response
DS012051-55
Inverting Small Signal
Pulse Response
DS012051-56
Inverting Small Signal
Pulse Response
DS012051-57
DS012051-58
pins, possibly affecting reliability. The input current can be
externally limited to ± 5 mA, with an input resistor, as shown
in Figure 3.
Application Information
1.0 Input Common-Mode Voltage Range
The LMC6462/4 has a rail-to-rail input common-mode voltage range. Figure 1 shows an input voltage exceeding both
supplies with no resulting phase inversion on the output.
DS012051-6
FIGURE 2. A ± 7.5V Input Signal Greatly Exceeds
the 3V Supply in Figure 3 Causing
No Phase Inversion Due to RI
DS012051-5
FIGURE 1. An Input Voltage Signal Exceeds
the LMC6462/4 Power Supply Voltage
with No Output Phase Inversion
The absolute maximum input voltage at V+ = 3V is 300 mV
beyond either supply rail at room temperature. Voltages
greatly exceeding this absolute maximum rating, as in Figure
2, can cause excessive current to flow in or out of the input
9
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Application Information
Another circuit, shown in Figure 6, is also used to indirectly
drive capacitive loads. This circuit is an improvement to the
circuit shown in Figure 4 because it provides DC accuracy as
well as AC stability. R1 and C1 serve to counteract the loss
of phase margin by feeding the high frequency component of
the output signal back to the amplifiers inverting input,
thereby preserving phase margin in the overall feedback
loop. The values of R1 and C1 should be experimentally determined by the system designer for the desired pulse response. Increased capacitive drive is possible by increasing
the value of the capacitor in the feedback loop.
(Continued)
DS012051-7
FIGURE 3. Input Current Protection for Voltages
Exceeding the Supply Voltage
2.0 Rail-to-Rail Output
The approximated output resistance of the LMC6462/4 is
180Ω sourcing, and 130Ω sinking at VS = 3V, and 110Ω
sourcing and 83Ω sinking at VS = 5V. The maximum output
swing can be estimated as a function of load using the calculated output resistance.
3.0 Capacitive Load Tolerance
The LMC6462/4 can typically drive a 200 pF load with VS =
5V at unity gain without oscillating. The unity gain follower is
the most sensitive configuration to capacitive load. Direct capacitive loading reduces the phase margin of op-amps. The
combination of the op-amp’s output impedance and the capacitive load induces phase lag. This results in either an underdamped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 4. If there is a resistive
component of the load in parallel to the capacitive component, the isolation resistor and the resistive load create a
voltage divider at the output. This introduces a DC error at
the output.
DS012051-10
FIGURE 6. LMC6462 Non-Inverting Amplifier,
Compensated to Handle a 300 pF Capacitive
and 100 kΩ Resistive Load
DS012051-8
DS012051-11
FIGURE 4. Resistive Isolation of
a 300 pF Capacitive Load
FIGURE 7. Pulse Response of
LMC6462 Circuit in Figure 6
The pulse response of the circuit shown in Figure 6 is shown
in Figure 7.
4.0 Compensating for Input Capacitance
It is quite common to use large values of feedback resistance with amplifiers that have ultra-low input current, like
the LMC6462/4. Large feedback resistors can react with
small values of input capacitance due to transducers, photodiodes, and circuits board parasitics to reduce phase
margins.
DS012051-9
FIGURE 5. Pulse Response of the LMC6462
Circuit Shown in Figure 4
Figure 5 displays the pulse response of the LMC6462/4 circuit in Figure 4.
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10
Application Information
(Continued)
DS012051-14
FIGURE 10. Non-Inverting Configuration
Offset Voltage Adjustment
DS012051-12
FIGURE 8. Canceling the Effect of Input Capacitance
6.0 Spice Macromodel
A Spice macromodel is available for the LMC6462/4. This
model includes a simulation of:
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 8 ), CF, is first estimated by:
• Input common-mode voltage range
• Frequency and transient response
• GBW dependence on loading conditions
• Quiescent and dynamic supply current
• Output swing dependence on loading conditions
and many more characteristics as listed on the macromodel
disk.
Contact the National Semiconductor Customer Response
Center to obtain an operational amplifier Spice model library
disk.
or
R1 CIN ≤ R2 CF
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or
smaller than that of a breadboard, so the actual optimum
value for CF may be different. The values of CF should be
checked on the actual circuit. (Refer to the LMC660 quad
CMOS amplifier data sheet for a more detailed discussion.)
7.0 Printed-Circuit-Board Layout
for High-Impedance Work
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low input current of the LMC6462/4, typically 150
fA, it is essential to have an excellent layout. Fortunately, the
techniques of obtaining low leakages are quite simple. First,
the user must not ignore the surface leakage of the PC
board, even though it may sometimes appear acceptably
low, because under conditions of high humidity or dust or
contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6462’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs, as in Figure 11. To have a significant effect, guard rings should be
placed in both the top and bottom of the PC board. This PC
foil must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 1012Ω, which is normally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 30 times degradation from the LMC6462/4’s
actual performance. However, if a guard ring is held within 5
mV of the inputs, then even a resistance of 1011Ω would
cause only 0.05 pA of leakage current. See Figure 12 for
typical connections of guard rings for standard op-amp
configurations.
5.0 Offset Voltage Adjustment
Offset voltage adjustment circuits are illustrated in Figure 9
and Figure 10. Large value resistances and potentiometers
are used to reduce power consumption while providing typically ± 2.5 mV of adjustment range, referred to the input, for
both configurations with VS = ± 5V.
DS012051-13
FIGURE 9. Inverting Configuration
Offset Voltage Adjustment
11
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Application Information
board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring. See Figure
13.
(Continued)
DS012051-19
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board.)
FIGURE 13. Air Wiring
DS012051-15
FIGURE 11. Example of Guard Ring in P.C. Board
Layout
DS012051-16
Inverting Amplifier
DS012051-17
Non-Inverting Amplifier
DS012051-18
Follower
FIGURE 12. Typical Connections of Guard Rings
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
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12
Application Information
cations that benefit from these features include analytic
medical instruments, magnetic field detectors, gas detectors,
and silicon-based transducers.
A small valued potentiometer is used in series with Rg to set
the differential gain of the three op-amp instrumentation circuit in Figure 14. This combination is used instead of one
large valued potentiometer to increase gain trim accuracy
and reduce error due to vibration.
(Continued)
8.0 Instrumentation Circuits
The LMC6464 has the high input impedance, large
common-mode range and high CMRR needed for designing
instrumentation circuits. Instrumentation circuits designed
with the LMC6464 can reject a larger range of
common-mode signals than most in-amps. This makes instrumentation circuits designed with the LMC6464 an excellent choice for noisy or industrial environments. Other appli-
DS012051-20
FIGURE 14. Low Power Three Op-Amp Instrumentation Amplifier
Higher frequency and larger common-mode range applications are best facilitated by a three op-amp instrumentation
amplifier.
A two op-amp instrumentation amplifier designed for a gain
of 100 is shown in Figure 15. Low sensitivity trimming is
made for offset voltage, CMRR and gain. Low cost and low
power consumption are the main advantages of this two
op-amp circuit.
DS012051-21
FIGURE 15. Low-Power Two-Op-Amp Instrumentation Amplifier
13
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Typical Single-Supply Applications
TRANSDUCER INTERFACE CIRCUITS
DS012051-25
DS012051-22
FIGURE 16. Photo Detector Circuit
FIGURE 19. Full-Wave Rectifier
with Input Current Protection (RI)
Photocells can be used in portable light measuring instruments. The LMC6462, which can be operated off a battery, is
an excellent choice for this circuit because of its very low input current and offset voltage.
In Figure 18 Figure 19, RI limits current into the amplifier
since excess current can be caused by the input voltage exceeding the supply voltage.
LMC6462 AS A COMPARATOR
PRECISION CURRENT SOURCE
DS012051-23
FIGURE 17. Comparator with Hysteresis
Figure 17 shows the application of the LMC6462 as a comparator. The hysteresis is determined by the ratio of the two
resistors. The LMC6462 can thus be used as a micropower
comparator, in applications where the quiescent current is an
important parameter.
DS012051-26
FIGURE 20. Precision Current Source
The output current IOUT is given by:
HALF-WAVE AND FULL-WAVE RECTIFIERS
OSCILLATORS
DS012051-24
FIGURE 18. Half-Wave Rectifier with
Input Current Protection (RI)
DS012051-27
FIGURE 21. 1 Hz Square-Wave Oscillator
For single supply 5V operation, the output of the circuit will
swing from 0V to 5V. The voltage divider set up R2, R3 and
R4 will cause the non-inverting input of the LMC6462 to
move from 1.67V (1⁄3 of 5V) to 3.33V (2⁄3 of 5V). This voltage
behaves as the threshold voltage.
R1 and C1 determine the time constant of the circuit. The frequency of oscillation, fOSC is
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14
Typical Single-Supply Applications
LOW FREQUENCY NULL
(Continued)
where ∆t is the time the amplifier input takes to move from
1.67V to 3.33V. The calculations are shown below.
where τ = RC = 0.68 seconds
→ t1 = 0.27 seconds.
and
→ t2 = 0.75 seconds
Then,
DS012051-28
FIGURE 22. High Gain Amplifier
with Low Frequency Null
Output offset voltage is the error introduced in the output
voltage due to the inherent input offset voltage VOS, of an
amplifier.
Output Offset Voltage = (Input Offset Voltage) (Gain)
In the above configuration, the resistors R5 and R6 determine the nominal voltage around which the input signal, VIN
should be symmetrical. The high frequency component of
the input signal VIN will be unaffected while the low frequency component will be nulled since the DC level of the
output will be the input offset voltage of the LMC6462 plus
the bias voltage. This implies that the output offset voltage
due to the top amplifier will be eliminated.
= 1 Hz
15
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Physical Dimensions
inches (millimeters) unless otherwise noted
8-Pin Small Outline Package
Order Number LMC6462AIM or LMC6462BIM
NS Package Number M08A
14-Pin Small Outline Package
Order Number LMC6464AIM or LMC6464BIM
NS Package Number M14A
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16
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
8-Pin Molded Dual-In-Line Package
Order Number LMC6462AIN or LMC6462BIN
NS Package Number N08E
14-Pin Molded Dual-In-Line Pacakge
Order Number LMC6462AIN or LMC6464BIN
NS Package Number N14A
17
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LMC6462 Dual/LMC6464 Quad Micropower, Rail-to-Rail Input and Output CMOS Operational
Amplifier
Notes
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
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Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: [email protected]
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Fax: +49 (0) 1 80-530 85 86
Email: [email protected]
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English Tel: +49 (0) 1 80-532 78 32
Français Tel: +49 (0) 1 80-532 93 58
Italiano Tel: +49 (0) 1 80-534 16 80
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
National Semiconductor
Asia Pacific Customer
Response Group
Tel: 65-2544466
Fax: 65-2504466
Email: [email protected]
National Semiconductor
Japan Ltd.
Tel: 81-3-5639-7560
Fax: 81-3-5639-7507
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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