Intersil DG308ACJ Quad monolithic spst, cmos analog switch Datasheet

DG308A
Data Sheet
November 1999
Quad Monolithic SPST, CMOS Analog
Switch
The DG308A quad monolithic SPST, CMOS switch is latch
proof and is designed to block signals up to 30VP-P when
OFF. Featuring low ON resistance, low power consumption,
and rail-to-rail analog signal range, this switch is ideally
suited for high speed switching applications in
communications, instrumentation and process control. The
DG308A has single and dual supply capability. The input
thresholds are CMOS compatible.
File Number
3120.3
Features
• Low Power Consumption
• CMOS Compatible
• ±15V Analog Signal Range
• Single or Dual Supply Capability
• Alternate Source
Functional Diagram
DG308A
Ordering Information
PART NUMBER
S1
TEMP.
RANGE (oC)
PACKAGE
PKG.
NO.
DG308ACJ
0 to 70
16 Ld PDIP
E16.3
DG308ACY
0 to 70
16 Ld SOIC
M16.15
IN1
D1
S2
IN2
D2
Pinout
S3
DG308A
(PDIP, SOIC)
TOP VIEW
IN3
D3
S4
IN1
1
16 IN2
D1
2
15 D2
S1
3
V-
4
GND
5
14 S2
13 V+ (SUBSTRATE)
12 NC
S4
6
11 S3
D4
7
10 D3
IN4
8
9 IN3
-
IN4
D4
SWITCHES SHOWN FOR LOGIC “1” INPUT
TRUTH TABLE
LOGIC
DG308A
0
OFF
1
ON
Logic “0” ≤3.5V, Logic “1” ≥ 11V at V+ = 15V.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
DG308A
Schematic Diagram
(One Channel)
DG308A
V+
P1
P2
P3
S
P4
P5
P6
P7
VIN
N9
N8
P8
N1
N2
N3
N6
GND
N7
N11
D
N4
V-
2
N5
N10
DG308A
Absolute Maximum Ratings
Thermal Information
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V
Digital Inputs, VS, VD (Note 1) . . . . . . . . . . . . . . (V-) -2V to (V+) +2V
or 30mA, Whichever Comes First
Continuous Current, (Any Terminal Except S) . . . . . . . . . . . . . 30mA
Continuous Current, (S or D) . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . . . . 70mA
Thermal Resistance (Typical, Note 2)
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
115
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . . 65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range
“C” Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Signals on SX , DX , or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
V+ = 15V, V- = -15V, GND = 0V, TA = 25oC
Electrical Specifications
PARAMETER
TEST CONDITIONS
(NOTE 4)
MIN
(NOTE 3)
TYP
(NOTE 4)
MAX
UNITS
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
See Figure 1
-
130
200
ns
Turn-OFF Time, tOFF
See Figure 1
-
90
150
ns
Charge Injection, Q
CL = 1µF, RS = 0, VS = 0V
-
-10
-
pC
OFF Isolation, OIRR
VIN = 0V, RL = 75Ω, VS = 2VP-P , f = 500kHz
(Note 5)
-
78
-
dB
Source OFF Capacitance, CS(OFF)
f = 140kHz
VS = 0V
VIN = 0V
-
11
-
pF
Drain OFF Capacitance, CD(OFF)
VD = 0V
VIN = 0V
-
8
-
pF
Channel ON Capacitance,
CD(ON) + CS(ON)
VS = VD = 0V
VIN = 15V
-
27
-
pF
DIGITAL INPUT CHARACTERISTICS
Input Current with Voltage High, IIH
VIN = 15V, Full Temperature Range
-
0.001
1
µA
Input Current with Voltage Low, IIL
VIN = 0V, Full Temperature Range
-1
-0.001
-
µA
-15
-
15
V
IS = -1mA, VD = +10V
-
60
100
Ω
IS = 1mA, VD = -10V
-
60
100
Ω
VS = 14V, VD = -14V
-
0.1
5
nA
VS = -14V, VD = 14V
-5
-0.1
-
nA
VS = -14V, VD = 14V
-
0.1
5
nA
VS = 14V, VD = -14V
-5
-0.1
-
nA
VD = VS = 14V
-
0.1
5
nA
VD = VS = -14V
-5
-0.1
-
nA
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
Drain-Source ON Resistance, rDS(ON)
VIN = 11V
Source OFF Leakage Current, IS(OFF) VIN = 3.5V
Drain OFF Leakage Current, ID(OFF)
Channel ON Leakage Current, ID(ON)
3
VIN = 11V
DG308A
V+ = 15V, V- = -15V, GND = 0V, TA = 25oC (Continued)
Electrical Specifications
PARAMETER
TEST CONDITIONS
(NOTE 4)
MIN
(NOTE 3)
TYP
(NOTE 4)
MAX
UNITS
-
0.001
100
µA
-100
-0.001
-
µA
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
All Channels ON or OFF
VIN = 0V or 15V
Negative Supply Current, INOTES:
3. Typical values are for design aid only, not guaranteed and not subject to production testing.
4. The algebraic convention whereby the most negative value is a minimum, and the most positive is a maximum, is used in this data sheet.
5. OFF isolation = 20 Log VD /VS , where VS = input to OFF switch, and VD = output.
Test Circuit and Waveforms
VO = VS
15V
RL
LOGIC “1” = SWITCH ON
RL + rDS(ON)
LOGIC
INPUT
tr < 20ns
tf < 20ns 0V
V+
S
D
15V
50%
50%
VO
VS = 3V
RL
1kΩ
IN
CL
35pF
SWITCH
INPUT
90%
90%
SWITCH
OUTPUT 0V
GND
V-15V
tON
FIGURE 1. tON AND tOFF TEST CIRCUIT AND MEASUREMENT POINTS
4
tOFF
DG308A
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
2058µm x 2109µm
Type: PSG Over Nitride
PSG Thickness: 7kÅ ±1.4kÅ
Nitride Thickness:8kÅ ±1.2kÅ
METALLIZATION:
Type: Al
Thickness: 10kÅ ±1kÅ
WORST CASE CURRENT DENSITY:
9.1 x 104 A/cm2
Metallization Mask Layout
DG308A
PIN 14
S2
PIN 13
V+ (SUBSTRATE)
PIN 11
S3
PIN 15
D2
PIN 10 D3
PIN 16
IN2
PIN 9 IN3
PIN 1
D1
PIN 8 IN4
PIN 2
IN1
PIN 7 D4
PIN 3
S1
5
PIN 4
V-
PIN 5
GND
PIN 6
54
DG308A
Dual-In-Line Plastic Packages (PDIP)
N
E16.3 (JEDEC MS-001-BB ISSUE D)
E1
INDEX
AREA
1 2 3
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE
N/2
INCHES
-B-
SYMBOL
-AD
E
BASE
PLANE
-C-
A2
SEATING
PLANE
A
L
D1
e
B1
D1
eA
A1
eC
B
0.010 (0.25) M
C
L
C A B S
C
eB
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
7. eB and eC are measured at the lead tips with the leads unconstrained.
eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
6
MILLIMETERS
MIN
MAX
MIN
MAX
NOTES
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
B1
0.045
0.070
1.15
1.77
8, 10
C
0.008
0.014
0.204
0.355
-
D
0.735
0.775
18.66
19.68
5
D1
0.005
-
0.13
-
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
2.54 BSC
-
eA
0.300 BSC
7.62 BSC
6
eB
-
0.430
-
10.92
7
L
0.115
0.150
2.93
3.81
4
N
16
16
9
Rev. 0 12/93
DG308A
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
H
0.25(0.010) M
M16.15 (JEDEC MS-012-AC ISSUE C)
B M
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
E
-B1
2
INCHES
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
e
α
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
B S
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.3859
0.3937
9.80
10.00
3
E
0.1497
0.1574
3.80
4.00
4
e
0.050 BSC
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
N
α
16
0o
1.27
6
16
8o
0o
7
8o
Rev. 0 12/93
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