Microchip MCP6546UT-E/LT Open-drain output sub-microamp comparator Datasheet

MCP6546/6R/6U/7/8/9
Open-Drain Output Sub-Microamp Comparators
Features
Description
• Low Quiescent Current: 600 nA/Comparator (typical)
• Rail-to-Rail Input: VSS - 0.3V to VDD + 0.3V
The Microchip Technology Inc. MCP6546/6R/6U/7/8/9
family of comparators, is offered in single (MCP6546,
MCP6546R, MCP6546U), single with chip select (CS)
(MCP6548), dual (MCP6547) and quad (MCP6549)
configurations. The outputs are open-drain and are
capable of driving heavy DC or capacitive loads.
•
•
•
•
•
•
•
•
•
Open-Drain Output: VOUT ≤ 10V
Propagation Delay: 4 µs (typical, 100 mV Overdrive)
Wide Supply Voltage Range: 1.6V to 5.5V
Single Available in SOT-23-5, SC-70-5* Packages
Available in Single, Dual and Quad
Chip Select (CS) with MCP6548
Low Switching Current
Internal Hysteresis: 3.3 mV (typical)
Temperature Range:
- Industrial: -40°C to +85°C
- Extended: -40°C to +125°C
Typical Applications
•
•
•
•
•
•
•
•
Laptop Computers
Mobile Phones
Metering Systems
Hand-held Electronics
RC Timers
Alarm and Monitoring Circuits
Windowed Comparators
Multi-vibrators
These comparators are optimized for low power,
single-supply application with greater than rail-to-rail
input operation. The output limits supply current surges
and dynamic power consumption while switching. The
open-drain output of the MCP6546/6R/6U/7/8/9 family
can be used as a level-shifter for up to 10V using a pullup resistor. It can also be used as a wired-OR logic.
The internal Input hysteresis eliminates output switching due to internal noise voltage, reducing current draw.
These comparators operate with a single-supply
voltage as low as 1.6V and draw a quiescent current of
less than 1 µA/comparator.
The related MCP6541/2/3/4 family of comparators from
Microchip has a push-pull output that supports rail-torail output swing and interfaces with CMOS/TTL logic.
* SC-70-5 E-Temp parts are not available at this
release of the data sheet.
MCP6546U SOT-23-5 is E-Temp only.
Related Devices
• CMOS/TTL-Compatible Output: MCP6541/2/3/4
Package Types
MCP6546
PDIP, SOIC, MSOP
7 VDD
6 OUT
+
VSS 4
OUT 1
VDD 2
+
VIN– 2
VIN+ 3
8 NC
VIN+ 3
MCP6547
PDIP, SOIC, MSOP
5 VSS
OUTA 1
4 VIN–
VINA+ 3
VSS 4
VINA– 2
-
NC 1
MCP6546R
SOT-23-5
5 NC
8 VDD
- +
7 OUTB
+ -
6 VINB–
5 VINB+
MCP6549
PDIP, SOIC, TSSOP
OUTA 1
14 OUTD
VINA– 2
- + + - 13 VIND–
12 VIND+
VINA+ 3
VDD 4
11 VSS
VINB+ 5
VINB– 6
5 VDD
OUT 1
VIN+ 1
VSS 2
-
VIN+ 3
+
VSS 2
MCP6546U
SC-70-5, SOT-23-5
4 VIN–
VIN– 3
+
MCP6546
SC-70-5, SOT23-5
5 VDD
MCP6548
PDIP, SOIC, MSOP
NC 1
VIN– 2
4 OUT
VIN+ 3
VSS 4
© 2002-2012 Microchip Technology Inc.
OUTB 7
10 VINC+
- + +-
9 VINC–
8 OUTC
8 CS
+
7 VDD
6 OUT
5 NC
DS21714G-page 1
MCP6546/6R/6U/7/8/9
1.0
ELECTRICAL
CHARACTERISTICS
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only, and functional
operation of the device, at those or any other conditions
above those indicated in the operational listings of this
specification, is not implied. Exposure to maximum rating conditions for extended periods may affect device
reliability.
Absolute Maximum Ratings †
VDD - VSS .........................................................................7.0V
Open-Drain Output.............................................. VSS + 10.5V
Analog Input (VIN+, VIN-)††............. VSS - 1.0V to VDD + 1.0V
All Other Inputs and Outputs ......... VSS – 0.3V to VDD + 0.3V
Difference Input Voltage ...................................... |VDD – VSS|
†† See Section 4.1.2 “Input Voltage and Current
Limits”
Output Short-Circuit Current .................................continuous
Current at Input Pins ....................................................±2 mA
Current at Output and Supply Pins ............................±30 mA
Storage Temperature.....................................-65°C to +150°C
Maximum Junction Temperature (TJ) .......................... +150°C
ESD Protection on All Pins:
(HBM;MM) .....................................2 kV;200V (MCP6546U)
(HBM;MM) ................................ 4 kV; 200V (all other parts)
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = 25°C, VIN+ = VDD/2,
VIN– = VSS, RPU = 2.74 kΩ to VPU = VDD (Refer to Figure 1-3).
Parameters
Sym
Min
Typ
Max
Units
Conditions
VDD
1.6
—
5.5
V
VPU ≥ VDD
IQ
0.3
0.6
1
µA
IOUT = 0
Input Voltage Range
VCMR
VSS −
0.3
—
VDD + 0.3
V
Common Mode Rejection Ratio
CMRR
55
70
—
dB
VDD = 5V, VCM = -0.3V to 5.3V
Common Mode Rejection Ratio
CMRR
50
65
—
dB
VDD = 5V, VCM = 2.5V to 5.3V
Common Mode Rejection Ratio
CMRR
55
70
—
dB
VDD = 5V, VCM = -0.3V to 2.5V
Power Supply Rejection Ratio
PSRR
63
80
—
dB
VCM = VSS
VOS
-7.0
±1.5
+7.0
mV
VCM = VSS (Note 1)
Power Supply
Supply Voltage
Quiescent Current
(per comparator)
Input
Input Offset Voltage
ΔVOS/ΔTA
—
±3
—
VHYST
1.5
3.3
6.5
Linear Temp. Co.
TC1
—
6.7
—
µV/°C TA = -40°C to +125°C, VCM = VSS
(Note 2)
Quadratic Temp. Co.
TC2
—
-0.035
—
µV/°C2 TA = -40°C to +125°C, VCM = VSS
(Note 2)
Drift with Temperature
Input Hysteresis Voltage
Input Bias Current
µV/°C TA = -40°C to +125°C, VCM = VSS
mV
VCM = VSS (Note 1)
IB
—
1
—
pA
VCM = VSS
At Temperature (I-Temp parts)
IB
—
25
100
pA
TA = +85°C, VCM = VSS (Note 3)
At Temperature (E-Temp parts)
IB
—
1200
5000
pA
TA = +125°C, VCM = VSS (Note 3)
IOS
—
±1
—
pA
VCM = VSS
Input Offset Current
Note 1:
2:
3:
4:
The input offset voltage is the center of the input-referred trip points. The input hysteresis is the difference
between the input-referred trip points.
VHYST at differential temperatures is estimated using:
VHYST (TA) = VHYST + (TA -25°C) TC1 + (TA - 25°C)2TC2.
Input bias current at temperature is not tested for the SC-70-5 package.
Do not short the output above VSS + 10V. Limit the output current to Absolute Maximum Rating of 30 mA.
The minimum VPU test limit was VDD before Dec. 2004 (week code 52).
DS21714G-page 2
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = 25°C, VIN+ = VDD/2,
VIN– = VSS, RPU = 2.74 kΩ to VPU = VDD (Refer to Figure 1-3).
Parameters
Common Mode Input Impedance
Differential Input Impedance
Sym
ZCM
ZDIFF
Min
Typ
Max
Units
—
13
10 ||4
—
Ω||pF
—
13
10 ||2
—
Ω||pF
Conditions
Open-Drain Output
Output Pull-Up Voltage
VPU
1.6
—
10
V
(Note 4)
High-Level Output Current
IOH
-100
—
—
nA
VDD = 1.6V to 5.5V, VPU = 10V
(Note 4)
Low-Level Output Voltage
VOL
VSS
—
VSS + 0.2
V
IOUT = 2 mA, VPU = VDD = 5V
Short-Circuit Current
Output Pin Capacitance
Note 1:
2:
3:
4:
ISC
—
±1.5
—
mA
VPU = VDD = 1.6V (Note 4)
ISC
–
30
—
mA
VPU = VDD = 5.5V (Note 4)
COUT
—
8
—
pF
The input offset voltage is the center of the input-referred trip points. The input hysteresis is the difference
between the input-referred trip points.
VHYST at differential temperatures is estimated using:
VHYST (TA) = VHYST + (TA -25°C) TC1 + (TA - 25°C)2TC2.
Input bias current at temperature is not tested for the SC-70-5 package.
Do not short the output above VSS + 10V. Limit the output current to Absolute Maximum Rating of 30 mA.
The minimum VPU test limit was VDD before Dec. 2004 (week code 52).
AC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = 25°C, VIN+ = VDD/2,
Step = 200 mV, Overdrive = 100 mV, RPU = 2.74 kΩ to VPU = VDD, and CL = 36 pF
(Refer to Figure 1-2 and Figure 1-3).
Parameters
Sym
Min
Typ
Max
Units
tF
—
0.7
—
µs
Propagation Delay (High-to-Low)
tPHL
—
4.0
8.0
µs
Propagation Delay (Low-to-High)
tPLH
—
3.0
8.0
µs
Propagation Delay Skew
tPDS
—
-1.0
—
µs
Maximum Toggle Frequency
fMAX
—
225
—
kHz
VDD = 1.6V
fMAX
—
165
—
kHz
VDD = 5.5V
Eni
—
200
—
Fall Time
Input Noise Voltage
Note 1:
2:
Conditions
(Note 1)
(Note 1)
(Notes 1 and 2)
µVP-P 10 Hz to 100 kHz
tR and tPLH depend on the load (RL and CL); these specifications are valid for the indicated load only.
Propagation Delay Skew is defined as: tPDS = tPLH - tPHL.
© 2002-2012 Microchip Technology Inc.
DS21714G-page 3
MCP6546/6R/6U/7/8/9
MCP6548 CHIP SELECT (CS) CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = 25°C, VIN+ = VDD/2,
VIN– = VSS, RPU = 2.74 kΩ to VPU = VDD, and CL = 36 pF (Refer to Figures 1-1 and 1-3).
Parameters
Sym
Min
Typ
Max
Units
Conditions
CS Logic Threshold, Low
VIL
VSS
—
0.2
VDD
V
CS Input Current, Low
ICSL
—
5
—
pA
CS Logic Threshold, High
VIH
0.8 VDD
—
VDD
V
CS Input Current, High
ICSH
—
1
—
pA
CS = VDD
CS Input High, VDD Current
IDD
—
18
—
pA
CS = VDD
CS Input High, GND Current
ISS
—
-20
—
pA
CS = VDD
Comparator Output Leakage
IO(LEAK)
—
1
—
pA
VOUT = VSS+10V, CS = VDD
CS Low to Comparator Output
Low Turn-on Time
tON
—
2
50
ms
CS = 0.2VDD to VOUT = VDD/2,
VIN– = VDD
CS High to Comparator Output
High Z Turn-off Time
tOFF
—
10
—
µs
CS = 0.8VDD to VOUT = VDD/2,
VIN– = VDD
VCS_HYST
—
0.6
—
V
VDD = 5V
CS Low Specifications
CS = VSS
CS High Specifications
CS Dynamic Specifications
CS Hysteresis
CS
VIL
VIH
tOFF
tON
VOUT High-Z
ISS -20 pA (typ.)
ICS 1 pA (typ.)
VIN–
VIN+ = VDD/2
100 mV
High-Z
-0.6 µA (typ.)
5 pA (typ.)
-20 pA (typ.)
1 pA (typ.)
FIGURE 1-1:
Timing Diagram for the CS
pin on the MCP6548.
DS21714G-page 4
100 mV
tPLH
VOUT
VOL
FIGURE 1-2:
Diagram.
tPHL
VOH
VOL
Propagation Delay Timing
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V and VSS = GND.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Temperature Ranges
Specified Temperature Range
TA
-40
—
+85
°C
Operating Temperature Range
TA
-40
—
+125
°C
Storage Temperature Range
TA
-65
—
+150
°C
Thermal Resistance, 5L-SC-70
θJA
—
331
—
°C/W
Thermal Resistance, 5L-SOT-23
θJA
—
220.7
—
°C/W
Thermal Resistance, 8L-MSOP
θJA
—
211
—
°C/W
Thermal Resistance, 8L-PDIP
θJA
—
89.3
—
°C/W
Thermal Resistance, 8L-SOIC
θJA
—
149.5
—
°C/W
Thermal Resistance, 14L-PDIP
θJA
—
70
—
°C/W
Thermal Resistance, 14L-SOIC
θJA
—
95.3
—
°C/W
Thermal Resistance, 14L-TSSOP
θJA
—
100
—
°C/W
Note
Thermal Package Resistances
Note:
1.1
The MCP6546/6R/6U/7/8/9 I-temp family operates over this extended temperature range, but with reduced
performance. In any case, the Junction Temperature (TJ) must not exceed the absolute maximum
specification of +150°C.
Test Circuit Configuration
This test circuit configuration is used to determine the
AC and DC specifications.
VDD
VPU = VDD
200 kΩ
MCP654X
200 kΩ
100 kΩ
VIN = VSS
RPU =
(2 mA)/ VDD
VOUT
36 pF
VSS = 0V
FIGURE 1-3:
AC and DC Test Circuit for
the Open-Drain Output Comparators.
© 2002-2012 Microchip Technology Inc.
DS21714G-page 5
MCP6546/6R/6U/7/8/9
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RPU = 2.74 kΩ to VPU = VDD, and CL = 36 pF.
18%
0%
7
1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6 6.0
Input Hysteresis Voltage (mV)
Input Offset Voltage (mV)
FIGURE 2-4:
VCM = VSS.
0%
14
12
8
10
6
4
2
0
-2
-4
-6
-8
-10
-12
0%
Input Hysteresis Voltage –
Linear Temp. Co.; TC1 (µV/°C)
Input Offset Voltage Drift (µV/°C)
VOUT
5
4
3
2
1
VIN–
0
-1
0
1
2
3
4
5
6
7
Time (1 ms/div)
8
9
10
FIGURE 2-3:
The MCP6546/6R/6U/7/8/9
Comparators Show No Phase Reversal.
DS21714G-page 6
20%
18%
16%
14%
12%
10%
8%
6%
4%
2%
0%
596 Samples
VCM = VSS
TA = -40°C to +125°C
VDD = 5.5V
VDD = 1.6V
-0.056
VDD = 5.5V
6
FIGURE 2-5:
Input Hysteresis Voltage
Linear Temp. Co. (TC1) at VCM = VSS.
-0.060
Inverting Input, Output
Voltage (V)
7
Input Offset Voltage Drift at
Percentage of Occurrences
FIGURE 2-2:
VCM = VSS.
VDD = 1.6V
5%
4.6
2%
VDD = 5.5V
9.4
4%
10%
9.0
6%
-0.016
8%
15%
8.6
10%
596 Samples
VCM = VSS
TA = -40°C to +125°C
20%
-0.020
12%
25%
8.2
1200 Samples
VCM = VSS
TA = -40°C to +125°C
14%
Input Hysteresis Voltage at
-0.024
Input Offset Voltage at
Percentage of Occurrences
16%
-14
Percentage of Occurrences
FIGURE 2-1:
VCM = VSS.
7.8
6
-0.028
5
7.4
4
5.8
3
-0.048
2
5.4
1
2%
-0.052
-7 -6 -5 -4 -3 -2 -1 0
4%
-0.032
0%
6%
7.0
2%
8%
-0.036
4%
10%
6.6
6%
12%
-0.040
8%
14%
1200 Samples
VCM = VSS
6.2
10%
16%
5.0
12%
-0.044
1200 Samples
VCM = VSS
Percentage of Occurrences
Percentage of Occurrences
14%
Input Hysteresis Voltage –
Quadratic Temp. Co.; TC2 (µV/°C2)
FIGURE 2-6:
Input Hysteresis Voltage
Quadratic Temp. Co. (TC2) at VCM = VSS.
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
VCM = VSS
VDD = 1.6V
VDD = 5.5V
125
FIGURE 2-7:
Input Offset Voltage vs.
Ambient Temperature at VCM = VSS.
Common Mode Input Voltage (V)
Common Mode Input Voltage (V)
FIGURE 2-9:
Input Offset Voltage vs.
Common Mode Input Voltage at VDD = 5.5V.
© 2002-2012 Microchip Technology Inc.
2.0
1.8
1.6
1.4
1.2
6.0
5.5
5.0
4.5
4.0
3.5
3.0
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-2.0
2.5
-1.5
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
2.0
TA = +85°C
TA = +125°C
-1.0
VDD = 5.5V
0.0
0.0
-0.5
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
-0.5
Input Hysteresis Voltage (mV)
TA = -40°C
TA = +25°C
0.5
-0.5
Input Offset Voltage (mV)
FIGURE 2-11:
Input Hysteresis Voltage vs.
Common Mode Input Voltage at VDD = 1.6V.
VDD = 5.5V
1.0
1.0
Common Mode Input Voltage (V)
FIGURE 2-8:
Input Offset Voltage vs.
Common Mode Input Voltage at VDD = 1.6V.
1.5
125
TA = +25°C
TA = -40°C
TA = +125°C
0.8
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
-2.0
2.0
100
TA = +125°C
TA = +85°C
0.6
-1.5
VDD = 1.6V
1.5
TA = +125°C
-1.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
-0.5
0
25
50
75
Ambient Temperature (°C)
0.4
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
0.0
-25
0.2
Input Hysteresis Voltage (mV)
1.0
-0.4
Input Offset Voltage (mV)
VDD = 1.6V
0.5
-50
FIGURE 2-10:
Input Hysteresis Voltage vs.
Ambient Temperature at VCM = VSS.
2.0
1.5
VDD = 5.5V
0.0
0
25
50
75
100
Ambient Temperature (°C)
VDD = 1.6V
-0.2
-25
VCM = VSS
0.5
-50
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
-0.4
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
Input Hysteresis Voltage (mV)
Input Offset Voltage (mV)
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RPU = 2.74 kΩ to VPU = VDD, and CL = 36 pF.
Common Mode Input Voltage (V)
FIGURE 2-12:
Input Hysteresis Voltage vs.
Common Mode Input Voltage at VDD = 5.5V.
DS21714G-page 7
MCP6546/6R/6U/7/8/9
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RPU = 2.74 kΩ to VPU = VDD, and CL = 36 pF.
10n
10000
Input Referred
Input Bias, Offset Currents
(A)
90
CMRR, PSRR (dB)
85
80
100p
100
75
PSRR, VIN+ = VSS, VDD = 1.6V to 5.5V
70
65
CMRR, VIN+ = -0.3 to 5.3V, VDD = 5.0V
IB, TA = +85°C
IOS, TA = +125°C
IOS, TA = +85°C
1
1p
0.1
100f
55
-50
-25
0
25
50
75
Ambient Temperature (°C)
FIGURE 2-13:
Temperature.
1000
100
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
125
Common Mode Input Voltage (V)
CMRR,PSRR vs. Ambient
FIGURE 2-16:
Input Bias Current, Input
Offset Current vs. Common Mode Input Voltage.
0.7
Quiescent Current
per Comparator (µA)
VDD = 5.5V
VCM = VDD
100
IB
10
| IOS |
1
0.1
0.6
0.5
0.4
0.2
0.1
65
75
85
95
105
115
125
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Power Supply Voltage (V)
Ambient Temperature (°C)
FIGURE 2-14:
Input Bias Current, Input
Offset Current vs. Ambient Temperature.
0.7
0.6
0.8
IQ does not include pull-up resistor current
VDD = 1.6V
0.5
0.4
0.3
0.2
FIGURE 2-17:
Quiescent Current vs.
Power Supply Voltage.
Quiescent Current
per Comparator (µA)
0.8
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
0.3
0.0
55
Quiescent Current
per Comparator (µA)
VDD = 5.5V
10p
10
60
Input Bias, Offset Currents
(pA)
IB, TA = +125°C
1n
1000
Sweep VIN+, VIN– = VDD/2
0.1
Sweep VIN–, VIN+ = VDD/2
0.7
0.6
IQ does not include pull-up resistor current
VDD = 5.5V
0.5
0.4
0.3
0.2
0.1
Sweep VIN+, VIN– = VDD/2
Sweep VIN–, VIN+ = VDD/2
0.0
0.0
0.0
0.2 0.4 0.6 0.8 1.0 1.2 1.4
Common Mode Input Voltage (V)
1.6
FIGURE 2-15:
Quiescent Current vs.
Common Mode Input Voltage at VDD = 1.6V.
DS21714G-page 8
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Common Mode Input Voltage (V)
FIGURE 2-18:
Quiescent Current vs.
Common Mode Input Voltage at VDD = 5.5V.
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RPU = 2.74 kΩ to VPU = VDD, and CL = 36 pF.
IDD spike near VPU = 1.3V
1
10
Supply Current
per Comparator (µA)
Supply Current
per Comparator (µA)
10
VDD = 2.1V
VDD = 2.6V
VDD = 3.6V
VDD = 4.6V
VDD = 5.6V
VDD = 1.6V
1
2
3 4 5 6 7 8
Pull-Up Voltage, VPU (V)
FIGURE 2-19:
Voltage.
9
Supply Current vs. Pull-Up
1
VDD = 5.5V
VDD = 1.6V
0.1
1
10
Toggle Frequency (kHz)
VDD = 1.6V
0.6
0.5
0.4
VOL–VSS:
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
0.3
0.2
0.1
0.0
0.0
0.2
0.4
0.6 0.8 1.0 1.2
Output Current (mA)
1.4
1.6
FIGURE 2-21:
Output Voltage Headroom
vs. Output Current at VDD = 1.6V.
© 2002-2012 Microchip Technology Inc.
2
3
4
5
6
7
8
9
35
TA = -40°C
TA = +25°C
TA = +85°C
TA = +125°C
30
25
20
15
10
5
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Power Supply Voltage (V)
100
Supply Current vs. Toggle
1
FIGURE 2-22:
Supply Current vs. Pull-Up
to Supply Voltage Difference.
FIGURE 2-23:
Output Short Circuit Current
Magnitude vs. Power Supply Voltage.
Output Voltage Headroom (V)
FIGURE 2-20:
Frequency.
0
Pull-up to Supply Voltage Difference,
VPU – VDD (V)
Output Short Circuit Current
Magnitude (mA)
Supply Current
per Comparator (µA)
100 mV Overdrive
VCM = VDD/2
IDD does not include
pull-up resistor current
0.1
Output Voltage Headroom (V)
VDD = 1.6V
VDD = 2.1V
10 11
10
0.7
1
-4 -3 -2 -1
0
VPU = 1.6V to 10.5V
0.1
0.1
0.8
VDD = 5.6V
VDD = 4.6V
VDD = 3.6V
VDD = 2.6V
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
VDD = 5.5V
VOL – VSS:
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
0
5
10
15
Output Current (mA)
20
25
FIGURE 2-24:
Output Voltage Headroom
vs. Output Current at VDD = 5.5V.
DS21714G-page 9
MCP6546/6R/6U/7/8/9
50%
45%
40%
35%
30%
25%
20%
15%
10%
5%
0%
Percentage of Occurrences
Percentage of Occurrences
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RPU = 2.74 kΩ to VPU = VDD, and CL = 36 pF.
408 Samples
100 mV Overdrive
VCM = VDD/2
VDD = 1.6V
0
1
VDD = 5.5V
2
3
4
5
6
7
65%
60%
55%
50%
45%
40%
35%
30%
25%
20%
15%
10%
5%
0%
8
408 Samples
100 mV Overdrive
VCM = VDD/2
VDD = 1.6V
0
1
2
3
4
5
6
7
Low-to-High Propagation Delay (µs)
High-to-Low Propagation Delay (µs)
50%
45%
40%
35%
30%
25%
20%
15%
10%
5%
0%
High-to-Low Propagation
FIGURE 2-28:
Delay.
408 Samples
100 mV Overdrive
VCM = VDD/2
VDD = 5.5V
6
5
VDD = 5.5V
tPLH
VDD = 1.6V
3
2
1
-25
0
25
50
75
Ambient Temperature (°C)
100
tPHL
10 mV Overdrive
tPLH
100
125
FIGURE 2-29:
Propagation Delay vs.
Ambient Temperature.
VCM = VDD/2
100 mV Overdrive
tPHL
4
-50
Propagation Delay (µs)
Propagation Delay (µs)
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Propagation Delay Skew.
Low-to-High Propagation
100 mV Overdrive
VCM = VDD/2
7
Propagation Delay Skew (µs)
FIGURE 2-26:
8
0
2.0
1.6
1.2
0.8
0.4
0.0
-0.4
-0.8
-1.2
-1.6
VDD = 1.6V
Propagation Delay (µs)
8
-2.0
Percentage of Occurrences
FIGURE 2-25:
Delay.
VDD = 5.5V
VCM = VDD/2
10
VDD = 5.5V
tPHL
VDD = 1.6V
tPLH
1
1.5
2.0
2.5
3.0
3.5
4.0
4.5
Power Supply Voltage (V)
5.0
FIGURE 2-27:
Propagation Delay vs.
Power Supply Voltage.
DS21714G-page 10
5.5
1
FIGURE 2-30:
Overdrive.
10
100
Input Overdrive (mV)
1000
Propagation Delay vs. Input
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RPU = 2.74 kΩ to VPU = VDD, and CL = 36 pF.
8
VDD = 1.6V
100 mV Overdrive
7
Propagation Delay (µs)
Propagation Delay (µs)
8
6
5
4
tPHL
3
2
tPLH
1
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
Common Mode Input Voltage (V)
1.6
FIGURE 2-31:
Propagation Delay vs.
Common Mode Input Voltage at VDD = 1.6V.
8
5
tPHL
4
tPLH
3
2
1
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Common Mode Input Voltage (V)
FIGURE 2-34:
Propagation Delay vs.
Common Mode Input Voltage at VDD = 5.5V.
VIN– = 100 mV Overdrive
7
VCM = VDD/2
VIN+ = VCM
6
Propagation Delay (µs)
Propagation Delay (µs)
6
0
0.0
tPLH
VDD = 5.5V
5
4
3
2
tPHL
VDD = 1.6V
1
0
0
10
20
30 40 50 60 70 80
Pull-up Resistor, RPU (k:)
FIGURE 2-32:
Pull-up Resistor.
200
180
160
140
120
100
80
60
40
20
0
tPLH
VDD = 5.5V
VDD = 1.6V
0
90 100
Propagation Delay vs.
100 mV Overdrive
VCM = VDD/2
10
20
tPHL
30 40 50 60 70
Load Capacitance (nF)
FIGURE 2-35:
Capacitance.
80
90
Propagation Delay vs. Load
Output Leakage Current (A)
10n
1.E+04
8
Propagation Delay (µs)
VDD = 5.5V
100 mV Overdrive
7
VIN– = 100 mV Overdrive
7
VCM = VDD/2
VIN+ = VCM
6
TA = +125°C
1n
1.E+03
5
tPHL
VDD = 5.5V
TA = +85°C
100p
1.E+02
4
CS = VDD
VIN+ = VDD/2
VIN– = VSS
1.E+01
10p
3
2
VDD = 1.6V
1
1.E+00
1p
tPLH
0
TA = +25°C
1.E-01
100f
0
1
2
3
4
5
6
7
8
9
10
Pull-up Voltage (V)
FIGURE 2-33:
Pull-up Voltage.
Propagation Delay vs.
© 2002-2012 Microchip Technology Inc.
11
0
1
2
3
4
5
6
7
8
Output Voltage (V)
9
10 11
FIGURE 2-36:
Output Leakage Current
(CS = VDD) vs. Output Voltage (MCP6548 only).
DS21714G-page 11
MCP6546/6R/6U/7/8/9
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RPU = 2.74 kΩ to VPU = VDD, and CL = 36 pF.
Comparator
Shuts Off
Comparator
Turns On
100µ
1.E-04
1.E-05
10µ
1.E-05
10µ
1µ
1.E-06
1µ
1.E-06
CS Hysteresis
1.E-07
100n
1.E-08
10n
CS
High-to-Low
1.E-09
1n
VDD = 1.6V
1.E-11
10p
0.0 0.2 0.4
CS
Hysteresis
100n
1.E-07
10n
1.E-08
CS
Low-to-High
100p
1.E-10
0.6
0.8
1.0
1.2
1.4
VDD = 5.5V
10p
1.E-11
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
1.6
Chip Select (CS) Voltage (V)
Chip Select (CS) Voltage (V)
1.6
VOUT
25
0.0
Supply Current (µA)
CS
20
-1.6
VDD = 1.6V
-3.2
Charging output
capacitance
5
Start-up
IDD
-4.9
-6.5
0
-8.1
FIGURE 2-40:
Supply Current (Shootthrough Current) vs. Chip Select (CS) Voltage at
VDD = 5.5V (MCP6548 only).
Supply Current
per Comparator (µA)
30
Output Voltage,
Chip Select Voltage (V),
FIGURE 2-37:
Supply Current (Shootthrough Current) vs. Chip Select (CS) Voltage at
VDD = 1.6V (MCP6548 only).
10
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Time (1 ms/div)
VOUT
CS
1
2
3
4
5
6
Time (ms)
7
8
9
FIGURE 2-39:
Chip Select (CS) Step
Response (MCP6548 only).
DS21714G-page 12
10
6
3
0
-3
-6
-9
-12
-15
-18
-21
-24
VOUT
CS
Start-up IDD
VDD = 5.5V
Charging output
capacitance
0.5
1.0 1.5 2.0 2.5
Time (0.5 ms/div)
3.0
3.5
FIGURE 2-41:
Supply Current (Charging
Current) vs. Chip Select (CS) pulse at
VDD = 5.5V (MCP6548 only).
Input Current Magnitude (A)
Chip Select, Output Voltage
(V)
VDD = 5.5V
0
200
180
160
140
120
100
80
60
40
20
0
0.0
FIGURE 2-38:
Supply Current (Charging
Current) vs. Chip Select (CS) pulse at
VDD = 1.6V (MCP6548 only).
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
CS
High-to-Low
CS
Low-to-High
1n
1.E-09
1.E-10
100p
15
Comparator
Shuts Off
Output Voltage,
Chip Select Voltage (V)
Supply Current
per Comparator (A)
1.E-04
100µ
1.E-03
1m
Comparator
Turns On
Supply Current
per Comparator (A)
1.E-03
1m
1.E-02
10m
1.E-03
1m
1.E-04
100µ
1.E-05
10µ
1.E-06
1µ
100n
1.E-07
10n
1.E-08
1n
1.E-09
100p
1.E-10
10p
1.E-11
1p
1.E-12
+125°C
+85°C
+25°C
-40°C
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
Input Voltage (V)
FIGURE 2-42:
Voltage.
Input Bias Current vs. Input
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
MCP6546
MCP6546R
MCP6546U
MCP6547
MCP6548
MCP6549
PIN FUNCTION TABLE
MCP6546
TABLE 3-1:
PDIP,
SOIC,
MSOP
SC-70,
SOT-23
SOT-23-5
SC-70,
SOT-23-5
PDIP,
SOIC,
MSOP
PDIP,
SOIC,
MSOP
PDIP,
SOIC,
TSSOP
6
1
1
4
1
6
1
OUT,
OUTA
Digital Output (comparator A)
2
4
4
3
2
2
2
VIN–,
VINA–
Inverting Input
(comparator A)
3
3
3
1
3
3
3
VIN+,
VINA+
Non-inverting Input
(comparator A)
7
5
2
5
8
7
4
VDD
—
—
—
—
5
—
5
VINB+
Non-inverting Input
(comparator B)
—
—
—
—
6
—
6
VINB–
Inverting Input (comparator B)
—
—
—
—
7
—
7
OUTB
Digital Output (comparator B)
—
—
—
—
—
—
8
OUTC
Digital Output (comparator C)
Symbol
Description
Positive Power Supply
—
—
—
—
—
—
9
VINC–
Inverting Input (comparator C)
—
—
—
—
—
—
10
VINC+
Non-inverting Input
(comparator C)
4
2
5
2
4
4
11
VSS
—
—
—
—
—
—
12
VIND+
Non-inverting Input
(comparator D)
—
—
—
—
—
—
13
VIND–
Inverting Input (comparator D)
—
—
—
—
—
—
14
OUTD
Digital Output (comparator D)
—
—
—
—
—
8
—
CS
Chip Select
1, 5, 8
—
—
—
—
1, 5
—
NC
No Internal Connection
3.1
Analog Inputs
The comparator non-inverting and inverting inputs are
high-impedance CMOS inputs with low bias currents.
3.2
CS Digital Input
This is a CMOS, Schmitt-triggered input that places the
part into a low power mode of operation.
3.3
Digital Outputs
The comparator outputs are CMOS, open-drain digital
outputs. They are designed to make level shifting and
wired-OR easy to implement.
© 2002-2012 Microchip Technology Inc.
3.4
Negative Power Supply
Power Supply (VSS and VDD)
The positive power supply pin (VDD) is 1.6V to 5.5V
higher than the negative power supply pin (VSS). For
normal operation, the other pins are at voltages
between VSS and VDD, except the output pins which
can be as high as 10V above VSS.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need a local bypass capacitor (typically 0.01 µF to
0.1 µF) within 2 mm of the VDD pin. These can share a
bulk capacitor with nearby analog parts (within
100 mm), but it is not required.
DS21714G-page 13
MCP6546/6R/6U/7/8/9
NOTES:
DS21714G-page 14
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
4.0
APPLICATIONS INFORMATION
The MCP6546/6R/6U/7/8/9 family of push-pull output
comparators are fabricated on Microchip’s state-of-theart CMOS process. They are suitable for a wide range
of applications requiring very low power consumption.
4.1
VDD
D1
V1
Comparator Inputs
4.1.1
INPUT VOLTAGE AND CURRENT
LIMITS
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to protect the input transistors, and to minimize input bias
current (IB). The input ESD diodes clamp the inputs
when they try to go more than one diode drop below
VSS. They also clamp any voltages that go too far
above VDD; their breakdown voltage is high enough to
allow normal operation, and low enough to bypass ESD
events within the specified limits.
VDD
Bond
Pad
Input
Stage
Bond
Pad
VIN–
VSS Bond
Pad
FIGURE 4-1:
Structures.
Simplified Analog Input ESD
In order to prevent damage and/or improper operation
of these amplifiers, the circuits they are in must limit the
currents (and voltages) at the VIN+ and VIN– pins (see
Absolute Maximum Ratings † at the beginning of
Section 1.0 “Electrical Characteristics”). Figure 4-3
shows the recommended approach to protecting these
inputs. The internal ESD diodes prevent the input pins
(VIN+ and VIN–) from going too far below ground, and
the resistors R1 and R2 limit the possible current drawn
out of the input pin. Diodes D1 and D2 prevent the input
pin (VIN+ and VIN–) from going too far above VDD.
When implemented as shown, resistors R1 and R2 also
limit the current through D1 and D2.
© 2002-2012 Microchip Technology Inc.
–
VOUT
V2
R2
R3
R1 ≥
VSS – (minimum expected V1)
2 mA
R2 ≥
VSS – (minimum expected V2)
2 mA
FIGURE 4-2:
Inputs.
Protecting the Analog
It is also possible to connect the diodes to the left of
resistors R1 and R2. In this case, the currents through
diodes D1 and D2 need to be limited by some other
mechanism. The resistor then serves as in-rush current
limiter; the DC current into the input pins (VIN+ and
VIN–) should be very small.
A significant amount of current can flow out of the
inputs when the common mode voltage (VCM) is below
ground (VSS); see Figure 2-42. Applications that are
high impedance may need to limit the usable voltage
range.
4.1.3
VIN+ Bond
Pad
MCP6G0X
D2
PHASE REVERSAL
The MCP6546/6R/6U/7/8/9 comparator family uses
CMOS transistors at the input. They are designed to
prevent phase inversion when the input pins exceed
the supply voltages. Figure 2-3 shows an input voltage
exceeding both supplies with no resulting phase
inversion.
4.1.2
+
R1
NORMAL OPERATION
The input stage of this family of devices uses two
differential input stages in parallel, one operates at low
input voltages, and the other at high input voltages.
With this topology, the input voltage is 0.3V above VDD
and 0.3V below VSS. The input offset voltage is
measured at both VSS - 0.3V and VDD + 0.3V to ensure
proper operation.
The MCP6546/6R/6U/7/8/9 family has internally-set
hysteresis that is small enough to maintain input offset
accuracy (<7 mV), and large enough to eliminate
output chattering caused by the comparator’s own
input noise voltage (200 µVP-P). Figure 4-3 illustrates
this capability.
DS21714G-page 15
MCP6546/6R/6U/7/8/9
8
7
6
5
4
3
2
1
0
-1
-2
-3
VDD = 5.0V
VIN–
VOUT
Hysteresis
25
20
15
10
5
0
-5
-10
-15
-20
-25
-30
Input Voltage (10 mV/div)
Output Voltage (V)
4.4.1
Time (100 ms/div)
FIGURE 4-3:
The MCP6546/6R/6U/7/8/9
Comparators’ Internal Hysteresis Eliminates
Output Chatter Caused By Input Noise Voltage.
INVERTING CIRCUIT
Figure 4-4 shows an inverting circuit for a single-supply
application using three resistors, besides the pull-up
resistor. The resulting hysteresis diagram is shown in
Figure 4-5.
VDD
IPU
VIN
VOUT
IOL
IRF
R2
RF
Open-Drain Output
The open-drain output is designed to make levelshifting and wired-OR logic easy to implement. The
output can go as high as 10V for 9V battery-powered
applications. The output stage minimizes switching current (shoot-through current from supply-to-supply)
when the output changes state. See Figures 2-15, 2-18
and 2-37 through 2-41, for more information.
4.3
RPU
MCP654X
VDD
R3
4.2
VPU
MCP6548 Chip Select (CS)
FIGURE 4-4:
Hysteresis.
Inverting Circuit with
VOUT
VPU
VOH
Low-to-High
High-to-Low
The MCP6548 is a single comparator with a Chip
Select (CS) pin. When CS is pulled high, the total
current consumption drops to 20 pA (typical). 1 pA
(typical) flows through the CS pin, 1 pA (typical) flows
through the output pin and 18 pA (typical) flows through
the VDD pin, as shown in Figure 1-1. When this
happens, the comparator output is put into a highimpedance state. By pulling CS low, the comparator is
enabled. If the CS pin is left floating, the comparator will
not operate properly. Figure 1-1 shows the output
voltage and supply current response to a CS pulse.
FIGURE 4-5:
Inverting Circuit.
The internal CS circuitry is designed to minimize
glitches when cycling the CS pin. This helps conserve
power, which is especially important in battery-powered
applications.
In order to determine the trip voltages (VTHL and VTLH)
for the circuit shown in Figure 4-4, R2 and R3 can be
simplified to the Thevenin equivalent circuit with
respect to VDD, as shown in Figure 4-6.
4.4
VIN
VOL
VSS
VSS
VTLH VTHL
VDD
VTLH = trip voltage from low to high
VTHL = trip voltage from high to low
Hysteresis Diagram for the
Externally Set Hysteresis
VPU
Greater flexibility in selecting hysteresis, or input trip
points, is achieved by using external resistors.
Input offset voltage (VOS) is the center (average) of the
(input-referred) low-high and high-low trip points. Input
hysteresis voltage (VHYST) is the difference between
the same trip points. Hysteresis reduces output
chattering when one input is slowly moving past the
other, thus reducing dynamic supply current. It also
helps in systems where it is best not to cycle between
states too frequently (e.g., air conditioner thermostatic
control).
DS21714G-page 16
RPU
MCP654X
+
VOUT
V23
R23
FIGURE 4-6:
RF
Thevenin Equivalent Circuit.
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
EQUATION 4-1:
4.6
R2R3
R 23 = ------------------R2 + R3
R3
V23 = ------------------- × VDD
R2 + R3
Reasonable capacitive loads (e.g., logic gates) have
little impact on propagation delay (see Figure 2-27).
The supply current increases with increasing toggle
frequency (Figure 2-30), especially with higher
capacitive loads.
4.7
Using this simplified circuit, the trip voltage can be
calculated using the following equation:
EQUATION 4-2:
R23
R F + R PU
⎛
⎞
VTHL = V PU ⎜ ----------------------------------------⎟ + V23 ⎛ ---------------------------------------⎞
⎝
⎠
R
R
+
R
+
R
⎝ 23
PU⎠
23 + R F + R PU
F
RF
⎛ R23 ⎞
V TLH = VOL ⎜ -----------------------⎟ + V 23 ⎛ ----------------------⎞
⎝
R 23 + RF⎠
⎝ R 23 + R F⎠
VTLH = trip voltage from low to high
VTHL = trip voltage from high to low
Figures 2-21 and 2-24 can be used to determine typical values for VOL. This voltage is dependent on the
output current IOL as shown in Figure 4-4. This current
can be determined using the equation below:
EQUATION 4-3:
I OL = I PU + I RF
V PU – VOL
V 23 – V OL
I OL = ⎛ --------------------------⎞ + ⎛ ------------------------⎞
⎝ R PU ⎠ ⎝ R23 + R F ⎠
Capacitive Loads
Battery Life
In order to maximize battery life in portable
applications, use large resistors and small capacitive
loads. Avoid toggling the output more than necessary.
Do not use Chip Select (CS) too frequently, in order to
conserve power. Capacitive loads will draw additional
power at start-up.
4.8
PCB Surface Leakage
In applications where low input bias current is critical,
PCB (Printed Circuit Board) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low-humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference
would cause 5 pA of current to flow. This is greater
than the MCP6546/6R/6U/7/8/9 family’s bias current at
25°C (1 pA, typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-7.
VIN-
VIN+
VSS
VOH can be calculated using the equation below:
EQUATION 4-4:
R 23 + R F
V OH = ( V PU – V23 ) × ⎛ ---------------------------------------⎞
⎝ R 23 + RF + R PU⎠
As explained in Section 4.1 “Comparator Inputs”, it
is important to keep the non-inverting input below
VDD+0.3V when VPU > VDD.
4.5
Supply Bypass
With this family of comparators, the power supply pin
(VDD for single supply) should have a local bypass
capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm for good
edge-rate performance.
© 2002-2012 Microchip Technology Inc.
Guard Ring
FIGURE 4-7:
Example Guard Ring Layout
for Inverting Circuit.
1.
For the Inverting Configuration (Figures 4-4 and
4-7):
a) Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the
comparator (e.g., VDD/2 or ground).
b) Connect the inverting pin (VIN–) to the input
pad, without touching the guard ring.
DS21714G-page 17
MCP6546/6R/6U/7/8/9
4.9
Unused Comparators
An unused amplifier in a quad package (MCP6549)
should be configured as shown in Figure 4-8. This
circuit prevents the output from toggling and causing
crosstalk. It uses the minimum number of components
and draws minimal current (see Figure 2-15 and
Figure 2-18).
4.10
Typical Applications
4.10.1
PRECISE COMPARATOR
Some applications require higher DC precision. An
easy way to solve this problem is to use an amplifier
(such as the MCP6041) to gain-up the input signal
before it reaches the comparator. Figure 4-9 shows an
example of this approach.
¼ MCP6549
VDD
VDD
VREF
MCP6041
VDD
–
+
VPU
RPU
VIN
R1
R2
MCP6546
VOUT
VREF
FIGURE 4-8:
Unused Comparators.
FIGURE 4-9:
Comparator.
4.10.2
Precise Inverting
WINDOWED COMPARATOR
Figure 4-10 shows one approach to designing a
windowed comparator. The wired-OR connection
produces a high output (logic 1) when the input voltage
is between VRB and VRT (where VRT > VRB ).
VRT
1/2
MCP6547
VPU
RPU
VOUT
VIN
VRB
FIGURE 4-10:
DS21714G-page 18
1/2
MCP6547
Windowed Comparator.
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
5-Lead SC-70 (MCP6546, MCP6546U)
Example: (I-temp)
I-Temp
Code
E-Temp
Code
MCP6546
ACNN
Note 2
MCP6546U
BBNN
Note 2
Device
Note 1:
AC25 (Front)
148 (Back)
Example: (I-temp)
AC25
OR
I-Temp parts prior to March 2005 are
marked “ACN”
SC-70-5 E-Temp parts not available at
this release of the data sheet.
2:
Example: (I-temp)
5-Lead SOT-23 (MCP6546, MCP6546R, MCP6546U)
I-Temp
Code
E-Temp
Code
MCP6546
ACNN
GWNN
MCP6546R
AHNN
GXNN
MCP6546U
—
AWNN
Device
AC25
Note: Applies to 5-Lead SOT-23
8-Lead PDIP (300 mil) (MCP6546, MCP6547, MCP6548, MCP6549)
Examples:
MCP6546
I/P256
1148
OR
MCP6546
e3
I/P^^256
1148
8-Lead SOIC (150 mil) (MCP6546, MCP6547, MCP6548, MCP6549)
MCP6547
I/SN1148
OR
MCP6547
3
SN e^^1148
256
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
256
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2002-2012 Microchip Technology Inc.
DS21714G-page 19
MCP6546/6R/6U/7/8/9
Package Marking Information (Continued)
8-Lead MSOP (MCP6546, MCP6547, MCP6548)
Example:
6546I
148256
14-Lead PDIP (300 mil) (MCP6549)
Example:
MCP6549-I/P
1148256
OR
OR
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS21714G-page 20
MCP6549-E/P e3
1148256
MCP6549
I/P^^
e3
1148256
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
Package Marking Information (Continued)
14-Lead SOIC (150 mil) (MCP6549)
Example:
MCP6549ISL
XXXXXXXXXX
1148256
MCP6549
e3
E/SL^^
1148256
OR
14-Lead TSSOP (MCP6549)
Example:
MCP6549I
1148
256
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2002-2012 Microchip Technology Inc.
DS21714G-page 21
MCP6546/6R/6U/7/8/9
. # #$ # /! - 0 # 1/ %# #!#
## +22--- 2 /
D
b
3
1
2
E1
E
4
5
e
A
e
A2
c
A1
L
3#
4#
5$8 %1
44" "
5
5
56
7
(
1#
6, : #
;
<
;
<
<
!!1/
/
#! %%
9()*
6, =!#
"
;
!!1/=!#
"
(
(
(
6, 4#
;
(
.
4
9
#4#
4!
/
4!=!#
;
<
9
8
(
<
!"! #$! !% # $ !% # $ !# "'(
)*+ ) #&#,$
--# $## #&! !
DS21714G-page 22
- *9)
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
. # #$ # /! - 0 # 1/ %# #!#
## +22--- 2 /
© 2002-2012 Microchip Technology Inc.
DS21714G-page 23
MCP6546/6R/6U/7/8/9
!
. # #$ # /! - 0 # 1/ %# #!#
## +22--- 2 /
b
N
E
E1
3
2
1
e
e1
D
A2
A
c
φ
A1
L
L1
3#
4#
5$8 %1
44" "
5
56
7
5
(
4!1#
()*
6$# !4!1#
6, : #
<
;
<
<
(
6, =!#
"
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!!1/=!#
"
<
;
6, 4#
<
!!1/
/
#! %%
)*
(
.
#4#
4
<
9
.
# #
4
(
<
;
.
#
>
<
>
;
<
9
4!
/
4!=!#
8
<
(
!"! #$! !% # $ !% # $ #&! !
!# "'(
)*+ ) #&#,$
--# $## DS21714G-page 24
- *)
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2002-2012 Microchip Technology Inc.
DS21714G-page 25
MCP6546/6R/6U/7/8/9
" # $ %! &' #$ . # #$ # /! - 0 # 1/ %# #!#
## +22--- 2 /
N
NOTE 1
E1
1
3
2
D
E
A2
A
L
A1
c
e
eB
b1
b
3#
4#
5$8 %1
5*:"
5
5
1#
7
;
# #1
56
)*
<
<
(
(
) # #1
(
<
<
"
(
!!1/
$! # /
$! =!#
!!1/=!#
"
(
;
6, 4#
;
9(
(
# #1
4
(
/
;
(
4!=!#
8
9
8
;
)
<
<
4!
3
4 - 4!=!#
6, - ?
1, $!&%#$ , 08$#$ #8 #!-# # # ! ?%#* # #
!"! #$! !% # $ !% # $ !# "'(
)*+) #&#,$
--# $## #&!@ !
DS21714G-page 26
- *;)
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2002-2012 Microchip Technology Inc.
DS21714G-page 27
MCP6546/6R/6U/7/8/9
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS21714G-page 28
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
" %()!*+&'$
. # #$ # /! - 0 # 1/ %# #!#
## +22--- 2 /
© 2002-2012 Microchip Technology Inc.
DS21714G-page 29
MCP6546/6R/6U/7/8/9
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS21714G-page 30
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2002-2012 Microchip Technology Inc.
DS21714G-page 31
MCP6546/6R/6U/7/8/9
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS21714G-page 32
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2002-2012 Microchip Technology Inc.
DS21714G-page 33
MCP6546/6R/6U/7/8/9
. # #$ # /! - 0 # 1/ %# #!#
## +22--- 2 /
DS21714G-page 34
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2002-2012 Microchip Technology Inc.
DS21714G-page 35
MCP6546/6R/6U/7/8/9
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS21714G-page 36
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2002-2012 Microchip Technology Inc.
DS21714G-page 37
MCP6546/6R/6U/7/8/9
NOTES:
DS21714G-page 38
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
APPENDIX A:
REVISION HISTORY
Revision G (February 2012)
Revision C (May 2003)
• Undocumented changes.
The following is the list of modifications:
Revision B (December 2002)
1.
• Undocumented changes.
2.
3.
4.
5.
Updated the Package Types drawing to correct
the device representation of the SC-70 package.
Updated package temperatures in the
Temperature Characteristics table.
Corrected the marking information table for the
5-Lead SC-70 package (MCP6546 and
MCP6546U) in Section 5.1, Package Marking
Information.
Updated the package outline drawings in
Section 5.1 “Package Marking Information”,
to show all views for each package.
Minor editorial changes.
Revision A (February 2002)
• Original Release of this Document.
Revision F (September 2007)
The following is the list of modifications:
1.
2.
Corrected polarity of MCP6546U SOT-23-5 pinout diagram on the first page.
Updated package outline drawings in
Section 5.1 “Package Marking Information”
per Marcom.
Revision E (September 2006)
The following is the list of modifications:
1.
2.
3.
4.
Added MCP6546U pinout for the SOT-23-5
package.
Clarified Absolute Maximum Analog Input
Voltage and Current Specifications.
Added application information on unused
comparators.
Added disclaimer to package outline drawings.
Revision D (May 2006)
The following is the list of modifications:
1.
2.
3.
4.
5.
6.
7.
Added E-temp parts.
Changed minimum pull-up voltage specification
(VPU) to 1.6V for parts starting Dec. 2004 (week
code 52); previous parts are specified at a
minimum of VDD.
Changed VHYST temperature specifications to
linear and quadratic temperature coefficients.
Changed specifications and plots to include ETemp parts.
Added Section 3.0 “Pin Descriptions”.
Corrected package markings (Section 5.1
“Package Marking Information”).
Added Appendix A: “Revision History”.
© 2002-2012 Microchip Technology Inc.
DS21714G-page 39
MCP6546/6R/6U/7/8/9
NOTES:
DS21714G-page 40
© 2002-2012 Microchip Technology Inc.
MCP6546/6R/6U/7/8/9
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
–X
/XX
Device
Temperature
Range
Package
Device:
Temperature Range:
MCP6546: Single Comparator
MCP6546T: Single Comparator (Tape and Reel)
(SC-70, SOT-23, SOIC, MSOP)
MCP6546RT: Single Comparator (Rotated - Tape and
Reel) (SOT-23 only)
MCP6546UT: Single Comparator (Tape and Reel)
(SC-70, SOT-23)(SOT-23-5 is E-Temp only)
MCP6547: Dual Comparator
MCP6547T: Dual Comparator
(Tape and Reel for SOIC and MSOP)
MCP6548: Single Comparator with CS
MCP6548T: Single Comparator with CS
(Tape and Reel for SOIC and MSOP)
MCP6549: Quad Comparator
MCP6549T: Quad Comparator
(Tape and Reel for SOIC and TSSOP)
I
= -40°C to +85°C
E * = -40°C to +125°C
Examples:
a)
MCP6546T-I/LT:
b)
MCP6546T-I/OT:
c)
MCP6546-I/MS:
d)
MCP6546-E/P:
e)
MCP6546-E/SN:
a)
MCP6546RT-I/OT: Tape and Reel,
Industrial Temperature,
5LD SOT23.
a)
MCP6546UT-E/LT: Tape and Reel,
Industrial Temperature,
5LD SC-70
MCP6546UT-E/OT: Tape and Reel,
Extended Temperature,
5LD SOT23.
b)
* SC-70-5 E-Temp parts not available at this release of the
data sheet.
Package:
LT
OT
MS
P
SN
SL
ST
=
=
=
=
=
=
=
Plastic Package (SC-70), 5-lead
Plastic Small Outline Transistor (SOT-23), 5-lead
Plastic MSOP, 8-lead
Plastic DIP (300 mil Body), 8-lead, 14-lead
Plastic SOIC (150 mil Body), 8-lead
Plastic SOIC (150 mil Body), 14-lead (MCP6549)
Plastic TSSOP (4.4mm Body), 14-lead (MCP6549)
© 2002-2012 Microchip Technology Inc.
a)
MCP6547-I/MS:
b)
MCP6547T-I/MS:
c)
MCP6547-I/P:
d)
MCP6547-E/SN:
a)
MCP6548-I/SN:
b)
MCP6548T-I/SN:
c)
MCP6548-I/P:
d)
MCP6548-E/SN:
a)
MCP6549T-I/SL:
b)
MCP6549T-E/SL:
c)
MCP6549-I/P:
d)
MCP6549-E/ST:
Tape and Reel,
Industrial Temperature,
5LD SC-70.
Tape and Reel,
Industrial Temperature,
5LD SOT-23.
Tape and Reel,
Industrial Temperature,
8LD MSOP.
Extended Temperature,
8LD PDIP.
Extended Temperature,
8LD SOIC.
Industrial Temperature,
8LD MSOP.
Tape and Reel,
Industrial Temperature,
8LD MSOP.
Industrial Temperature,
8LD PDIP.
Extended Temperature,
8LD SOIC.
Industrial Temperature,
8LD SOIC.
Tape and Reel,
Industrial Temperature,
8LD SOIC.
Industrial Temperature,
8LD PDIP.
Extended Temperature,
8LD SOIC.
Tape and Reel,
Industrial Temperature,
14LD SOIC.
Tape and Reel,
Extended Temperature,
14LD SOIC.
Industrial Temperature,
14LD PDIP.
Extended Temperature,
14LD TSSOP.
DS21714G-page 41
MCP6546/6R/6U/7/8/9
NOTES:
DS21714G-page 42
© 2002-2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
PIC32 logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, chipKIT,
chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,
dsPICworks, dsSPEAK, ECAN, ECONOMONITOR,
FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP,
Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB,
MPLINK, mTouch, Omniscient Code Generation, PICC,
PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE,
rfLAB, Select Mode, Total Endurance, TSHARC,
UniWinDriver, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2002-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-62076-019-2
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2002-2012 Microchip Technology Inc.
DS21714G-page 43
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Japan - Osaka
Tel: 81-66-152-7160
Fax: 81-66-152-9310
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Cleveland
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Hangzhou
Tel: 86-571-2819-3187
Fax: 86-571-2819-3189
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-330-9305
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
DS21714G-page 44
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
11/29/11
© 2002-2012 Microchip Technology Inc.
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