NTMS4706N Power MOSFET 30 V, 10.3 A, Single N−Channel, SO−8 Features • • • • Low RDS(on) Low Gate Charge Standard SO−8 Single Package Pb−Free Package is Available http://onsemi.com V(BR)DSS Applications • • • • Notebooks, Graphics Cards Synchronous Rectification High Side Switch DC−DC Converters RDS(ON) TYP 9.0 mW @ 10 V 30 V 10.3 A 11.4 mW @ 4.5 V N−Channel MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS 30 V Gate−to−Source Voltage VGS ±20 V ID 8.6 A Continuous Drain Current (Note 1) Power Dissipation (Note 1) Steady State TA = 25°C t v 10 s TA = 25°C Steady State TA = 25°C TA = 85°C Steady State G 10.3 PD S W 1.5 MARKING DIAGRAM/ PIN ASSIGNMENT 2.2 ID TA = 25°C TA = 85°C TA = 25°C A 6.4 4.6 PD 1 0.83 W 1 Pulsed Drain Current tp = 10 ms Operating Junction and Storage Temperature IDM 31 A TJ, Tstg −55 to 150 °C Source Current (Body Diode) Single Pulse Drain−to−Source Avalanche Energy (VDD = 25 V, VGS = 10 V, IL Peak = 7.5 A, L = 10 mH, RG = 25 W) IS 2.1 A EAS 150 mJ TL 260 °C Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) THERMAL RESISTANCE MAXIMUM RATINGS Symbol Value Unit Junction−to−Ambient – Steady State (Note 1) Parameter RqJA 83.5 °C/W Junction−to−Ambient – t v 10 s (Note 1) RqJA 58 Junction−to−Ambient – Steady State (Note 2) RqJA 150 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Surfacemounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 2. Surfacemounted on FR4 board using the minimum recommended pad size. SO−8 CASE 751 STYLE 12 Source Source Source Gate 8 4706N ALYWG G Power Dissipation (Note 2) D 6.2 t v 10 s Continuous Drain Current (Note 2) ID MAX (Note 1) Drain Drain Drain Drain Top View 4706N = Device Code A = Assembly Location L = WaferLot Y = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device Package Shipping † NTMS4706NR2 SO−8 2500/Tape & Reel SO−8 (Pb−Free) 2500/Tape & Reel NTMS4706NR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2005 November, 2005 − Rev. 3 1 Publication Order Number: NTMS4706N/D NTMS4706N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 30 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current Gate−to−Source Leakage Current IDSS V 21 VGS = 0 V, VDS = 24 V mV/°C TJ = 25°C 1.0 TJ = 125°C 50 IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS = VDS, ID = 250 mA ±100 mA nA ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance RDS(on) Forward Transconductance 1.0 2.5 −4.8 gFS V mV/°C VGS = 10 V, ID = 10.3 A 9.0 12 mW VGS = 4.5 V, ID = 10 A 11.4 15 VDS = 15 V, ID = 10 A 19 S 950 pF CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss VGS = 0 V, f = 1.0 MHz, VDS = 24 V 400 100 Total Gate Charge QG(TOT) 10 Threshold Gate Charge QG(TH) 1.25 Gate−to−Source Charge QGS Gate−to−Drain Charge QGD 4.5 RG 1.82 td(on) 7.5 12 tr 4.0 8.0 24 40 14 25 TJ = 25°C 0.74 1.0 TJ = 125°C 0.57 Gate Resistance VGS = 4.5 V, VDS = 15 V, ID = 10 A 15 nC 2.4 W SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(off) VGS = 10 V, VDD = 15 V, ID = 1.0 A, RG = 3.0 W tf ns DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 2.1 A 34 VGS = 0 V, dIS/dt = 100 A/ms, IS = 2.1 A QRR http://onsemi.com 2 ns 16 18 29 3. Pulse Test: pulse width = 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. V nC NTMS4706N TYPICAL PERFORMANCE CURVES 5V 3.2 V 25 35 TJ = 25°C 10 V 3V ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS) 30 2.8 V 20 15 2.6 V 10 2.4 V 5 VDS ≥ 10 V 30 25 20 15 TJ = 125°C 10 TJ = 25°C 5 2.2 V 1 2 3 4 5 6 7 8 9 10 1 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 1.5 2 2.5 3 3.5 4 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 0.03 TJ = 25°C ID = 10 A 0.025 0.02 0.015 0.01 0.005 1 7 2 5 3 4 6 8 9 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 10 TJ = 25°C 0.015 VGS = 4.5 V 0.012 VGS = 10 V 0.009 0.006 2 16 14 8 12 6 10 ID, DRAIN CURRENT (AMPS) 4 18 20 Figure 4. On−Resistance vs. Drain Current and Gate Voltage 1.8 10000 ID = 10.3 A VGS = 10 V VGS = 0 V IDSS, LEAKAGE (nA) 1.6 4.5 0.018 Figure 3. On−Resistance vs. Gate−to−Source Voltage RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) TJ = −55°C 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 0 1.4 1.2 1 TJ = 150°C 1000 TJ = 100°C 100 0.8 0.6 −50 10 −25 0 25 50 75 100 125 150 3 6 9 12 15 18 21 24 27 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 30 NTMS4706N C, CAPACITANCE (pF) VDS = 0 V VGS = 0 V TJ = 25°C 1500 C iss 1200 Ciss 900 Crss 600 Coss 300 Crss 0 20 10 0 VGS 10 20 5 20 QT VDS 4 12 2 8 1 4 ID = 10 A TJ = 25°C 0 2 VDS 4 6 8 QG, TOTAL GATE CHARGE (nC) 0 10 Figure 8. Gate−To−Source and Drain−To−Source Voltage vs. Total Charge Figure 7. Capacitance Variation 1000 7 100 IS, SOURCE CURRENT (AMPS) VDD = 10 V ID = 10.3 A VGS = 4.5 V t, TIME (ns) QGD QGS GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) tr tf td(off) td(on) 10 1 16 VGS 3 0 30 V DS , DRAIN−TO−SOURCE VOLTAGE (VOLTS) 1800 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) TYPICAL PERFORMANCE CURVES 1 10 RG, GATE RESISTANCE (OHMS) 6 VGS = 0 V TJ = 25°C 5 4 3 2 1 0 0.3 100 Figure 9. Resistive Switching Time Variation vs. Gate Resistance 0.4 0.5 0.6 0.7 0.8 0.9 VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 10. Diode Forward Voltage vs. Current http://onsemi.com 4 1 NTMS4706N PACKAGE DIMENSIONS SOIC−8 CASE 751−07 ISSUE AG NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. −X− A 8 5 0.25 (0.010) S B 1 M Y M 4 K −Y− G C N X 45 _ DIM A B C D G H J K M N S SEATING PLANE −Z− 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M J S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 STYLE 12: PIN 1. 2. 3. 4. 5. 6. 7. 8. SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 5 SOURCE SOURCE SOURCE GATE DRAIN DRAIN DRAIN DRAIN INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 NTMS4706N ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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