AVAGO AMMC-6425-W50 18 - 28 ghz power amplifier Datasheet

AMMC - 6425
18 - 28 GHz Power Amplifier
Data Sheet
Chip Size: 2500 x 1750 µm (100 x 69 mils)
Chip Size Tolerance: ± 10 µm (±0.4 mils)
Chip Thickness: 100 ± 10 µm (4 ± 0.4 mils)
Pad Dimensions: 100 x 100 µm (4 ± 0.4 mils)
Description
Features
The AMMC-6425 MMIC is a broadband 1W power amplifier
designed for use in transmitters that operate in various
frequency bands between 18GHz and 28GHz. This MMIC
optimized for linear operation with an output third order
intercept point (OIP3) of 38dBm. At 27GHz it provides
30dBm of output power (P-1dB) and 20dB of gain. The
device has input and output matching circuitry for use
in 50 Ω environments. The AMMC-6425 also integrates
a temperature compensated RF power detection circuit
that enables power detection of 0.3V/W. DC bias is simple
and the device operates on widely available 5V for current supply (negative voltage only needed for Vg). It is
fabricated in a PHEMT process for exceptional power and
gain performance. For improved reliability and moisture
protection, the die is passivated at the active areas.
• Wide frequency range: 18 - 28 GHz
• High gain: 20 dB
• Power: @27 GHz, P-1dB=30 dBm
• Highly linear: OIP3=38dBm
• Integrated RF power detector
• 5.0 Volt, -0.6 Volt, 900mA operation
Applications
• Microwave Radio systems
• Satellite VSAT and DBS systems
• LMDS & Pt-Pt mmW Long Haul
• 802.16 & 802.20 WiMax BWA • WLL and MMDS loops
• Commercial grade military
• Can be driven by AMMC-6345, increasing overall
gain.
AMMC-6425 Absolute Maximum Ratings[1]
Symbol
Parameters/Conditions
Units
Min.
Max.
Vd
Positive Drain Voltage
V
Vg
Gate Supply Voltage
V
Id
Drain Current
mA
1500
Pin
CW Input Power
dBm
23
Tch
Operating Channel Temp.
°C
+150
Tstg
Storage Case Temp.
°C
Tmax
Maximum Assembly Temp.
(60 sec max)
°C
7
-3
-65
0.5
+150
+300
Note:
1. Operation in excess of any one of these conditions may result in permanent damage to this device.
Note: These devices are ESD sensitive. The following precautions are strongly recommended. Ensure
that an ESD approved carrier is used when dice are transported from one destination to another.
Personal grounding is to be worn at all times when handling these devices
AMMC-6425 DC Specifications/Physical Properties [1]
Symbol
Parameters and Test Conditions
Units
Id
Drain Supply Current
(under any RF power drive and temperature)
(Vd=5.0 V, Vg set for Id Typical)
mA
Vg
Gate Supply Operating Voltage
(Id(Q) = 900 (mA))
V
qch-b
Thermal Resistance[2]
(Backside temperature, Tb = 25°C)
°C/W
Min.
-0.85
Typ.
Max.
900
1000
-0.7
-0.55
8.9
Notes:
1. Ambient operational temperature TA=25°C unless otherwise noted.
2. Channel-to-backside Thermal Resistance (θch-b) = 10°C/W at Tchannel (Tc) = 107°C as measured using infrared microscopy. Thermal Resistance
at backside temperature (Tb) = 25°C calculated from measured data.
AMMC-6425 RF Specifications [3, 4, 5] (TA= 25°C, Vd=5V, Id(Q)=900 mA, Zo=50 Ω)
Symbol
Parameters and Test Conditions
Units
Minimum
Typical
Maximum
Sigma
Gain
Small-signal Gain[4]
dB
16.5
18.5
0.5
P-1dB
Output Power at 1dB Gain Compression
dBm
27.5
28.5
0.25
P-3dB
Output Power at 3dB Gain Compression
dBm
30
0.20
OIP3
Third Order Intercept Point;
Df=100MHz; Pin=-20dBm
dBm
38
0.72
RLin
Input Return Loss[4]
dB
-15
0.79
RLout
Output Return Loss[4]
dB
-14
0.54
Isolation
Min. Reverse Isolation
dB
-45
1.20
Notes:
3. Small/Large -signal data measured in wafer form TA = 25°C.
4. 100% on-wafer RF test is done at frequency = 18, 23, and 28 GHz. Statistics based on 1500 part sample
5. Specifications are derived from measurements in a 50 Ω test environment. Aspects of the amplifier performance may be improved over a
more narrow bandwidth by application of additional conjugate, linearity, or power matching.
LSL
1. 1 1. 18 18. 19 19. 0 0. 1
LSL
LSL
8
9
8
9
Gain at 23 GHz
P-1dB at 18 GHz
P-1dB at 28 GHz
Typical distribution of Small Signal Gain and Output Power @P-1dB. Based on 1500 part sampled over several production lots.
AMMC-6425 Typical Performances (TA = 25°C, Vd =5.0 V, ID = 900 mA, Zin = Zout = 50 Ω)
NOTE: These measurements are in a 50 Ω test environment. Aspects of the amplifier performance may be improved
over a more narrow bandwidth by application of additional conjugate, linearity, or power matching.
0
0
S1[dB]
PAE
10
-0
0
-10
P-1 [dBm], PAE [%]
1
Return Loss [dB]
-0
S1 [dB]
S1[dB]
P-1
-
0
0
S11[dB]
S[dB]
S1[dB]
-1
-0
0
Frequency [GHz]
-0
0
Figure 1. Typical Gain and Reverse Isolation
-0
1
0
Frequency [GHz]
0
10
Figure 2. Typical Return Loss (Input and
Output)
0
8
OIP [dBm]
Noise Figure [dB]
Pout [dBm], PAE [%]
10
0
8
18
0
Frequency [GHz]
8
0
1
0
18
0
Freq [GHz]
8
0
100
Pout
PAE
Id
100
1000
0
800
1
00
10
00
00
0
0
~+0C
~-0C
~+8C
S [dB]
-10
-1
~+0C
~-0C
~+8C
-
0
-10
-1
-0
-0
10
1
0
Frequency[GHz]
0
Figure 7. Typical S11 over temperature
-
10
0
10
Pin [dBm]
1
0
0
Figure 6. Typical Output Power, PAE, and
Total Drain Current versus Input Power at
24GHz
S1 [dB]
-
-
8
Figure 5. Typical Output 3rd Order Intercept Pt.
Figure 4. Typical Noise Figure
S11[dB]
Frequency [GHz]
0
-10
0
1
0
-
18
8
1
1
Figure 3. Typical Output Power (@P-1dB)
and PAE
0
1
0
1
-
1
Id [mA]
0
~+0C
~-0C
~+8C
1
10
1
0
Frequency [GHz]
0
Figure 8. Typical S22 over temperature
0
10
1
0
Frequency [GHz]
0
Figure 9. Typical Gain over temperature
0
P-1 [dBm]
8
P-1_8deg
P-1_0deg
P-1_-0deg
0
1
18
0
Frequency [GHz]
8
0
Figure 10. Typical One dB Compression over temperature
Typical Scattering Parameters [1], (TA = 25°C, Vd =5.0 V, ID = 900 mA, Zin = Zout = 50 Ω)
S11
S21
S12
S22
Freq GHz
dB
Mag
Phase
dB
Mag
Phase
dB
Mag
Phase
dB
Mag
Phase
10
-4.77
0.58
145.66
-53.38
0.00
126.23
-53.10
2.21E-03
155.74
-4.91
0.57
121.52
11
-5.67
0.52
130.97
-37.42
0.01
23.99
-52.14
2.47E-03
143.34
-6.13
0.49
98.15
12
-6.77
0.46
117.03
-22.52
0.07
-13.38
-50.29
3.06E-03
133.62
-8.34
0.38
80.37
13
-8.16
0.39
104.74
-9.93
0.32
-69.22
-48.40
3.80E-03
121.73
-8.28
0.39
78.84
14
-9.70
0.33
93.76
-2.15
0.78
-124.28
-49.37
3.40E-03
108.39
-6.30
0.48
38.71
15
-11.04
0.28
84.77
9.06
2.84
-170.06
-45.70
5.19E-03
88.07
-9.55
0.33
-10.55
16
-13.90
0.20
74.80
21.25
11.55
89.04
-47.72
4.11E-03
45.26
-16.09
0.16
-99.99
17
-14.16
0.20
66.48
21.63
12.06
-23.06
-69.30
3.43E-04
28.18
-30.03
0.03
65.16
18
-19.86
0.10
69.36
21.48
11.86
-97.31
-52.15
2.47E-03
145.40
-25.85
0.05
132.01
19
-16.32
0.15
96.12
20.95
11.16
-168.63
-45.71
5.18E-03
136.16
-16.56
0.15
105.71
20
-13.84
0.20
60.31
19.30
9.22
133.48
-39.74
1.03E-02
110.69
-13.48
0.21
53.22
21
-21.35
0.09
47.89
19.02
8.94
79.55
-42.46
7.54E-03
55.12
-21.91
0.08
38.20
22
-22.54
0.07
52.94
18.34
8.26
31.75
-44.82
5.74E-03
54.62
-21.55
0.08
46.01
23
-23.13
0.07
55.48
18.28
8.20
-14.76
-46.34
4.82E-03
49.81
-21.24
0.09
48.32
24
-25.45
0.05
59.58
18.81
8.72
-61.07
-45.51
5.30E-03
65.27
-22.41
0.08
46.43
25
-27.23
0.04
54.82
19.92
9.90
-109.65
-44.97
5.65E-03
58.33
-21.28
0.09
48.84
26
-38.36
0.01
-42.96
21.61
12.04
-163.47
-43.15
6.96E-03
49.98
-21.28
0.09
21.09
27
-18.85
0.11
158.91
22.63
13.54
128.31
-43.47
6.71E-03
32.31
-45.87
0.01
81.81
28
-15.06
0.18
126.93
22.12
12.76
62.15
-45.87
5.09E-03
25.52
-21.98
0.08
127.26
29
-14.11
0.20
108.49
21.09
11.34
-8.78
-45.99
5.02E-03
7.36
-15.18
0.17
97.58
30
-16.81
0.14
95.01
18.89
8.80
-81.20
-45.81
5.12E-03
9.48
-14.83
0.18
59.03
31
-16.00
0.16
109.15
14.73
5.45
-156.43
-51.16
2.77E-03
-35.61
-19.37
0.11
62.07
32
-14.02
0.20
102.50
8.77
2.75
141.46
-65.60
5.25E-04
132.49
-17.77
0.13
59.98
33
-13.52
0.21
100.80
2.40
1.32
91.66
-45.68
5.20E-03
126.36
-17.03
0.14
67.35
34
-12.08
0.25
86.48
-2.96
0.71
47.96
-40.91
9.00E-03
97.83
-16.72
0.15
66.45
35
-10.93
0.28
74.66
-8.45
0.38
6.50
-41.84
8.09E-03
55.30
-15.45
0.17
68.24
36
-11.51
0.27
65.72
-14.00
0.20
-30.13
-40.86
9.06E-03
57.18
-14.49
0.19
63.65
37
-10.60
0.29
57.43
-19.54
0.11
-64.98
-40.09
9.90E-03
57.35
-13.05
0.22
58.19
38
-10.67
0.29
45.03
-26.11
0.05
-93.67
-36.49
1.50E-02
31.06
-12.84
0.23
55.30
39
-10.48
0.30
35.93
-31.72
0.03
-131.80
-38.34
1.21E-02
25.14
-11.87
0.25
46.55
40
-10.99
0.28
26.62
-38.30
0.01
-145.33
-37.42
1.35E-02
-4.05
-11.84
0.26
41.43
Note:
1. Data obtained from on-wafer measurements.
Biasing and Operation
Assembly Techniques
The recommended quiescent DC bias condition for optimum efficiency, performance, and reliability is Vd=5
volts with Vg set for Id=900 mA. Minor improvements in
performance are possible depending on the application.
The drain bias voltage range is 3 to 5.5V. A single DC gate
supply connected to Vg will bias all gain stages. Muting
can be accomplished by setting Vg and /or Vg to the
pinch-off voltage Vp.
The backside of the MMIC chip is RF ground. For microstrip
applications the chip should be attached directly to the
ground plane (e.g. circuit carrier or heatsink) using electrically conductive epoxy [1]
An optional output power detector network is also
provided. The differential voltage between the Det-Ref
and Det-Out pads can be correlated with the RF power
emerging from the RF output port. The detected voltage
is given by :
V = (Vref − Vdet )− Vofs
where Vref is the voltage at the DET _ R port, Vdet is a voltage
at the DET _ O port, and Vofs is the zero-input-power offset
voltage. There are three methods to calculate :
1. Vofs can be measured before each detector measure-
For best performance, the topside of the MMIC should be
brought up to the same height as the circuit surrounding
it. This can be accomplished by mounting a gold plate
metal shim (same length and width as the MMIC) under
the chip which is of correct thickness to make the chip
and adjacent circuit the same height. The amount of
epoxy used for the chip and/or shim attachment should
be just enough to provide a thin fillet around the bottom
perimeter of the chip or shim. The ground plain should
be free of any residue that may jeopardize electrical or
mechanical attachment.
The location of the RF bond pads is shown in Figure 12.
Note that all the RF input and output ports are in a GroundSignal configuration.
ment (by removing or switching off the power source
and measuring ). This method gives an error due to
temperature drift of less than 0.01dB/50°C.
2. Vofs can be measured at a single reference temperature.
The drift error will be less than 0.25dB.
3. Vofs can either be characterized over temperature and
RF connections should be kept as short as reasonable to
minimize performance degradation due to undesirable
series inductance. A single bond wire is normally sufficient
for signal connections, however double bonding with 0.7
mil gold wire or use of gold mesh [2] is recommended
for best performance, especially near the high end of the
frequency band.
The RF ports are AC coupled at the RF input to the first stage
and the RF output of the final stage. No ground wired are
needed since ground connections are made with plated
through-holes to the backside of the device.
Thermosonic wedge bonding is preferred method for wire
attachment to the bond pads. Gold mesh can be attached
using a 2 mil round tracking tool and a tool force of approximately 22 grams and a ultrasonic power of roughly
55 dB for a duration of 76 +/- 8 mS. The guided wedge at
an untrasonic power level of 64 dB can be used for 0.7 mil
wire. The recommended wire bond stage temperature is
150 +/- 2C.
stored in a lookup table, or it can be measured at two
temperatures and a linear fit used to calculate at any
temperature. This method gives an error close to the
method #1.
Caution should be taken to not exceed the Absolute Maximum Rating for assembly temperature and time.
The chip is 100um thick and should be handled with care.
This MMIC has exposed air bridges on the top surface and
should be handled by the edges or with a custom collet
(do not pick up the die with a vacuum on die center).
This MMIC is also static sensitive and ESD precautions
should be taken.
Notes:
[1] Ablebond 84-1 LM1 silver epoxy is recommended.
[2] Buckbee-Mears Corporation, St. Paul, MN, 800-262-3824
DET_R
Vd
Vg
DQ
DET_O
RFout
RFin
Three stage 0.W power amplifier
Figure 11. AMMC-6425 Schematic
Figure 12. AMMC-6425 Bonding pad locations
Vg (Optional)
Vd
0.1µF
0.1µF
� 68pF
Vg
Vd
DET_O
RFOutput
AMMC-6425
�
RFInput
RFO
RFI
DET_R
Vg
0.1µF
Vd
0.1µF
� 68pF
Vg
Vd
Notes:
1. 1µF capacitors on gate and ��
drain lines not shown required.
2. Vg connection is recommended
on both sides for devices
operating at or above P1dB.
Figure 13. AMMC-6425 Assembly diagram
0.0
0.1
0.0
0.0
0.01
0.10
0.00
Ordering Information:
1
0
10
1
0
RF Output Power [dBm]
0
0.001
(DET_R)-(DET_O) [V]]
(DET_R)-(DET_O) [V]
0.0
AMMC-6425-W10 = 10 devices per tray
AMMC-6425-W50 = 50 devices per tray
Figure 14. AMMC-6425 Typical Detector Voltage and Output
Power, Freq=24 GHz
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Pte. in the United States and other countries.
Data subject to change. Copyright © 2006 Avago Technologies Pte. All rights reserved.
5989-3939EN - April 12, 2006
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