STMicroelectronics EMIF03-SIM02F2 3 line emi filter including esd protection Datasheet

EMIF03-SIM02F2
®
3 LINE EMI FILTER
INCLUDING ESD PROTECTION
IPAD™
MAIN PRODUCT APPLICATIONS:
EMI filtering and ESD protection for:
■ SIM Interface (Subscriber Identify Module)
■ UIM Interface (Universal Identify Module)
DESCRIPTION
The EMIF03-SIM02F2 is a highly integrated
device designed to suppress EMI/RFI noise in all
systems subjected to electromagnetic interference. The EMIF03 flip chip packaging means the
package size is equal to the die size.
This filter includes an ESD protection circuitry
which prevents the device from destruction when
subjected to ESD surges up 15kV.
BENEFITS
■ EMI symmetrical (I/O) low-pass filter
■ High efficiency in EMI filtering
■ Lead free package
■ Very low PCB space consuming:
1.42mm x 1.42mm
■ Very thin package: 0.65 mm
■ High efficiency in ESD suppression
■ High reliability offered by monolithic integration
■ High reducing of parasitic elements through
integration & wafer level packaging.
Flip-Chip
(8 Bumps)
Table 1: Order Code
Part Number
EMIF03-SIM02F2
Marking
GJ
Figure 1: Pin Configuration (Ball side)
COMPLIES WITH THE FOLLOWING STANDARDS:
IEC61000-4-2
Level 4 on external & Vcc pins:
15kV(air discharge)
8kV (contact discharge)
Level 1 on internal pins: 2kV (air discharge)
2kV (contact discharge)
3
2
1
RST
in
RST
ext
CLK
in
Gnd
CLK
ext
B
Data
in
VCC
Data
ext
C
A
MIL STD 883E - Method 3015-6 Class 3
Figure 2: Configuration
VCC
100 Ω
RST in
RST ext
R1
47 Ω
CLK in
CLK ext
R2
100 Ω
Data ext
Data in
R3
Cline = 20pF max.
GND
TM: IPAD is a trademark of STMicroelectronics.
September 2005
REV. 5
1/7
EMIF03-SIM02F2
Table 2: Absolute Ratings (limiting values)
Symbol
VPP
Tj
Parameter and test conditions
Value
Unit
Internal pins (A3, B3, C3):
ESD discharge IEC61000-4-2, air discharge
ESD discharge IEC61000-4-2, contact discharge
External pins (A2, B1, C2, C1):
ESD discharge IEC61000-4-2, air discharge
ESD discharge IEC61000-4-2, contact discharge
15
8
Maximum junction temperature
125
°C
2
2
kV
Top
Operating temperature range
- 40 to + 85
°C
Tstg
Storage temperature range
- 55 to + 150
°C
Table 3: Electrical Characteristics (Tamb = 25°C)
Symbol
Parameter
VBR
Breakdown voltage
IRM
Leakage current @ VRM
VRM
Stand-off voltage
VCL
Clamping voltage
Dynamic impedance
IPP
Peak pulse current
RI/O
Series resistance between Input &
Output
Cline
Input capacitance per line
IR = 1 mA
IRM
VRM = 3V
Test conditions
Rd
VF
V
IRM
IR
IPP
Min.
Typ.
6
Max.
Unit
20
V
0.2
µA
1.5
Ω
R1 , R3
Tolerance ± 20%
100
Ω
R2
Tolerance ± 20%
47
Ω
Cline
2/7
IF
VCL VBR VRM
Rd
Symbol
VBR
I
@ 0V
20
pF
EMIF03-SIM02F2
Figure 3: S21 (dB) attenuation measurement
(A2-A3 line)
Figure 4: S21 (dB) attenuation measurement
(B1-B3 line)
EMIF03-SIM02F2_FREQ-MEAS_PM428
Aplac 7.70 User: ST Microelectronics Sep 22 2004
EMIF03-SIM02F2_FREQ-MEAS_PM428
Aplac 7.70 User: ST Microelectronics Sep 22 2004
0.00
0.00
dB
dB
-10.00
-10.00
-20.00
-20.00
-30.00
-30.00
-40.00
-40.00
100.0k
1.0M
10.0M
100.0M
1.0G
100.0k
1.0M
10.0M
f/Hz
100.0M
1.0G
f/Hz
A2/A3 Line
B1/B3 line
Figure 5: S21 (dB) attenuation measurement
(C1-C3 line)
Figure 6: Analog crosstalk measurements
EMIF03-SIM02F2_FREQ-MEAS_PM428
Aplac 7.70 User: ST Microelectronics Sep 22 2004
EMIF03-SIM02F2_FREQ-MEAS_PM428
Aplac 7.70 User: ST Microelectronics Sep 22 2004
0.00
0.00
dB
-10.00
dB
-20.00
-10.00
-30.00
-40.00
-20.00
-50.00
-60.00
-70.00
-30.00
-80.00
-90.00
-40.00
-100.00
100.0k
1.0M
10.0M
100.0M
1.0G
100.0k
f/Hz
1.0M
10.0M
100.0M
1.0G
f/Hz
C1/C3 line
Xtalk A2/B3
Figure 7: Voltages when IEC61000-4-2 (+15 kV
air discharge) applied to external pin
Figure 8: Voltages when IEC61000-4-2 (-15 kV
air discharge) applied to external pin
Vexternal : 10V/d
Vexternal : 5V/d
Vinternal : 10V/d
Vinternal : 5V/d
100ns/d
100ns/d
3/7
EMIF03-SIM02F2
Figure 9: Line capacitance versus reverse
applied voltage (typical)
C(pF)
20.00
16.00
12.00
8.00
4.00
VR(V)
0.00
0
1
2
3
4
5
Figure 10: Aplac model
LbumpRbump
100
Rbump Lbump
a2
Cbump Rsub
bulk
Lbump Rbump
a3
Rsub Cbump
bulk
47
Rbump
Lbump
b1
b3
Cbump Rsub
bulk
LbumpRbump
Rsub Cbump
bulk
100
Rbump Lbump
c1
c3
Rsub
Cbump
bulk
Dext2
Dint1
Dint1
Dext1
Dext1
0.25
0.28
bulk
Rsub Cbump
Dint2
0.25
0.29
0.31
0.29
Bulk
Lbump
Ls
100m
Rbump
a2
100m
Ls
a3
Lgnd
Cgnd
Port1
50
Port2
50
Rgnd
Figure 11: Aplac parameters
Ls 950pH
Rs 150m
Cext1 15pF
Cint1 4.5pF
Cext2 14pF
Cint2 4pF
Rbump 20m
Lbump 50pH
Cbump 0.15pF
Rgnd 500m
Lgnd 50pH
Cgnd 0.15pF
Rsub 100m
4/7
Model Dint1
BV=15
CJO=Cint1
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.001m
VJ=0.6
TT=50n
Model Dext1
BV=15
CJO=Cext1
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.001m
VJ=0.6
TT=50n
Model Dint2
BV=15
CJO=Cint2
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.001m
VJ=0.6
TT=50n
Model Dext2
BV=15
CJO=Cext2
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.001m
VJ=0.6
TT=50n
EMIF03-SIM02F2
Figure 12: Ordering Information Scheme
EMIF
yy
-
xxx zz
Fx
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
Package
F = Flip-Chip
x = 1: 500µm, Bump = 315µm
= 2: Leadfree Pitch = 500µm, Bump = 315µm
= 3: Leadfree Pitch = 400µm, Bump = 250µm
Figure 13: FLIP-CHIP Package Mechanical Data
500µm ± 50
650µm ± 65
1.42mm ± 50µm
500µm ± 50
315µm ± 50
1.42mm ± 50µm
Figure 14: Foot print recommendations
Figure 15: Marking
365
240
365
Copper pad Diameter :
250µm recommended , 300µm max
Dot, ST logo
xx = marking
z = packaging
location
yww = datecode
(y = year
ww = week)
E
Solder stencil opening : 330µm
x x z
y ww
40
220
Solder mask opening recommendation :
340µm min for 315µm copper pad diameter
All dimensions in µm
5/7
EMIF03-SIM02F2
Figure 16: FLIP-CHIP Tape and Reel Specification
Dot identifying Pin A1 location
1.75 +/- 0.1
Ø 1.5 +/- 0.1
4 +/- 0.1
3.5 +/- 0.1
ST E
xxz
yww
ST E
xxz
yww
ST E
xxz
yww
8 +/- 0.3
0.73 +/- 0.05
4 +/- 0.1
User direction of unreeling
All dimensions in mm
Table 4: Ordering Information
Ordering code
Marking
Package
Weight
Base qty
Delivery mode
EMIF03-SIM02F2
GJ
Flip-Chip
2.9 mg
5000
Tape & reel 7”
Note: More informations are available in the application notes:
AN1235: “Flip-Chip: Package description and recommendations for use”
AN1751: "EMI Filters: Recommendations and measurements"
Table 5: Revision History
6/7
Date
Revision
08-Oct-2004
1
Description of Changes
First issue.
20-Oct-2004
2
Minor layout update.
25-Mar-2005
3
Figure 1 on page 1: pin configuration definitions changed
from RST out, CLK out and Data out to RST ext, CLK ext
and Data ext.
13-Jun-2005
4
Titles in Figures 7 and 8 changed - No technical data
changed
12-Sep-2005
5
“out” changed to “ext” in Figure 2.
EMIF03-SIM02F2
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2005 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
7/7
Similar pages