LINER LT1054IS8-PBF Switched-capacitor voltage converter with regulator Datasheet

LT1054/LT1054L
Switched-Capacitor Voltage
Converter with Regulator
FEATURES
DESCRIPTION
Output Current: 100mA (LT1054)
125mA (LT1054L)
■ Reference and Error Amplifier for Regulation
■ Low Loss: 1.1V at 100mA
■ Operating Range:3.5V to 15V (LT1054)
3.5V to 7V (LT1054L)
■ External Shutdown
■ External Oscillator Synchronization
■ Can Be Paralleled
■ Pin Compatible with the LTC®1044/ICL7660
■ Available in SW16 and SO-8 Packages
The LT ®1054 is a monolithic, bipolar, switched-capacitor
voltage converter and regulator. The LT1054 provides
higher output current than previously available converters
with significantly lower voltage losses. An adaptive switch
driver scheme optimizes efficiency over a wide range of
output currents. Total voltage loss at 100mA output current
is typically 1.1V. This holds true over the full supply voltage
range of 3.5V to 15V. Quiescent current is typically 2.5mA.
■
The LT1054 also provides regulation, a feature not previously available in switched-capacitor voltage converters. By
adding an external resistive divider a regulated output can
be obtained. This output will be regulated against changes
in both input voltage and output current. The LT1054 can
also be shut down by grounding the feedback pin. Supply
current in shutdown is less than 100µA.
APPLICATIONS
■
■
■
■
Voltage Inverter
Voltage Regulator
Negative Voltage Doubler
Positive Voltage Doubler
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
The internal oscillator of the LT1054 runs at a nominal
frequency of 25kHz. The oscillator pin can be used to adjust the switching frequency or to externally synchronize
the LT1054.
The LT1054 is pin compatible with previous converters
such the LTC1044/ICL7660.
BLOCK DIAGRAM
VREF
VIN
6
LT1054/LT1054 Voltage Loss
8
2
2.5V
REFERENCE
R
FEEDBACK/
SHUTDOWN
CAP + 2
–
R
Q
OSC
7
OSC
Q
+
VOLTAGE LOSS (V)
DRIVE
+
1
3.5V ≤ VIN ≤ 15V (LT1054)
3.5V ≤ VIN ≤ 7V (LT1054L)
CIN = COUT = 100µF
INDICATES GUARANTEED
TEST POINT
CIN*
CAP – 4
DRIVE
LT1054L
LT1054
1
TJ = 125°C
TJ = 25°C
TJ = –55°C
DRIVE
3 GND
+
*EXTERNAL CAPACITORS
COUT*
5 –VOUT
0
0
25
50
75
100
OUTPUT CURRENT (mA)
125
1054 TA01•
DRIVE
LT1054 • BD
1954lfg
1
LT1054/LT1054L
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltage (Note 2)
LT1054 ..................................................................16V
LT1054L ..................................................................7V
Input Voltage
Pin 1.................................................. 0V ≤ VPIN1 ≤ V+
Pin 3 (S Package).............................. 0V ≤ VPIN3 ≤ V+
Pin 7............................................... 0V ≤ VPIN7 ≤ VREF
Pin 13 (S Package)....................... 0V ≤ VPIN13 ≤ VREF
Operating Junction Temperature Range
LT1054C/LT1054LC............................... 0°C to 100°C
LT1054I.............................................. – 40°C to 100°C
LT1054M............................................. –55°C to 125°C
Maximum Junction Temperature (Note 3)
LT1054C/LT1054LC.......................................... 125°C
LT1054I.............................................................. 125°C
LT1054M............................................................ 150°C
Storage Temperature Range
J8, N8 and S8 Packages..................... –55°C to 150°C
S Package.......................................... – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
TOP VIEW
FB/SHDN 1
+
8
V+
OSC
GND 3
VREF
CAP – 4
5
VOUT
J8 PACKAGE
N8 PACKAGE
8-LEAD PLASTIC DIP 8-LEAD CERAMIC DIP
TJMAX = 125°C, θJA = 130°C/W
FB/SHDN 3
14 V +
6
VREF
CAP +
5
VOUT
7
2
6
4
OSC
CAP +
7
CAP
15 NC
V+
2
–
16 NC
NC 2
8
GND 3
CAP
NC 1
FB/SHDN 1
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 120°C/W
SEE REGULATION AND CAPACITOR SELECTION SECTIONS
IN THE APPLICATIONS INFORMATION FOR IMPORTANT
INFORMATION ON THE S8 DEVICE
4
13 OSC
GND 5
12 VREF
CAP – 6
11 VOUT
NC 7
10 NC
NC 8
9
NC
SW PACKAGE
16-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 150°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT1054CN8#PBF
LT1054CN8#TRPBF
LT1054CN8
8-Lead Plastic DIP
0°C to 100°C
LT1054IN8#PBF
LT1054IN8#TRPBF
LT1054IN8
8-Lead Plastic DIP
–40°C to 100°C
LT1054MJ8#PBF
LT1054MJ8#TRPBF
LT1054MJ8
8-Lead Ceramic DIP
–55°C to 125°C
LT1054CS8#PBF
LT1054CS8#TRPBF
1054
8-Lead Plastic SO
0°C to 100°C
LT1054LCS8#PBF
LT1054LCS8#TRPBF
1054L
8-Lead Plastic SO
0°C to 100°C
LT1054IS8#PBF
LT1054IS8#TRPBF
1054I
8-Lead Plastic SO
–40°C to 100°C
LT1054CSW#PBF
LT1054CSW#TRPBF
LT1054CSW
16-Lead Plastic SO
0°C to 100°C
LT1054ISW#PBF
LT1054ISW#TRPBF
LT1054ISW
16-Lead Plastic SO
–40°C to 100°C
LT1054CJ8#PBF OBSOLETE PART
LT1054CJ8#TRPBF
LT1054CJ8
8-Lead Ceramic DIP
0°C to 100°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
1054lfg
2
LT1054/LT1054L
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 7)
PARAMETER
CONDITIONS
Supply Current
ILOAD = 0mA
MIN
LT1054:
TYP
MAX
UNITS
VIN = 3.5V
VIN = 15V
l
l
2.5
3.0
4.0
5.0
mA
mA
LT1054L: VIN = 3.5V
VIN = 7V
l
l
2.5
3.0
4.0
5.0
mA
mA
15
7
V
V
Supply Voltage Range
LT1054
LT1054L
l
l
3.5
3.5
Voltage Loss (VIN – |VOUT|)
CIN = COUT = 100µF Tantalum (Note 4)
IOUT = 10mA
IOUT = 100mA
IOUT = 125mA (LT1054L)
l
l
l
0.35
1.10
1.35
0.55
1.60
1.75
V
V
V
10
15
Ω
kHz
kHz
Output Resistance
∆IOUT = 10mA to 100mA (Note 5)
l
Oscillator Frequency
LT1054: 3.5V ≤ VIN ≤ 15V
LT1054L: 3.5V ≤ VIN ≤ 7V
l
l
15
15
25
25
40
35
Reference Voltage
IREF = 60µA, TJ = 25°C
2.35
2.25
2.50
l
2.65
2.75
V
V
–4.70
–5.00
–5.20
V
5
25
10
50
Regulated Voltage
VIN = 7V, TJ = 25°C, RL = 500Ω (Note 6)
Line Regulation
LT1054: 7V ≤ VIN ≤ 12V, RL = 500Ω (Note 6)
l
Load Regulation
VIN = 7V, 100Ω ≤ 500Ω (Note 6)
l
Maximum Switch Current
Supply Current in Shutdown
300
VPIN1 = 0V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The absolute maximum supply voltage rating of 16V is for
unregulated circuits using LT1054. For regulation mode circuits using
LT1054 with VOUT ≤ 15V at Pin 5 (Pin 11 on S package), this rating may be
increased to 20V. The absolute maximum supply voltage for LT1054L is 7V.
Note 3: The devices are guaranteed by design to be functional up to the
absolute maximum junction temperature.
Note 4: For voltage loss tests, the device is connected as a voltage inverter,
with pins 1, 6, and 7 (3, 12, and 13 S package) unconnected. The voltage
losses may be higher in other configurations.
l
100
mV
mV
mA
200
µA
Note 5: Output resistance is defined as the slope of the curve, (∆VOUT vs
∆IOUT), for output currents of 10mA to 100mA. This represents the linear
portion of the curve. The incremental slope of the curve will be higher at
currents <10mA due to the characteristics of the switch transistors.
Note 6: All regulation specifications are for a device connected as a
positive-to-negative converter/regulator with R1 = 20k, R2 = 102.5k,
C1 = 0.002µF, (C1 = 0.05µF S package) CIN = 10µF tantalum, COUT = 100µF
tantalum.
Note 7: The S8 package uses a different die than the H, J8, N8 and S
packages. The S8 device will meet all the existing data sheet parameters.
See Regulation and Capacitor Selection in the Applications Information
section for differences in application requirements.
1954lfg
3
LT1054/LT1054L
TYPICAL PERFORMANCE CHARACTERISTICS
Shutdown Threshold
Supply Current
5
0.5
0.4
0.3
0.2
Oscillator Frequency
35
IL = 0
4
FREQUENCY (kHz)
VPIN1
SUPPLY CURRENT (mA)
SHUTDOWN THRESHOLD (V)
0.6
3
2
0
– 50 – 25
50
25
75
0
TEMPERATURE (°C)
100
0
125
10
5
INPUT VOLTAGE (V)
0
Supply Current in Shutdown
VPIN1 = 0V
60
40
20
0
10
5
INPUT VOLTAGE (V)
Output Voltage Loss
140
1.4
120
1.2
100
1.0
VOLTAGE LOSS (V)
AVERAGE INPUT CURRENT (mA)
100
80
60
40
20
0
15
20
100
60
80
40
OUTPUT CURRENT (mA)
Output Voltage Loss
VOLTAGE LOSS (V)
VOLTAGE LOSS (V)
IOUT = 50mA
0
INVERTER CONFIGURATION
COUT = 100µF TANTALUM
fOSC = 25kHz
0 10 20 30 40 50 60 70 80 90 100
INPUT CAPACITANCE (µF)
LT1054 • TPC06
IOUT = 100mA
1
IOUT = 50mA
IOUT = 10mA
1
IOUT = 10mA
0.4
INVERTER CONFIGURATION
CIN = 100µF TANTALUM
COUT = 100µF TANTALUM
2
IOUT = 100mA
0
0.6
Output Voltage Loss
INVERTER CONFIGURATION
CIN = 10µF TANTALUM
COUT = 100µF TANTALUM
1
IOUT = 50mA
LT1050 • TPC05
LT1054 • TPC04
2
IOUT = 100mA
0.8
0.2
0
100 125
LT1054 • TPC03
Average Input Current
120
80
15
–70 –50 –25 0
25 50 75
TEMPERATURE (°C)
15
LT1054 • TPC02
LT1054 • TPC01
QUIESCENT CURRENT (µA)
VIN = 3.5V
1
0.1
0
VIN = 15V
25
10
OSCILLATOR FREQUENCY (kHz)
IOUT = 10mA
100
LT1054 • TPC07
0
1
10
OSCILLATOR FREQUENCY (kHz)
100
LT1054 • TPC08
1054lfg
4
LT1054/LT1054L
TYPICAL PERFORMANCE CHARACTERISTICS
Reference Voltage Temperature
Coefficient
Regulated Output Voltage
100
–4.8
80
REFERENCE VOLTAGE CHANGE (mV)
–4.7
OUTPUT VOLTAGE (V)
–4.9
–5.0
–5.1
–11.6
–11.8
–12.0
–12.2
–12.4
–12.6
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
LT1054 • TPC09
VREF AT 0 = 2.500V
60
40
20
0
–20
–40
–60
–80
–100
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
LT1054 • TPC10
PIN FUNCTIONS
FB/SHDN (Pin 1): Feedback/Shutdown Pin. This pin has
two functions. Pulling Pin 1 below the shutdown threshold
(≈ 0.45V) puts the device into shutdown. In shutdown the
reference/regulator is turned off and switching stops. The
switches are set such that both CIN and COUT are discharged
through the output load. Quiescent current in shutdown
drops to approximately 100µA (see Typical Performance
Characteristics). Any open-collector gate can be used to
put the LT1054 into shutdown. For normal (unregulated)
operation the device will start back up when the external
gate is shut off. In LT1054 circuits that use the regulation
feature, the external resistor divider can provide enough
pull-down to keep the device in shutdown until the output
capacitor (COUT) has fully discharged. For most applications where the LT1054 would be run intermittently, this
does not present a problem because the discharge time
of the output capacitor will be short compared to the offtime of the device. In applications where the device has
to start up before the output capacitor (COUT) has fully
discharged, a restart pulse must be applied to Pin 1 of
the LT1054. Using the circuit of Figure 5, the restart signal
can be either a pulse (tp > 100µs) or a logic high. Diode
coupling the restart signal into Pin 1 will allow the output
voltage to come up and regulate without overshoot. The
resistor divider R3/R4 in Figure 5 should be chosen to
provide a signal level at pin 1 of 0.7V to 1.1V.
Pin 1 is also the inverting input of the LT1054’s error
amplifier and as such can be used to obtain a regulated
output voltage.
CAP+/CAP – (Pin 2/Pin 4): Pin 2, the positive side of the
input capacitor (CIN), is alternately driven between V +
and ground. When driven to V+, Pin 2 sources current
from V+. When driven to ground Pin 2 sinks current to
ground. Pin 4, the negative side of the input capacitor, is
driven alternately between ground and VOUT. When driven
to ground, Pin 4 sinks current to ground. When driven to
VOUT Pin 4 sources current from COUT. In all cases current
flow in the switches is unidirectional as should be expected
using bipolar switches.
VOUT (Pin 5): In addition to being the output pin this pin
is also tied to the substrate of the device. Special care
must be taken in LT1054 circuits to avoid pulling this
pin positive with respect to any of the other pins. Pulling
Pin 5 positive with respect to Pin 3 (GND) will forward
bias the substrate diode which will prevent the device from
starting. This condition can occur when the output load
driven by the LT1054 is referred to its positive supply (or
to some other positive voltage). Note that most op amps
present just such a load since their supply currents flow
from their V + terminals to their V– terminals. To prevent
start-up problems with this type of load an external
1954lfg
5
LT1054/LT1054L
PIN FUNCTIONS
transistor must be added as shown in Figure 1. This will
prevent VOUT (Pin 5) from being pulled above the ground
pin (Pin 3) during start-up. Any small, general purpose
transistor such as 2N2222 or 2N2219 can be used. RX
should be chosen to provide enough base drive to the
external transistor so that it is saturated under nominal
output voltage and maximum output current conditions.
In some cases an N-channel enhancement mode MOSFET
can be used in place of the transistor.
RX ≤
( VOUT )β
IOUT
V+
IL
+
IQ
LOAD
FB/SHDN
CIN
+
OSC
CAP +
LT1054
GND
VREF
CAP –
–
V+
RX
VOUT
IOUT
LT1054 • F01
+ COUT
Figure 1
VREF (Pin 6): Reference Output. This pin provides a 2.5V
reference point for use in LT1054-based regulator circuits.
The temperature coefficient of the reference voltage has
been adjusted so that the temperature coefficient of the
regulated output voltage is close to zero. This requires the
reference output to have a positive temperature coefficient
as can be seen in the typical performance curves. This
nonzero drift is necessary to offset a drift term inherent
in the internal reference divider and comparator network
tied to the feedback pin. The overall result of these drift
terms is a regulated output which has a slight positive
temperature coefficient at output voltages below 5V and a
slight negative TC at output voltages above 5V. Reference
output current should be limited, for regulator feedback
networks, to approximately 60µA. The reference pin will
draw ≈100µA when shorted to ground and will not affect the internal reference/regulator, so that this pin can
also be used as a pull-up for LT1054 circuits that require
synchronization.
OSC (Pin 7): Oscillator Pin. This pin can be used to raise
or lower the oscillator frequency or to synchronize the
device to an external clock. Internally Pin 7 is connected
to the oscillator timing capacitor (Ct ≈ 150pF) which is
alternately charged and discharged by current sources of
±7µA so that the duty cycle is ≈50%. The LT1054 oscillator
is designed to run in the frequency band where switching losses are minimized. However the frequency can be
raised, lowered, or synchronized to an external system
clock if necessary.
The frequency can be lowered by adding an external
capacitor (C1, Figure 2) from Pin 7 to ground. This will
increase the charge and discharge times which lowers the
oscillator frequency. The frequency can be increased by
adding an external capacitor (C2, Figure 2, in the range
of 5pF to 20pF) from Pin 2 to Pin 7. This capacitor will
couple charge into CT at the switch transitions, which will
shorten the charge and discharge time, raising the oscillator frequency. Synchronization can be accomplished
by adding an external resistive pull-up from Pin 7 to the
reference pin (Pin 6). A 20k pull-up is recommended. An
open collector gate or an NPN transistor can then be used
to drive the oscillator pin at the external clock frequency
as shown in Figure 2. Pulling up Pin 7 to an external voltage is not recommended. For circuits that require both
frequency synchronization and regulation, an external
reference can be used as the reference point for the top
of the R1/R2 divider allowing Pin 6 to be used as a pullup point for Pin 7.
FB/SHDN V +
+
CIN
VIN
C2
OSC
CAP +
LT1054
GND
VREF
CAP –
C1
LT1054 • F02
VOUT
+ COUT
Figure 2
V+ (Pin 8): Input Supply. The LT1054 alternately charges
CIN to the input voltage when CIN is switched in parallel
with the input supply and then transfers charge to COUT
when CIN is switched in parallel with COUT. Switching occurs at the oscillator frequency. During the time that CIN
1054lfg
6
LT1054/LT1054L
PIN FUNCTIONS
is charging, the peak supply current will be approximately
equal to 2.2 times the output current. During the time that
CIN is delivering charge to COUT the supply current drops
to approximately 0.2 times the output current. An input
supply bypass capacitor will supply part of the peak input
current drawn by the LT1054 and average out the current
drawn from the supply. A minimum input supply bypass
capacitor of 2µF, preferably tantalum or some other low ESR
type is recommended. A larger capacitor may be desirable
in some cases, for example, when the actual input supply
is connected to the LT1054 through long leads, or when
the pulse current drawn by the LT1054 might affect other
circuitry through supply coupling.
APPLICATIONS INFORMATION
Theory of Operation
V1
V2
f
To understand the theory of operation of the LT1054, a review of a basic switched-capacitor building block is helpful.
In Figure 3 when the switch is in the left position, capacitor C1 will charge to voltage V1. The total charge on C1
will be q1 = C1V1. The switch then moves to the right,
discharging C1 to voltage V2. After this discharge time
the charge on C1 is q2 = C1V2. Note that charge has been
transferred from the source V1 to the output V2. The
amount of charge transferred is:
∆q = q1 – q2 = C1(V1 – V2)
If the switch is cycled f times per second, the charge
transfer per unit time (i.e., current) is:
I = (f)(∆q) = (f)[C1(V1 – V2)]
To obtain an equivalent resistance for the switchedcapacitor network we can rewrite this equation in terms
of voltage and impedance equivalence:
I=
V1– V2 V1– V2
=
1/ fC1 REQUIV
A new variable REQUIV is defined such that REQUIV = 1/fC1.
Thus the equivalent circuit for the switched-capacitor
network is as shown in Figure 4. The LT1054 has the same
switching action as the basic switched-capacitor building
block. Even though this simplification doesn’t include finite
switch on-resistance and output voltage ripple, it provides
an intuitive feel for how the device works.
These simplified circuits explain voltage loss as a function
of frequency (see Typical Performance Characteristics).
As frequency is decreased, the output impedance will
C1
C2
RL
LT1054 • F03
Figure 3. Switched-Capacitor Building Block
V1
REQUIV
REQUIV = 1
fC1
V2
C2
RL
LT1054 • F04
Figure 3. Switched-Capacitor Equivalent Circuit
eventually be dominated by the 1/fC1 term and voltage
losses will rise.
Note that losses also rise as frequency increases. This is
caused by internal switching losses which occur due to
some finite charge being lost on each switching cycle. This
charge loss per-unit-cycle, when multiplied by the switching
frequency, becomes a current loss. At high frequency this
loss becomes significant and voltage losses again rise.
The oscillator of the LT1054 is designed to run in the
frequency band where voltage losses are at a minimum.
Regulation
The error amplifier of the LT1054 servos the drive to the
PNP switch to control the voltage across the input capacitor (CIN) which in turn will determine the output voltage.
Using the reference and error amplifier of the LT1054,
an external resistive divider is all that is needed to set
the regulated output voltage. Figure 5 shows the basic
regulator configuration and the formula for calculating
the appropriate resistor values. R1 should be chosen to
1954lfg
7
LT1054/LT1054L
APPLICATIONS INFORMATION
R3
VIN
FB/SHDN V +
R4
CIN +
10µF
TANTALUM
)
)) )
OSC
CAP
LT1054
GND
VREF
CAP –
R1
R2
VOUT
C1
VOUT
FOR EXAMPLE: TO GET VOUT = –5V REFERRED TO THE GROUND
PIN OF THE LT1054, CHOOSE R1 = 20k, THEN
)
+
+
RESTART SHUTDOWN
|VOUT|
|VOUT|
R2 =
+1 ≈
+1
1.21V
VREF
R1
– 40mV
2
WHERE VREF = 2.5V NOMINAL
2.2µF
+
COUT
100µF
TANTALUM
LT1054 • F05
)
|–5V|
+ 1 = 102.6k*
2.5V
– 40mV
2
*CHOOSE THE CLOSEST 1% VALUE
R2 = 20k
Figure 5
be 20k or greater because the reference output current
is limited to ≈100µA. R2 should be chosen to be in the
range of 100k to 300k. For optimum results the ratio of
CIN/COUT is recommended to be 1/10. C1, required for
good load regulation at light load currents, should be
0.002µF for all output voltages.
A new die layout was required to fit into the physical
dimensions of the S8 package. Although the new die
of the LT1054CS8 will meet all the specifications of the
existing LT1054 data sheet, subtle differences in the
layout of the new die require consideration in some application circuits. In regulating mode circuits using the
1054CS8 the nominal values of the capacitors, CIN and
COUT, must be approximately equal for proper operation
at elevated junction temperatures. This is different from
the earlier part. Mismatches within normal production
tolerances for the capacitors are acceptable. Making the
nominal capacitor values equal will ensure proper operation at elevated junction temperatures at the cost of a
small degradation in the transient response of regulator
circuits. For unregulated circuits the values of CIN and
COUT are normally equal for all packages. For S8 applications assistance in unusual applications circuits, please
consult the factory.
It can be seen from the circuit block diagram that the
maximum regulated output voltage is limited by the supply
voltage. For the basic configuration, |VOUT| referred to the
8
ground pin of the LT1054 must be less than the total of the
supply voltage minus the voltage loss due to the switches.
The voltage loss versus output current due to the switches
can be found in Typical Performance Characteristics. Other
configurations such as the negative doubler can provide
higher output voltages at reduced output currents (see
Typical Applications).
Capacitor Selection
For unregulated circuits the nominal values of CIN and COUT
should be equal. For regulated circuits see the section on
Regulation. While the exact values of CIN and COUT are
noncritical, good quality, low ESR capacitors such as solid
tantalum are necessary to minimize voltage losses at high
currents. For CIN the effect of the ESR of the capacitor will
be multiplied by four due to the fact that switch currents
are approximately two times higher than output current and
losses will occur on both the charge and discharge cycle.
This means that using a capacitor with 1Ω of ESR for CIN
will have the same effect as increasing the output impedance of the LT1054 by 4Ω. This represents a significant
increase in the voltage losses. For COUT the affect of ESR is
less dramatic. COUT is alternately charged and discharged
at a current approximately equal to the output current and
the ESR of the capacitor will cause a step function to occur in the output ripple at the switch transitions. This step
function will degrade the output regulation for changes
in output load current and should be avoided. Realizing
that large value tantalum capacitors can be expensive, a
technique that can be used is to parallel a smaller tantalum
capacitor with a large aluminum electrolytic capacitor to
gain both low ESR and reasonable cost. Where physical
size is a concern some of the newer chip type surface
mount tantalum capacitors can be used. These capacitors
are normally rated at working voltages in the 10V to 20V
range and exhibit very low ESR (in the range of 0.1Ω).
Output Ripple
The peak-to-peak output ripple is determined by the value
of the output capacitor and the output current. Peak-topeak output ripple may be approximated by the formula:
dV =
IOUT
2fCOUT
1054lfg
LT1054/LT1054L
APPLICATIONS INFORMATION
where dV = peak-to-peak ripple and f = oscillator frequency.
For output capacitors with significant ESR a second term
must be added to account for the voltage step at the switch
transitions. This step is approximately equal to:
(2IOUT)(ESR of COUT)
Power Dissipation
The power dissipation of any LT1054 circuit must be
limited such that the junction temperature of the device
does not exceed the maximum junction temperature ratings. The total power dissipation must be calculated from
two components, the power loss due to voltage drops
in the switches and the power loss due to drive current
losses. The total power dissipated by the LT1054 can be
calculated from:
P ≈ (VIN – |VOUT|)(IOUT) + (VIN)(IOUT)(0.2)
where both VIN and VOUT are referred to the ground pin
(Pin 3) of the LT1054. For LT1054 regulator circuits, the
power dissipation will be equivalent to that of a linear
regulator. Due to the limited power handling capability of
the LT1054 packages, the user will have to limit output
current requirements or take steps to dissipate some power
external to the LT1054 for large input/output differentials.
This can be accomplished by placing a resistor in series
with CIN as shown in Figure 6. A portion of the input
voltage will then be dropped across this resistor without
affecting the output regulation. Because switch current is
approximately 2.2 times the output current and the resistor
will cause a voltage drop when CIN is both charging and
discharging, the resistor should be chosen as:
RX = VX/(4.4 IOUT)
VIN
CIN
OSC
CAP +
LT1054
GND
VREF
CAP –
R1
R2
VOUT
C1
VOUT
+
RX
+
FB/SHDN V +
where:
VX ≈ VIN – [(LT1054 Voltage Loss)(1.3) + |VOUT|]
and IOUT = maximum required output current. The factor
of 1.3 will allow some operating margin for the LT1054.
For example: assume a 12V to – 5V converter at 100mA
output current. First calculate the power dissipation without
an external resistor:
P = (12V – | – 5V|)(100mA) + (12V)(100mA)(0.2)
P = 700mW + 240mW = 940mW
At θJA of 130°C/W for a commercial plastic device this
would cause a junction temperature rise of 122°C so that
the device would exceed the maximum junction temperature at an ambient temperature of 25°C. Now calculate the
power dissipation with an external resistor (RX). First find
how much voltage can be dropped across RX. The maximum voltage loss of the LT1054 in the standard regulator
configuration at 100mA output current is 1.6V, so:
VX = 12V – [(1.6V)(1.3) + | – 5V|] = 4.9V and
RX = 4.9V/(4.4)(100mA) = 11Ω
This resistor will reduce the power dissipated by the
LT1054 by (4.9V)(100mA) = 490mW. The total power dissipated by the LT1054 would then be (940mW – 490mW)
= 450mW. The junction temperature rise would now be
only 58°C. Although commercial devices are guaranteed
to be functional up to a junction temperature of 125°C, the
specifications are only guaranteed up to a junction temperature of 100°C, so ideally you should limit the junction
temperature to 100°C. For the above example this would
mean limiting the ambient temperature to 42°C. Other
steps can be taken to allow higher ambient temperatures.
The thermal resistance numbers for the LT1054 packages
represent worst-case numbers with no heat sinking and
still air. Small clip-on type heat sinks can be used to lower
the thermal resistance of the LT1054 package. In some
systems there may be some available airflow which will
help to lower the thermal resistance. Wide PC board traces
from the LT1054 leads can also help to remove heat from
the device. This is especially true for plastic packages.
COUT
LT1054 • F06
Figure 6
1954lfg
9
LT1054/LT1054L
TYPICAL APPLICATIONS
Basic Voltage Inverter
CAP –
OSC
CAP +
LT1054
GND
VREF
+
VOUT
10µF
–VOUT
100µF
CAP –
LT1054 • TAO2
)
R1
R2
VOUT
)) )
+
|VOUT|
|VOUT|
R2 =
+1 =
+1 ,
1.21V
VREF
R1
– 40mV
2
0.002µF
VOUT
+
100µF
FB/SHDN V +
2µF
OSC
CAP
LT1054
GND
VREF
+
Negative Voltage Doubler
100µF
VIN
Positive Doubler
FB/SHDN V +
+
OSC
CAP +
LT1054
GND
VREF
–
CAP –
2µF
VOUT
VOUT
50mA
QX*
VOUT
100µF
LT1054 • TA03
REFER TO FIGURE 5
+
2µF
VIN
VIN
+
+
+
FB/SHDN V +
Basic Voltage Inverter/Regulator
100µF
+
–
VIN
1N4001 3.5V TO 15V
1N4001
+
+
100µF
FB/SHDN
RX*
+
+
VIN = 3.5V TO 15V
VOUT ≈ 2VIN – (VL + 2VDIODE)
VL = LT1054 VOLTAGE LOSS
VIN
VIN = –3.5V TO –15V
VOUT = 2VIN + (LT1054 VOLTAGE LOSS) + (QX SATURATION VOLTAGE)
LT1054 • TAO4
*SEE FIGURE 3
+
10µF
2µF
V+
OSC
CAP +
LT1054
GND
VREF
CAP –
VOUT
LT1054 • TAO5
100mA Regulating Negative Doubler
VIN
3.5 TO 15V
10µF
+
OSC
CAP +
LT1054 #1
GND
VREF
OSC
CAP +
LT1054 #2
GND
VREF
–
VOUT
SET
10µF
+
R1
40k
VOUT
10µF
1N4002
100µF
FB/SHDN V +
CAP
1N4002
1N4002
FB/SHDN V +
+
10µF
+
R2
500k
10µF
)) )
+
1N4002
0.002µF
CAP –
1N4002
VIN = 3.5 TO 15V
VOUT MAX ≈ –2VIN + [1054 VOLTAGE LOSS + 2(VDIODE)]
)
2.2µF
–VOUT
IOUT ≅ 100mA MAX
HP5082-2810
20k
PIN 2
LT1054 #1
VOUT
+
+
10µF
LT1054 • TAO6
+
|VOUT|
|VOUT|
R2 =
+1 =
+ 1 , REFER TO FIGURE 5
1.21V
R1 VREF
– 40mV
2
1054lfg
10
LT1054/LT1054L
TYPICAL APPLICATIONS
Bipolar Supply Doubler
VIN
3.5V TO 15V
+
10µF
FB/SHDN V +
–
+
+
OSC
CAP +
LT1054
GND
VREF
10µF
CAP
–
100µF
+
VOUT
10µF
VIN = 3.5V TO 15V
+VOUT ≈ 2VIN – (VL + 2VDIODE)
–VOUT ≈ –2VIN + (VL + 2VDIODE)
VL = LT1054 VOLTAGE LOSS
100µF
–VOUT
+
100µF
–
++
+VOUT
+
LT1054 • TAO7
= 1N4001
5V to ± 12V Converter
VIN = 5V
5µF
VOUT ≈ 12V
IOUT = 25mA
FB/SHDN V +
+
100µF
OSC
CAP +
LT1054 #1
GND
VREF
+
CAP –
1N914
+
10µF
+
10µF
2N2219
VOUT
100µF
1k
+
10µF
1N914
5µF
TO PIN 4
LT1054 #1
FB/SHDN V +
OSC
CAP +
LT1054 #2
GND
VREF
CAP –
20k
VOUT
+
+
VOUT ≈ –12V
IOUT = 25mA
100µF
LT1054 • TAO8
+
Strain Gauge Bridge Signal Conditioner
5V
10k
10k
8
0.022µF
A1
1/2 LT1013
+
1
200k
FB/SHDN V +
10µF
+
OSC
CAP +
LT1054
GND
VREF
CAP –
VOUT
10k
ZERO
TRIM
40Ω
2N2907
–
INPUT TTL
OR CMOS
LOW FOR ON
2
3
100k
+
10µF
5k
5k
GAIN
TRIM
6
301k
100k
350Ω
10k
5
1µF
–
1M
A2
1/2 LT1013
7
+
4
LT1054 • TAO9
5V
3k
+
2N2222
A = 125 FOR 0V TO 3V OUT FROM FULL-SCALE
BRIDGE OUTPUT OF 24mV
100µF
TANTALUM
1954lfg
11
LT1054/LT1054L
TYPICAL APPLICATIONS
3.5V to 5V Regulator
VIN
3.5V TO 5.5V
1
1N914
FB/SHDN V +
1N914
10µF
OSC
CAP +
LT1054
GND
VREF
+
CAP –
1µF
+
5µF
R1
20k
3
R2
125k
LTC1044
4
R2
125k
0.002µF
VOUT
2
+
+
7
6
5
+
1N914
8
VOUT = 5V
3k
100µF
+
20k
1µF
–
VIN = 3.5V TO 5.5V
VOUT = 5V
IOUT(MAX) = 50mA
2N2219
1N914
LT1054 • TA10
1N5817
Regulating 200mA, 12V to – 5V Converter
5µF
+ 12V
10Ω
1/2W
10µF
OSC
CAP +
LT1054 #1
GND
VREF
CAP –
+
)
HP5082-2810
FB/SHDN V +
FB/SHDN V +
R1
39.2k
10µF
R2
200k
VOUT
)) )
|VOUT|
|VOUT|
R2 =
+1 =
+1 ,
1.21V
R1 VREF
– 40mV
2
+
OSC
CAP +
LT1054 #2
GND
VREF
10Ω
1/2W
CAP –
0.002µF
20k
VOUT
LT1054 • TA11
200µF
+
VOUT = –5V
IOUT = 0mA to 200mA
REFER TO FIGURE 5
Digitally Programmable Negative Supply
15V
+
11
5µF
20k
10µF
CAP +
OSC
LT1054
GND
VREF
CAP –
DIGITAL
INPUT
AD558
LT1004-2.5
2.5V
FB/SHDN V +
+
16
20k
14
13
12
LT1054 • TA12
VOUT
VOUT = –VIN (PROGRAMMED)
100µF
+
1054lfg
12
LT1054/LT1054L
PACKAGE DESCRIPTION
J8 Package
8-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
CORNER LEADS OPTION
(4 PLCS)
.005
(0.127)
MIN
.023 – .045
(0.584 – 1.143)
HALF LEAD
OPTION
.405
(10.287)
MAX
8
7
6
5
.025
(0.635)
RAD TYP
.045 – .068
(1.143 – 1.650)
FULL LEAD
OPTION
.220 – .310
(5.588 – 7.874)
1
.300 BSC
(7.62 BSC)
2
3
4
.200
(5.080)
MAX
.015 – .060
(0.381 – 1.524)
.008 – .018
(0.203 – 0.457)
0 – 15
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
.045 – .065
(1.143 – 1.651)
.014 – .026
(0.360 – 0.660)
.100
(2.54)
BSC
.125
3.175
MIN
J8 0801
N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
.400*
(10.160)
MAX
8
7
6
5
.255 .015*
(6.477 0.381)
.300 – .325
(7.620 – 8.255)
.008 – .015
(0.203 – 0.381)
1
2
3
NOTE:
1. DIMENSIONS ARE
4
(
+.035
.325 –.015
8.255
+0.889
–0.381
)
INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
.045 – .065
(1.143 – 1.651)
.065
(1.651)
TYP
.100
(2.54)
BSC
.130 .005
(3.302 0.127)
.120
(3.048) .020
MIN
(0.508)
MIN
.018 .003
(0.457 0.076)
N8 1002
1954lfg
13
LT1054/LT1054L
PACKAGE DESCRIPTION
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
NOTE 3
.045 ±.005
.050 BSC
7
8
.245
MIN
5
6
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
RECOMMENDED SOLDER PAD LAYOUT
1
.010 – .020
× 45°
(0.254 – 0.508)
3
2
4
.053 – .069
(1.346 – 1.752)
.008 – .010
(0.203 – 0.254)
.004 – .010
(0.101 – 0.254)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
NOTE:
1. DIMENSIONS IN
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
SO8 0303
SW Package
16-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
.050 BSC .045 .005
.030 .005
TYP
.398 – .413
(10.109 – 10.490)
NOTE 4
16
N
15
14
13
12
11 10
9
N
.325 .005
.420
MIN
.394 – .419
(10.007 – 10.643)
NOTE 3
1
2
3
N/2
N/2
RECOMMENDED SOLDER PAD LAYOUT
1
.005
(0.127)
RAD MIN
.009 – .013
(0.229 – 0.330)
NOTE:
1. DIMENSIONS IN
.291 – .299
(7.391 – 7.595)
NOTE 4
.010 – .029 ¥ 45∞
(0.254 – 0.737)
2
3
4
5
6
.093 – .104
(2.362 – 2.642)
8
.037 – .045
(0.940 – 1.143)
0 – 8 TYP
NOTE 3
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.356 – 0.482)
TYP
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
14
7
.004 – .012
(0.102 – 0.305)
S16 (WIDE) 0502
1054lfg
LT1054/LT1054L
REVISION HISTORY
(Revision history begins at Rev F)
REV
DATE
DESCRIPTION
PAGE NUMBER
F
12/10
The LTC1054MJ8 is now available. Changes reflected throughout the data sheet
G
6/11
Correct error to part number from LTC7660 to ICL7660
1 to 16
1
1954lfg
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT1054/LT1054L
TYPICAL APPLICATIONS
Negative Doubler with Regulator
Positive Doubler with Regulation
VIN = 5V
100µF
1N5817 0.03µF
+
5.5k
10k
2.5k
+
+
OSC
CAP
LT1054
GND
VREF
+
10k
CAP –
5V
–
FB/SHDN V +
2µF
10µF
VOUT
10µF
10k
+
2µF
OSC
CAP +
LT1054
GND
VREF
+
CAP –
+
R1, 20k
VOUT
1N4001
R2
1M
100µF
0.002µF
1N4001
–VOUT
LT1006
VIN = 3.5V TO 15V
VOUT(MAX) ≈ –2VIN + (VL + 2VDIODE)
VL = LT1054 VOLTAGE LOSS
LT1054 • TA13
0.1µF
)
)) )
+
VOUT
8V
50mA
+
FB/SHDN V +
10µF
+
50k
1N5817
VIN
3.5V TO 15V
100µF
|VOUT|
|VOUT|
R2 =
+1 =
+ 1 , REFER TO FIGURE 5
1.21V
R1 VREF
– 40mV
2
LT1054 • TA14
THE TYPICAL APPLICATIONS CIRCUITS WERE VERIFIED USING THE STANDARD LT1054. FOR S8 APPLICATIONS
ASSISTANCE IN ANY OF THE UNUSUAL APPLICATIONS CIRCUITS PLEASE CONSULT THE FACTORY
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC®1144
Switched-Capacitor Wide Input Range Voltage Converter with
Shutdown
Wide Input Voltage Range: 2V to 18V, ISD < 8µA, SO8
LTC1514/LTC1515
Step-Up/Step-Down Switched-Capacitor DC/DC Converters
VIN: 2V to 10V, VOUT: 3.3V to 5V, IQ = 60µA, SO8
LT1611
150mA Output, 1.4mHz Micropower Inverting Switching Regulator
VIN: 0.9V to 10V, VOUT: ±34V ThinSOT™
LT1614
250mA Output, 600kHz Micropower Inverting Switching Regulator
VIN: 0.9V to 6V, VOUT: ±30V, IQ = 1mA, MS8, SO8
LTC1911
250mA, 1.5MHz Inductorless Step-Down DC/DC Converter
VIN: 2.7V to 5.5V, VOUT: 1.5V/1.8V, IQ = 180µA, MS8
LTC3250/LTC3250-1.2/
LTC3250-1.5
Inductorless Step-Down DC/DC Converter
VIN: 3.1V to 5.5V, VOUT: 1.2V, 1.5V, IQ = 35µA, ThinSOT
LTC3251
500mA Spread Spectrum Inductorless Step-Down DC/DC Converter VIN: 2.7V to 5.5V, VOUT: 0.9V to 1.6V, 1.2V, 1.5V, IQ = 9µA,
MS10E
LTC3252
Dual 250mA, Spread Spectrum Inductorless Step-Down
DC/DC Converter
VIN: 2.7V to 5.5V, VOUT: 0.9V to 1.6V, IQ = 50µA, DFN12
1054lfg
16 Linear Technology Corporation
LT 0611 REV G • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
 LINEAR TECHNOLOGY CORPORATION 2010
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